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[1/2] ffmpeg: Disable asm and rvv on riscv32

Message ID 20230408201900.485080-1-raj.khem@gmail.com
State Accepted, archived
Commit 010b068bcc126dbbc1e2032997e8d83360a7de35
Headers show
Series [1/2] ffmpeg: Disable asm and rvv on riscv32 | expand

Commit Message

Khem Raj April 8, 2023, 8:18 p.m. UTC 
ffmpeg 6.0 has added assembly routines which uses rv64i ISA
unconditionally, ideally it should check for ISA before using those
instructions.

Fixes errors like
<instantiation>:1:1: error: instruction requires the following: RV64I Base Instruction Set
ld t0, (a1)
^
src/libavcodec/riscv/pixblockdsp_rvi.S:24:1: note: while in macro instantiation
.irp row, 0, 1, 2, 3, 4, 5, 6, 7
^
<instantiation>:3:9: error: instruction requires the following: RV64I Base Instruction Set
        sd zero, ((0 * 16) + 0)(a0)
        ^

Signed-off-by: Khem Raj <raj.khem@gmail.com>
---
 meta/recipes-multimedia/ffmpeg/ffmpeg_6.0.bb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/meta/recipes-multimedia/ffmpeg/ffmpeg_6.0.bb b/meta/recipes-multimedia/ffmpeg/ffmpeg_6.0.bb
index e4a4a0effa..7db43a8281 100644
--- a/meta/recipes-multimedia/ffmpeg/ffmpeg_6.0.bb
+++ b/meta/recipes-multimedia/ffmpeg/ffmpeg_6.0.bb
@@ -126,7 +126,7 @@  EXTRA_OECONF += "${@bb.utils.contains('TUNE_FEATURES', 'mips32r2', '--disable-mi
 EXTRA_OECONF += "${@bb.utils.contains('TUNE_FEATURES', 'mips32r6', '--disable-mips64r2 --disable-mips32r2', '', d)}"
 EXTRA_OECONF:append:mips = " --extra-libs=-latomic --disable-mips32r5 --disable-mipsdsp --disable-mipsdspr2 \
                              --disable-loongson2 --disable-loongson3 --disable-mmi --disable-msa"
-EXTRA_OECONF:append:riscv32 = " --extra-libs=-latomic"
+EXTRA_OECONF:append:riscv32 = " --extra-libs=-latomic --disable-rvv --disable-asm"
 EXTRA_OECONF:append:armv5 = " --extra-libs=-latomic"
 EXTRA_OECONF:append:powerpc = " --extra-libs=-latomic"