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grub: Fix build with bintutils 2.38 on riscv

Message ID 20220217231032.1848317-1-raj.khem@gmail.com
State Accepted, archived
Commit d42596457628f41baa5729545e2932c6692f73ee
Headers show
Series grub: Fix build with bintutils 2.38 on riscv | expand

Commit Message

Khem Raj Feb. 17, 2022, 11:10 p.m. UTC 
Signed-off-by: Khem Raj <raj.khem@gmail.com>
---
 ...-_zicsr_zifencei-extentions-on-riscv.patch | 47 +++++++++++++++++++
 meta/recipes-bsp/grub/grub2.inc               |  1 +
 2 files changed, 48 insertions(+)
 create mode 100644 meta/recipes-bsp/grub/files/0001-configure.ac-Use-_zicsr_zifencei-extentions-on-riscv.patch
diff mbox series

Patch

diff --git a/meta/recipes-bsp/grub/files/0001-configure.ac-Use-_zicsr_zifencei-extentions-on-riscv.patch b/meta/recipes-bsp/grub/files/0001-configure.ac-Use-_zicsr_zifencei-extentions-on-riscv.patch
new file mode 100644
index 00000000000..c575a311612
--- /dev/null
+++ b/meta/recipes-bsp/grub/files/0001-configure.ac-Use-_zicsr_zifencei-extentions-on-riscv.patch
@@ -0,0 +1,47 @@ 
+From f1217c803cec90813eb834dde7829f4961b2a2e4 Mon Sep 17 00:00:00 2001
+From: Khem Raj <raj.khem@gmail.com>
+Date: Thu, 17 Feb 2022 15:07:02 -0800
+Subject: [PATCH] configure.ac: Use _zicsr_zifencei extentions on riscv
+
+From version 2.38, binutils defaults to ISA spec version 20191213. This
+means that the csr read/write (csrr*/csrw*) instructions and fence.i
+instruction has separated from the `I` extension, become two standalone
+extensions: Zicsr and Zifencei.
+
+The fix is to specify those extensions explicitely in -march. Since we
+are now using binutils 2.38+ in OE this is ok, a more upstreamable fix for
+grub will be to detect these extentions, however thats not easy to
+implement
+
+Upstream-Status: Inappropriate [OE specific]
+Signed-off-by: Khem Raj <raj.khem@gmail.com>
+---
+ configure.ac | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/configure.ac b/configure.ac
+index c7fc55a..072f2c9 100644
+--- a/configure.ac
++++ b/configure.ac
+@@ -849,14 +849,14 @@ if test x"$platform" != xemu ; then
+ 		         [grub_cv_target_cc_soft_float="-mgeneral-regs-only"], [])
+     fi
+     if test "x$target_cpu" = xriscv32; then
+-       CFLAGS="$TARGET_CFLAGS -march=rv32imac -mabi=ilp32 -Werror"
++       CFLAGS="$TARGET_CFLAGS -march=rv32imac_zicsr_zifencei -mabi=ilp32 -Werror"
+        AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])],
+-		         [grub_cv_target_cc_soft_float="-march=rv32imac -mabi=ilp32"], [])
++		         [grub_cv_target_cc_soft_float="-march=rv32imac_zicsr_zifencei -mabi=ilp32"], [])
+     fi
+     if test "x$target_cpu" = xriscv64; then
+-       CFLAGS="$TARGET_CFLAGS -march=rv64imac -mabi=lp64 -Werror"
++       CFLAGS="$TARGET_CFLAGS -march=rv64imac_zicsr_zifencei -mabi=lp64 -Werror"
+        AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[]], [[]])],
+-		         [grub_cv_target_cc_soft_float="-march=rv64imac -mabi=lp64"], [])
++		         [grub_cv_target_cc_soft_float="-march=rv64imac_zicsr_zifencei -mabi=lp64"], [])
+     fi
+     if test "x$target_cpu" = xia64; then
+        CFLAGS="$TARGET_CFLAGS -mno-inline-float-divide -mno-inline-sqrt -Werror"
+-- 
+2.35.1
+
diff --git a/meta/recipes-bsp/grub/grub2.inc b/meta/recipes-bsp/grub/grub2.inc
index a3cfe82f010..313c9186096 100644
--- a/meta/recipes-bsp/grub/grub2.inc
+++ b/meta/recipes-bsp/grub/grub2.inc
@@ -21,6 +21,7 @@  SRC_URI = "${GNU_MIRROR}/grub/grub-${PV}.tar.gz \
            file://determinism.patch \
            file://0001-RISC-V-Restore-the-typcast-to-long.patch \
            file://CVE-2021-3981-grub-mkconfig-Restore-umask-for-the-grub.cfg.patch \
+           file://0001-configure.ac-Use-_zicsr_zifencei-extentions-on-riscv.patch \
 "
 
 SRC_URI[sha256sum] = "23b64b4c741569f9426ed2e3d0e6780796fca081bee4c99f62aa3f53ae803f5f"