Message ID | 20220303091144.473704-1-peter.hoyes@arm.com |
---|---|
State | New |
Headers | show |
Series | [1/2] arm-bsp/docs: Improve fvp-baser-aemv864 limitation | expand |
On 03/03/2022 09:11, Peter Hoyes wrote: > From: Peter Hoyes <Peter.Hoyes@arm.com> > > Add more details about the cache_state_modelled limitation, which can > be worked around by setting cci400.force_on_from_start=1 > > Issue-Id: SCM-3871 > Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> > Change-Id: Idde23278a87316dae842c6c3793b9836482e8c3a > --- > meta-arm-bsp/documentation/fvp-baser-aemv8r64.md | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/meta-arm-bsp/documentation/fvp-baser-aemv8r64.md b/meta-arm-bsp/documentation/fvp-baser-aemv8r64.md > index 85fabe5..44c755e 100644 > --- a/meta-arm-bsp/documentation/fvp-baser-aemv8r64.md > +++ b/meta-arm-bsp/documentation/fvp-baser-aemv8r64.md > @@ -217,8 +217,11 @@ Known Issues and Limitations > - Only PSCI CPU\_ON and CPU\_OFF functions are supported > - Linux kernel does not support booting from secure EL2 on Armv8-R AArch64 > - Linux KVM does not support Armv8-R AArch64 > -- Enabling the FVP parameter `cache_state_modelled` is incompatible with virtio > - devices > +- Device DMA memory cache-coherence issue: the FVP cache_state_modelled > + parameter will affect the cache coherence behavior of peripherals’ DMA. When > + users set cache_state_modelled=1, they also have to set > + cci400.force_on_from_start=1 to force the FVP to enable snooping on upstream > + ports. > > Change Log > ---------- Please can this patch chain also be merged into honister Regards, Peter
On Thu, 3 Mar 2022 09:11:43 +0000, Peter Hoyes wrote: > Add more details about the cache_state_modelled limitation, which can > be worked around by setting cci400.force_on_from_start=1 Applied, thanks! [1/2] arm-bsp/docs: Improve fvp-baser-aemv864 limitation commit: 1bc6bf2750243dcc9fb4c4ce22590a11c825b167 [2/2] arm/fvp-base-r-aem: Update to version 11.17.21 commit: dcf114723e38d4413d6c9c0f701114decb0c18cd Best regards,
diff --git a/meta-arm-bsp/documentation/fvp-baser-aemv8r64.md b/meta-arm-bsp/documentation/fvp-baser-aemv8r64.md index 85fabe5..44c755e 100644 --- a/meta-arm-bsp/documentation/fvp-baser-aemv8r64.md +++ b/meta-arm-bsp/documentation/fvp-baser-aemv8r64.md @@ -217,8 +217,11 @@ Known Issues and Limitations - Only PSCI CPU\_ON and CPU\_OFF functions are supported - Linux kernel does not support booting from secure EL2 on Armv8-R AArch64 - Linux KVM does not support Armv8-R AArch64 -- Enabling the FVP parameter `cache_state_modelled` is incompatible with virtio - devices +- Device DMA memory cache-coherence issue: the FVP cache_state_modelled + parameter will affect the cache coherence behavior of peripherals’ DMA. When + users set cache_state_modelled=1, they also have to set + cci400.force_on_from_start=1 to force the FVP to enable snooping on upstream + ports. Change Log ----------