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[76.209.242.28]) by smtp.gmail.com with ESMTPSA id q19sm5103175pgb.77.2021.12.16.03.49.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Dec 2021 03:49:05 -0800 (PST) From: Matt Madison To: openembedded-core@lists.openembedded.org Cc: Alexander Kanavin , Khem Raj , Richard Purdie , Matt Madison Subject: [OE-core][PATCH v2 2/2] qemu: add patch to set minimum kernel version for riscv32 Date: Thu, 16 Dec 2021 03:48:36 -0800 Message-Id: <20211216114836.964835-3-matt@madison.systems> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211216114836.964835-1-matt@madison.systems> References: <20211216114836.964835-1-matt@madison.systems> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Thu, 16 Dec 2021 11:49:15 -0000 X-Groupsio-URL: https://lists.openembedded.org/g/openembedded-core/message/159783 which enables us to drop the -r option on qemu-static-riscv32 invocations. Signed-off-by: Matt Madison --- meta/recipes-devtools/qemu/qemu.inc | 1 + ...s-minimum-kernel-version-for-riscv32.patch | 40 +++++++++++++++++++ 2 files changed, 41 insertions(+) create mode 100644 meta/recipes-devtools/qemu/qemu/0001-riscv-Set-5.4-as-minimum-kernel-version-for-riscv32.patch diff --git a/meta/recipes-devtools/qemu/qemu.inc b/meta/recipes-devtools/qemu/qemu.inc index fe35f94acf..584c9482e9 100644 --- a/meta/recipes-devtools/qemu/qemu.inc +++ b/meta/recipes-devtools/qemu/qemu.inc @@ -27,6 +27,7 @@ SRC_URI = "https://download.qemu.org/${BPN}-${PV}.tar.xz \ file://determinism.patch \ file://0001-tests-meson.build-use-relative-path-to-refer-to-file.patch \ file://0001-linux-user-Replace-__u64-with-uint64_t.patch \ + file://0001-riscv-Set-5.4-as-minimum-kernel-version-for-riscv32.patch \ " UPSTREAM_CHECK_REGEX = "qemu-(?P\d+(\.\d+)+)\.tar" diff --git a/meta/recipes-devtools/qemu/qemu/0001-riscv-Set-5.4-as-minimum-kernel-version-for-riscv32.patch b/meta/recipes-devtools/qemu/qemu/0001-riscv-Set-5.4-as-minimum-kernel-version-for-riscv32.patch new file mode 100644 index 0000000000..ac4b6dcc44 --- /dev/null +++ b/meta/recipes-devtools/qemu/qemu/0001-riscv-Set-5.4-as-minimum-kernel-version-for-riscv32.patch @@ -0,0 +1,40 @@ +From 359dc12eb32b2395cf10796157002024e6a58054 Mon Sep 17 00:00:00 2001 +From: Khem Raj +Date: Wed, 15 Dec 2021 23:31:11 -0800 +Subject: [PATCH] riscv: Set 5.4 as minimum kernel version for riscv32 + +5.4 is first stable API as far as rv32 is concerned see [1] + +[1] https://sourceware.org/git/?p=glibc.git;a=commit;h=7a55dd3fb6d2c307a002a16776be84310b9c8989 + +Upstream-Status: Submitted [https://lists.nongnu.org/archive/html/qemu-devel/2021-12/msg02495.html] + +Signed-off-by: Khem Raj +Cc: Palmer Dabbelt +Cc: Alistair Francis +Cc: Bin Meng +Signed-off-by: Matt Madison +--- + linux-user/riscv/target_syscall.h | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/linux-user/riscv/target_syscall.h b/linux-user/riscv/target_syscall.h +index dc597c897..9b1316132 100644 +--- a/linux-user/riscv/target_syscall.h ++++ b/linux-user/riscv/target_syscall.h +@@ -45,10 +45,11 @@ struct target_pt_regs { + + #ifdef TARGET_RISCV32 + #define UNAME_MACHINE "riscv32" ++#define UNAME_MINIMUM_RELEASE "5.4.0" + #else + #define UNAME_MACHINE "riscv64" +-#endif + #define UNAME_MINIMUM_RELEASE "4.15.0" ++#endif + + #define TARGET_MINSIGSTKSZ 2048 + #define TARGET_MCL_CURRENT 1 +-- +2.32.0 +