Message ID | 20231213115041.1417809-1-harsimransingh.tungal@arm.com |
---|---|
Headers | show |
Series | arm-bsp/tftf:corstone1000: Fix tftf tests on mps3 | expand |
On Wed, 13 Dec 2023 11:50:40 +0000, harsimransingh.tungal@arm.com wrote: > From: Harsimran Singh Tungal <harsimransingh.tungal@arm.com> > > The tftf tests were getting crashed on the MPS3 and two issues were found > during investigation. This change set provide fix for those issues: > > > The tftf tests were getting crashed on the MPS3 when compiled with > LOG_LEVEL=50. So, reducing the log level and aligning it with the TF-A > allows us to get rid of the crash. > > [...] Applied, thanks! [1/1] corstone1000:arm-bsp/tftf: Fix tftf tests on mps3 commit: 4d22f982bce8dff6f8c4d11845c47a4d39f961c6 Best regards,
From: Harsimran Singh Tungal <harsimransingh.tungal@arm.com> The tftf tests were getting crashed on the MPS3 and two issues were found during investigation. This change set provide fix for those issues: The tftf tests were getting crashed on the MPS3 when compiled with LOG_LEVEL=50. So, reducing the log level and aligning it with the TF-A allows us to get rid of the crash. Once the above crash got resolved, it has been found that tftf tests were getting asserted while reading the value of the register GICD_ITARGETSR. The reason for the crash is that the value of this register is zero. As per the GIC documentation, this register is RAZ/WI for uniprocessor implementation and corstone1000 is uniprocessor implementation for FPGA. So, this change compiles the tftf tests in release mode which allows us to compile out the assert definitions. Harsimran Singh Tungal (1): corstone1000:arm-bsp/tftf: Fix tftf tests on mps3 .../recipes-bsp/trusted-firmware-a/tf-a-tests_%.bbappend | 3 +++ .../recipes-bsp/trusted-firmware-a/tf-a-tests_2.8.0.bb | 5 ++++- 2 files changed, 7 insertions(+), 1 deletion(-)