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Fri, 21 Jan 2022 11:57:05 +0000 From: Arunachalam Ganapathy To: meta-arm@lists.yoctoproject.org CC: nd@arm.com, Arunachalam Ganapathy Subject: [PATCH 3/3] arm/u-boot: add patch to support higher DRAM on TC Date: Fri, 21 Jan 2022 11:56:43 +0000 Message-ID: <20220121115643.485616-3-arunachalam.ganapathy@arm.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220121115643.485616-1-arunachalam.ganapathy@arm.com> References: <20220121115643.485616-1-arunachalam.ganapathy@arm.com> X-ClientProxiedBy: LO2P265CA0028.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:61::16) To PAXPR08MB6766.eurprd08.prod.outlook.com (2603:10a6:102:136::18) MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: 0e0658a0-4acc-4626-9030-08d9dcd553ae X-MS-TrafficTypeDiagnostic: AM0PR08MB3075:EE_|AM5EUR03FT010:EE_|AM8PR08MB5700:EE_ X-Microsoft-Antispam-PRVS: x-checkrecipientrouted: true NoDisclaimer: true X-MS-Oob-TLC-OOBClassifiers: OLM:37;OLM:37; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jan 2022 11:58:23.9104 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0e0658a0-4acc-4626-9030-08d9dcd553ae X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT010.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR08MB5700 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Fri, 21 Jan 2022 11:58:32 -0000 X-Groupsio-URL: https://lists.yoctoproject.org/g/meta-arm/message/2889 Signed-off-by: Arunachalam Ganapathy Change-Id: Ifbf9e73a0e1134d1a0ecce036c9ba53fe7d5b1bf --- ...m-total_compute-increase-DRAM-to-8GB.patch | 47 +++++++++++++++++++ .../recipes-bsp/u-boot/u-boot_%.bbappend | 5 +- 2 files changed, 51 insertions(+), 1 deletion(-) create mode 100644 meta-arm-bsp/recipes-bsp/u-boot/u-boot/tc/0001-arm-total_compute-increase-DRAM-to-8GB.patch diff --git a/meta-arm-bsp/recipes-bsp/u-boot/u-boot/tc/0001-arm-total_compute-increase-DRAM-to-8GB.patch b/meta-arm-bsp/recipes-bsp/u-boot/u-boot/tc/0001-arm-total_compute-increase-DRAM-to-8GB.patch new file mode 100644 index 0000000..d1cfcdb --- /dev/null +++ b/meta-arm-bsp/recipes-bsp/u-boot/u-boot/tc/0001-arm-total_compute-increase-DRAM-to-8GB.patch @@ -0,0 +1,47 @@ +From bdb7de7cdef6ece51dfcee927d3ce0c97fc431f0 Mon Sep 17 00:00:00 2001 +From: Usama Arif +Date: Tue, 12 Oct 2021 13:43:16 +0100 +Subject: [PATCH] arm: total_compute: increase DRAM to 8GB + +The extra 6GB start at 0x8080000000. + +Signed-off-by: Usama Arif + +Upstream-Status: Backport [https://github.com/u-boot/u-boot/commit/b20b16a794b073807ef8d6840772a92788b3e226] +Signed-off-by: Arunachalam Ganapathy +--- + board/armltd/total_compute/total_compute.c | 3 +++ + include/configs/total_compute.h | 3 +++ + 2 files changed, 6 insertions(+) + +diff --git a/board/armltd/total_compute/total_compute.c b/board/armltd/total_compute/total_compute.c +index b7eaab0851..b7772f79a3 100644 +--- a/board/armltd/total_compute/total_compute.c ++++ b/board/armltd/total_compute/total_compute.c +@@ -59,6 +59,9 @@ int dram_init_banksize(void) + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + ++ gd->bd->bi_dram[1].start = PHYS_SDRAM_2; ++ gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; ++ + return 0; + } + +diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h +index cc93f1930a..283268607a 100644 +--- a/include/configs/total_compute.h ++++ b/include/configs/total_compute.h +@@ -34,6 +34,9 @@ + #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE + #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 + ++#define PHYS_SDRAM_2 0x8080000000 ++#define PHYS_SDRAM_2_SIZE 0x180000000 ++ + #define CONFIG_ARM_PL180_MMCI_BASE 0x001c050000 + #define CONFIG_SYS_MMC_MAX_BLK_COUNT 127 + #define CONFIG_ARM_PL180_MMCI_CLOCK_FREQ 12000000 +-- +2.30.2 + diff --git a/meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend b/meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend index 5a927ba..a0709dd 100644 --- a/meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend +++ b/meta-arm-bsp/recipes-bsp/u-boot/u-boot_%.bbappend @@ -77,4 +77,7 @@ SRC_URI:append:fvp-base-arm32 = " file://0001-Add-vexpress_aemv8a_aarch32-varian # # TC0 and TC1 MACHINES # -SRC_URI:append:tc = " file://bootargs.cfg" +SRC_URI:append:tc = " \ + file://bootargs.cfg \ + file://0001-arm-total_compute-increase-DRAM-to-8GB.patch \ + "