[meta-arm,2/2] arm-bsp/scp-firmware: Update SHA for tc0

Submitted by Usama Arif on Oct. 13, 2020, 11:18 a.m. | Patch ID: 177182

Details

Message ID 20201013111812.52597-2-usama.arif@arm.com
State New
Headers show

Commit Message

Usama Arif Oct. 13, 2020, 11:18 a.m.
This SHA includes the architecture changes introduced as
including switching Cortex M7 to M3 as well as memory and
interrupt map changes. The SRC_URI is also overwritten as
the patch
0001-tools-gen_module_code-atomically-rewrite-the-generat.patch
has already been merged applied in the base recipe has
already been merge in this SHA.

Change-Id: I85dc6b65390249673415789ec110aae74ba3b5af
Signed-off-by: Usama Arif <usama.arif@arm.com>
---
 meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware-tc0.inc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

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diff --git a/meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware-tc0.inc b/meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware-tc0.inc
index a04f729..013bbf9 100644
--- a/meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware-tc0.inc
+++ b/meta-arm-bsp/recipes-bsp/scp-firmware/scp-firmware-tc0.inc
@@ -1,7 +1,8 @@ 
 # TC0 specific SCP configuration
 
 # Intermediate SHA with 2.6 baseline version
-SRCREV = "fd7c83561a7d76c7681d5d017fb23aa3664c028c"
+SRC_URI = "gitsm://github.com/ARM-software/SCP-firmware.git;protocol=https"
+SRCREV = "6fad1d3e2f82b2ef51e55928ac3a678a75f64ef4"
 
 COMPATIBLE_MACHINE = "tc0"