[meta-arm,4/7] arm-bsp: Add cortexm tunes

Submitted by Jon Mason on Oct. 2, 2020, 2:04 p.m. | Patch ID: 176943

Details

Message ID 20201002140405.7896-4-jon.mason@arm.com
State New
Headers show

Commit Message

Jon Mason Oct. 2, 2020, 2:04 p.m.
Until accepted into oe-core, add the cortex-m tunes here so that they
can be used in meta-arm-bsp.

Change-Id: Iaa74937da61cd8d35c27beae7e09351e996a262e
Signed-off-by: Jon Mason <jon.mason@arm.com>
---
 .../conf/machine/include/arm/arch-armv6m.inc  | 19 ++++++++++++
 .../conf/machine/include/arm/arch-armv7em.inc | 18 +++++++++++
 .../conf/machine/include/arm/arch-armv7m.inc  | 30 +++++++++++++++++++
 .../include/arm/arch-armv8-1m-main.inc        | 19 ++++++++++++
 .../machine/include/arm/arch-armv8m-base.inc  | 18 +++++++++++
 .../machine/include/arm/arch-armv8m-main.inc  | 19 ++++++++++++
 .../conf/machine/include/tune-cortexm0.inc    | 14 +++++++++
 .../machine/include/tune-cortexm0plus.inc     | 14 +++++++++
 .../conf/machine/include/tune-cortexm1.inc    | 15 ++++++++++
 .../conf/machine/include/tune-cortexm23.inc   | 15 ++++++++++
 .../conf/machine/include/tune-cortexm3.inc    | 15 ++++++++++
 .../conf/machine/include/tune-cortexm33.inc   | 15 ++++++++++
 .../conf/machine/include/tune-cortexm35p.inc  | 15 ++++++++++
 .../conf/machine/include/tune-cortexm4.inc    | 15 ++++++++++
 .../conf/machine/include/tune-cortexm55.inc   | 15 ++++++++++
 .../conf/machine/include/tune-cortexm7.inc    | 15 ++++++++++
 16 files changed, 271 insertions(+)
 create mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv6m.inc
 create mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv7em.inc
 create mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv7m.inc
 create mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv8-1m-main.inc
 create mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv8m-base.inc
 create mode 100755 meta-arm-bsp/conf/machine/include/arm/arch-armv8m-main.inc
 create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm0.inc
 create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm0plus.inc
 create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm1.inc
 create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm23.inc
 create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm3.inc
 create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm33.inc
 create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm35p.inc
 create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm4.inc
 create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm55.inc
 create mode 100755 meta-arm-bsp/conf/machine/include/tune-cortexm7.inc

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diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv6m.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv6m.inc
new file mode 100755
index 0000000..739550d
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/arch-armv6m.inc
@@ -0,0 +1,19 @@ 
+# Tuning for ARMV6-m defined in ARM v6-M ArchitectureReference Manual
+# at https://static.docs.arm.com/ddi0419/d/DDI0419D_armv6m_arm.pdf
+DEFAULTTUNE ?= "armv6m"
+
+TUNEVALID[armv6m] = "Enable instructions for ARMv6-m"
+TUNECONFLICTS[armv6m] = "armv4 armv5 armv6 armv7a"
+
+# Use armv6s-m instead of armv6-m to avoid gcc bug "SVC is not permitted on this architecture".
+# SVC is a valid instruction.
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv6m', ' -march=armv6s-m', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv6m', 'armv6m:', '', d)}"
+
+require conf/machine/include/arm/arch-armv5.inc
+
+# Little Endian
+AVAILTUNES += "armv6m"
+ARMPKGARCH_tune-armv6m             = "armv6m"
+TUNE_FEATURES_tune-armv6m          = "armv6m"
+PACKAGE_EXTRA_ARCHS_tune-armv6m    = "armv6m"
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv7em.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv7em.inc
new file mode 100755
index 0000000..4f21c6a
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/arch-armv7em.inc
@@ -0,0 +1,18 @@ 
+#
+# Defaults for ARMv7e-m
+#
+DEFAULTTUNE ?= "armv7em"
+
+TUNEVALID[armv7em] = "Enable instructions for ARMv7e-m"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv7em', ' -march=armv7e-m', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv7em', 'armv7em:', '', d)}"
+
+TUNECONFLICTS[armv7em] = "armv4 armv5 armv6 armv7a"
+
+require conf/machine/include/arm/arch-armv7m.inc
+
+
+AVAILTUNES                            += "armv7em"
+ARMPKGARCH_tune-armv7em                = "armv7em"
+TUNE_FEATURES_tune-armv7em             = "armv7em"
+PACKAGE_EXTRA_ARCHS_tune-armv7em       = "armv7em"
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv7m.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv7m.inc
new file mode 100755
index 0000000..af82e6c
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/arch-armv7m.inc
@@ -0,0 +1,30 @@ 
+#
+# Tune Settings for Cortex-M3
+#
+TUNEVALID[cortexm3] = "Enable Cortex-M3 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm3', ' -mcpu=cortex-m3', '', d)}"
+
+
+AVAILTUNES                            += "cortexm3"
+ARMPKGARCH_tune-cortexm3               = "cortexm3"
+TUNE_FEATURES_tune-cortexm3            = "${TUNE_FEATURES_tune-armv7m} cortexm3"
+PACKAGE_EXTRA_ARCHS_tune-cortexm3      = "${PACKAGE_EXTRA_ARCHS_tune-armv7m} cortexm3"
+
+#
+# Defaults for ARMv7-m
+#
+DEFAULTTUNE ?= "armv7m"
+
+TUNEVALID[armv7m] = "Enable instructions for ARMv7-m"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv7m', ' -march=armv7-m', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv7m', 'armv7m:', '', d)}"
+
+TUNECONFLICTS[armv7m] = "armv4 armv5 armv6 armv7a"
+
+require conf/machine/include/arm/arch-armv6m.inc
+
+
+AVAILTUNES                            += "armv7m"
+ARMPKGARCH_tune-armv7m                 = "armv7m"
+TUNE_FEATURES_tune-armv7m              = "armv7m"
+PACKAGE_EXTRA_ARCHS_tune-armv7m        = "armv7m"
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv8-1m-main.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv8-1m-main.inc
new file mode 100755
index 0000000..505897a
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/arch-armv8-1m-main.inc
@@ -0,0 +1,19 @@ 
+#
+#
+# Defaults for ARMv8.1-M.main
+#
+DEFAULTTUNE ?= "armv8-1m-main"
+
+TUNEVALID[armv8-1m-main] = "Enable instructions for ARMv8.1-m.main"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8-1m-main', ' -march=armv8.1-m.main', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv8-1m-main', 'armv8-1m-main:', '', d)}"
+
+TUNECONFLICTS[armv8-1m-main] = "armv4 armv5 armv6 armv7a"
+
+require conf/machine/include/arm/arch-armv8m-main.inc
+
+
+AVAILTUNES                            += "armv8-1m-main"
+ARMPKGARCH_tune-armv8-1m-main          = "armv8-1m-main"
+TUNE_FEATURES_tune-armv8-1m-main       = "armv8-1m-main"
+PACKAGE_EXTRA_ARCHS_tune-armv8-1m-main = "armv8-1m-main"
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-base.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-base.inc
new file mode 100755
index 0000000..5df1728
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-base.inc
@@ -0,0 +1,18 @@ 
+#
+# Defaults for ARMv8-m.base
+#
+DEFAULTTUNE ?= "armv8m-base"
+
+TUNEVALID[armv8m-base] = "Enable instructions for ARMv8-m.base"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8m-base', ' -march=armv8-m.base', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv8m-base', 'armv8m-base:', '', d)}"
+
+TUNECONFLICTS[armv8m-base] = "armv4 armv5 armv6 armv7a"
+
+require conf/machine/include/arm/arch-armv7m.inc
+
+
+AVAILTUNES                          += "armv8m-base"
+ARMPKGARCH_tune-armv8m-base          = "armv8m-base"
+TUNE_FEATURES_tune-armv8m-base       = "armv8m-base"
+PACKAGE_EXTRA_ARCHS_tune-armv8m-base = "armv8m-base"
diff --git a/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-main.inc b/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-main.inc
new file mode 100755
index 0000000..a03c01c
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/arm/arch-armv8m-main.inc
@@ -0,0 +1,19 @@ 
+#
+#
+# Defaults for ARMv8-M.main
+#
+DEFAULTTUNE ?= "armv8m-main"
+
+TUNEVALID[armv8m-main] = "Enable instructions for ARMv8-m.main"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8m-main', ' -march=armv8-m.main', '', d)}"
+MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv8m-main', 'armv8m-main:', '', d)}"
+
+TUNECONFLICTS[armv8m-main] = "armv4 armv5 armv6 armv7a"
+
+require conf/machine/include/arm/arch-armv8m-base.inc
+
+
+AVAILTUNES                          += "armv8m-main"
+ARMPKGARCH_tune-armv8m-main          = "armv8m-main"
+TUNE_FEATURES_tune-armv8m-main       = "armv8m-main"
+PACKAGE_EXTRA_ARCHS_tune-armv8m-main = "armv8m-main"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm0.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm0.inc
new file mode 100755
index 0000000..7849ff6
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm0.inc
@@ -0,0 +1,14 @@ 
+#
+# Tune Settings for Cortex-M0
+#
+DEFAULTTUNE ?= "cortexm0"
+
+TUNEVALID[cortexm0] = "Enable Cortex-M0 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm0', ' -mcpu=cortex-m0', '', d)}"
+
+require conf/machine/include/arm/arch-armv6m.inc
+
+AVAILTUNES                            += "cortexm0"
+ARMPKGARCH_tune-cortexm0               = "cortexm0"
+TUNE_FEATURES_tune-cortexm0            = "${TUNE_FEATURES_tune-armv6m} cortexm0"
+PACKAGE_EXTRA_ARCHS_tune-cortexm0      = "${PACKAGE_EXTRA_ARCHS_tune-armv6m} cortexm0"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm0plus.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm0plus.inc
new file mode 100755
index 0000000..83f8cac
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm0plus.inc
@@ -0,0 +1,14 @@ 
+#
+# Tune Settings for Cortex-M0+
+#
+DEFAULTTUNE ?= "cortexm0-plus"
+
+TUNEVALID[cortexm0-plus] = "Enable Cortex-M0 Plus specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm0-plus', ' -mcpu=cortex-m0plus', '', d)}"
+
+require conf/machine/include/arm/arch-armv6m.inc
+
+AVAILTUNES                            += "cortexm0-plus"
+ARMPKGARCH_tune-cortexm0-plus          = "cortexm0-plus"
+TUNE_FEATURES_tune-cortexm0-plus       = "${TUNE_FEATURES_tune-armv6m} cortexm0-plus"
+PACKAGE_EXTRA_ARCHS_tune-cortexm0-plus = "${PACKAGE_EXTRA_ARCHS_tune-armv6m} cortexm0-plus"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm1.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm1.inc
new file mode 100755
index 0000000..0bcdbe2
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm1.inc
@@ -0,0 +1,15 @@ 
+#
+# Tune Settings for Cortex-M1
+#
+DEFAULTTUNE ?= "cortexm1"
+
+TUNEVALID[cortexm1] = "Enable Cortex-M1 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm1', ' -mcpu=cortex-m1', '', d)}"
+
+require conf/machine/include/arm/arch-armv6m.inc
+
+
+AVAILTUNES                            += "cortexm1"
+ARMPKGARCH_tune-cortexm1               = "cortexm1"
+TUNE_FEATURES_tune-cortexm1            = "${TUNE_FEATURES_tune-armv6m} cortexm1"
+PACKAGE_EXTRA_ARCHS_tune-cortexm1      = "${PACKAGE_EXTRA_ARCHS_tune-armv6m} cortexm1"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm23.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm23.inc
new file mode 100755
index 0000000..12d4c14
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm23.inc
@@ -0,0 +1,15 @@ 
+#
+# Tune Settings for Cortex-M23
+#
+DEFAULTTUNE ?= "cortexm23"
+
+TUNEVALID[cortexm23] = "Enable Cortex-M23 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm23', ' -mcpu=cortex-m23', '', d)}"
+
+require conf/machine/include/arm/arch-armv8m-base.inc
+
+
+AVAILTUNES                          += "cortexm23"
+ARMPKGARCH_tune-cortexm23            = "cortexm23"
+TUNE_FEATURES_tune-cortexm23         = "${TUNE_FEATURES_tune-armv8m-base} cortexm23"
+PACKAGE_EXTRA_ARCHS_tune-cortexm23   = "${PACKAGE_EXTRA_ARCHS_tune-armv8m-base} cortexm23"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm3.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm3.inc
new file mode 100755
index 0000000..605c9a7
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm3.inc
@@ -0,0 +1,15 @@ 
+#
+# Tune Settings for Cortex-M3
+#
+DEFAULTTUNE ?= "cortexm3"
+
+TUNEVALID[cortexm3] = "Enable Cortex-M3 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm3', ' -mcpu=cortex-m3', '', d)}"
+
+require conf/machine/include/arm/arch-armv7m.inc
+
+
+AVAILTUNES                            += "cortexm3"
+ARMPKGARCH_tune-cortexm3               = "cortexm3"
+TUNE_FEATURES_tune-cortexm3            = "${TUNE_FEATURES_tune-armv7m} cortexm3"
+PACKAGE_EXTRA_ARCHS_tune-cortexm3      = "${PACKAGE_EXTRA_ARCHS_tune-armv7m} cortexm3"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm33.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm33.inc
new file mode 100755
index 0000000..d9c88aa
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm33.inc
@@ -0,0 +1,15 @@ 
+#
+# Tune Settings for Cortex-M33
+#
+DEFAULTTUNE ?= "armv8m"
+
+TUNEVALID[armv8m] = "Enable instructions for ARMv8-m"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8m', ' -march=armv7-m', '', d)}"
+
+require conf/machine/include/arm/arch-armv8m-main.inc
+
+AVAILTUNES += "armv8m"
+ARMPKGARCH_tune-armv8m ?= "armv8m"
+TUNE_FEATURES_tune-armv8m = "armv8m"
+PACKAGE_EXTRA_ARCHS_tune-armv8m = "armv8m"
+
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm35p.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm35p.inc
new file mode 100755
index 0000000..562ee81
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm35p.inc
@@ -0,0 +1,15 @@ 
+#
+# Tune Settings for Cortex-M35P
+#
+DEFAULTTUNE ?= "cortexm33p"
+
+TUNEVALID[cortexm35p] = "Enable Cortex-M35p specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm35p', ' -mcpu=cortex-m35p', '', d)}"
+
+require conf/machine/include/arm/arch-armv8m-main.inc
+
+
+AVAILTUNES                          += "cortexm35p"
+ARMPKGARCH_tune-cortexm35p           = "cortexm35p"
+TUNE_FEATURES_tune-cortexm35p        = "${TUNE_FEATURES_tune-armv8m-main} cortexm35p"
+PACKAGE_EXTRA_ARCHS_tune-cortexm35p  = "${PACKAGE_EXTRA_ARCHS_tune-armv8m-main} cortexm35p"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm4.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm4.inc
new file mode 100755
index 0000000..74aa27c
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm4.inc
@@ -0,0 +1,15 @@ 
+#
+# Tune Settings for Cortex-M4
+#
+DEFAULTTUNE ?= "cortexm4"
+
+TUNEVALID[cortexm4] = "Enable Cortex-M4 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm4', ' -mcpu=cortex-m4', '', d)}"
+
+require conf/machine/include/arm/arch-armv7em.inc
+
+
+AVAILTUNES                            += "cortexm4"
+ARMPKGARCH_tune-cortexm4               = "cortexm4"
+TUNE_FEATURES_tune-cortexm4            = "${TUNE_FEATURES_tune-armv7em} cortexm4"
+PACKAGE_EXTRA_ARCHS_tune-cortexm4      = "${PACKAGE_EXTRA_ARCHS_tune-armv7em} cortexm4"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm55.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm55.inc
new file mode 100755
index 0000000..3f7f3d7
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm55.inc
@@ -0,0 +1,15 @@ 
+#
+# Tune Settings for Cortex-M55
+#
+DEFAULTTUNE ?= "cortexm55"
+
+TUNEVALID[cortexm55] = "Enable Cortex-M55 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm55', ' -mcpu=cortex-m55', '', d)}"
+
+require conf/machine/include/arm/arch-armv8-1m-main.inc
+
+
+AVAILTUNES                            += "cortexm55"
+ARMPKGARCH_tune-cortexm55              = "cortexm55"
+TUNE_FEATURES_tune-cortexm55           = "${TUNE_FEATURES_tune-armv8-1m-main} cortexm55"
+PACKAGE_EXTRA_ARCHS_tune-cortexm55     = "${PACKAGE_EXTRA_ARCHS_tune-armv8-1m-main} cortexm55"
diff --git a/meta-arm-bsp/conf/machine/include/tune-cortexm7.inc b/meta-arm-bsp/conf/machine/include/tune-cortexm7.inc
new file mode 100755
index 0000000..8409108
--- /dev/null
+++ b/meta-arm-bsp/conf/machine/include/tune-cortexm7.inc
@@ -0,0 +1,15 @@ 
+#
+# Tune Settings for Cortex-M7
+#
+DEFAULTTUNE ?= "cortexm7"
+
+TUNEVALID[cortexm7] = "Enable Cortex-M7 specific processor optimizations"
+TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm7', ' -mcpu=cortex-m7', '', d)}"
+
+require conf/machine/include/arm/arch-armv7em.inc
+
+
+AVAILTUNES                            += "cortexm7"
+ARMPKGARCH_tune-cortexm7               = "cortexm7"
+TUNE_FEATURES_tune-cortexm7            = "${TUNE_FEATURES_tune-armv7em} cortexm7"
+PACKAGE_EXTRA_ARCHS_tune-cortexm7      = "${PACKAGE_EXTRA_ARCHS_tune-armv7em} cortexm7"