Patchwork [PATCHv2] site: add alignment values for at-spi2-core

login
register
mail settings
Submitter Martin Jansa
Date June 5, 2013, 10:02 a.m.
Message ID <1370426553-23428-1-git-send-email-Martin.Jansa@gmail.com>
Download mbox | patch
Permalink /patch/51169/
State Accepted, archived
Headers show

Comments

Martin Jansa - June 5, 2013, 10:02 a.m.
* x86 and x86_64 values were added in
  8c46ec2edc0197b32d32e0f27d5b60271338b600

Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
---
 meta/site/arm-common   | 10 ++++++++++
 meta/site/x86_64-linux |  3 ++-
 2 files changed, 12 insertions(+), 1 deletion(-)
Ross Burton - June 11, 2013, 3:53 p.m.
On 5 June 2013 11:02, Martin Jansa <martin.jansa@gmail.com> wrote:
> * x86 and x86_64 values were added in
>   8c46ec2edc0197b32d32e0f27d5b60271338b600
>
> Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>

Signed-off-by: Ross Burton <ross.burton@intel.com>

Anyone got PPC or MIPS hardware to hand?

Ross

Patch

diff --git a/meta/site/arm-common b/meta/site/arm-common
index cad8027..b1cf05d 100644
--- a/meta/site/arm-common
+++ b/meta/site/arm-common
@@ -185,3 +185,13 @@  jm_cv_func_working_readdir=yes
 
 # evolution-data-server
 ac_cv_libiconv_utf8=${ac_cv_libiconv_utf8=yes}
+
+# dbind, in at-spi2-core
+ac_cv_alignof_char=1
+ac_cv_alignof_dbind_pointer=4
+ac_cv_alignof_dbind_struct=1
+ac_cv_alignof_dbus_bool_t=4
+ac_cv_alignof_dbus_int16_t=2
+ac_cv_alignof_dbus_int32_t=4
+ac_cv_alignof_dbus_int64_t=8
+ac_cv_alignof_double=8
diff --git a/meta/site/x86_64-linux b/meta/site/x86_64-linux
index 78a3b85..2475d3d 100644
--- a/meta/site/x86_64-linux
+++ b/meta/site/x86_64-linux
@@ -125,7 +125,8 @@  ac_cv_func__restgpr_14_x=no
 # cvs
 cvs_cv_func_printf_ptr=${cvs_cv_func_printf_ptr=yes}
 
-# dbind
+# dbind, in at-spi2-core
+ac_cv_alignof_char=1
 ac_cv_alignof_dbind_pointer=8
 ac_cv_alignof_dbind_struct=1
 ac_cv_alignof_dbus_bool_t=4