Patchwork [bugfix,1/1] mesa-xlib: workaround gcc 4.6.0 ICE

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Submitter Phil Blundell
Date May 27, 2011, 3:06 p.m.
Message ID <1306508804.2525.460.camel@phil-desktop>
Download mbox | patch
Permalink /patch/4905/
State New, archived
Headers show

Comments

Phil Blundell - May 27, 2011, 3:06 p.m.
On Fri, 2011-05-27 at 00:33 +0100, Richard Purdie wrote:
> I talked about this on IRC but simply put, no way.
> 
> The problem is:
> 
> a) Arm specific
> b) determined now to be armv7 specific
> c) gcc version specific
> 
> and the fix should reflect this.

From a fairly superficial look at the crash I suspect you probably want
something like:


It also looks like this could happen on ARMv6 as well, for what that's
worth, though I haven't tested to see whether it actually does or not.

p.
Nitin A Kamble - May 27, 2011, 5:13 p.m.
Phil,
  With your patch gcc 4.6.0 is not hitting the internal compiler error for this particular case. I could not do runtime testing as I don't have the hw. IMO This is a good patch to send to gcc upstream.

Thanks,
Nitin


> -----Original Message-----
> From: openembedded-core-bounces@lists.openembedded.org
> [mailto:openembedded-core-bounces@lists.openembedded.org] On Behalf Of
> Phil Blundell
> Sent: Friday, May 27, 2011 8:07 AM
> To: Patches and discussions about the oe-core layer
> Subject: Re: [OE-core] [bugfix 1/1] mesa-xlib: workaround gcc 4.6.0 ICE
> 
> On Fri, 2011-05-27 at 00:33 +0100, Richard Purdie wrote:
> > I talked about this on IRC but simply put, no way.
> >
> > The problem is:
> >
> > a) Arm specific
> > b) determined now to be armv7 specific
> > c) gcc version specific
> >
> > and the fix should reflect this.
> 
> From a fairly superficial look at the crash I suspect you probably want
> something like:
> 
> --- arm.md~	2011-05-27 15:18:31.916926254 +0100
> +++ arm.md	2011-05-27 15:31:57.331525688 +0100
> @@ -4213,7 +4213,9 @@
>     uxth%?\\t%0, %1
>     ldr%(h%)\\t%0, %1"
>    [(set_attr "type" "alu_shift,load_byte")
> -   (set_attr "predicable" "yes")]
> +   (set_attr "predicable" "yes")
> +   (set_attr "pool_range" "*,256")
> +   (set_attr "neg_pool_range" "*,244")]
>  )
> 
>  (define_insn "*arm_zero_extendhisi2addsi"
> 
> It also looks like this could happen on ARMv6 as well, for what that's
> worth, though I haven't tested to see whether it actually does or not.
> 
> p.
> 
> 
> 
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> Openembedded-core mailing list
> Openembedded-core@lists.openembedded.org
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Patch

--- arm.md~	2011-05-27 15:18:31.916926254 +0100
+++ arm.md	2011-05-27 15:31:57.331525688 +0100
@@ -4213,7 +4213,9 @@ 
    uxth%?\\t%0, %1
    ldr%(h%)\\t%0, %1"
   [(set_attr "type" "alu_shift,load_byte")
-   (set_attr "predicable" "yes")]
+   (set_attr "predicable" "yes")
+   (set_attr "pool_range" "*,256")
+   (set_attr "neg_pool_range" "*,244")]
 )
 
 (define_insn "*arm_zero_extendhisi2addsi"