Patchwork Warning - rev 3.0.0 kernel for i.MXDL causes kernel breakage on Wandboard (i.mx6 DL)

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Submitter John Weber
Date March 24, 2013, 4:22 p.m.
Message ID <514F2854.3050505@gmail.com>
Download mbox | patch
Permalink /patch/46805/
State Not Applicable
Delegated to: Otavio Salvador
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Comments

John Weber - March 24, 2013, 4:22 p.m.
I've been working with the rev 1.1.0 kernel (3.0.35) with no problems.  Recent 
merge

http://git.yoctoproject.org/cgit/cgit.cgi/meta-fsl-arm/commit/recipes-kernel/linux/linux-imx_3.0.35.bb?id=33cecc59c6e552a5cc79517e5a80815b18479db9

added SRCREV_mx6dl which moved the Wandboard kernel to rev 3.0.0, which I 
suppose is the one Freescale is using for the Dual Lite.

Now, I'm getting an error during kernel boot during a call to 
regulator_set_voltage():

[<80269c4c>] (regulator_set_voltage+0x8/0xdc) from [<800609c8>] (set_cpu_freq+0x
12c/0x21c)
[<800609c8>] (set_cpu_freq+0x12c/0x21c) from [<80060cd0>] (mxc_set_target+0xf4/0
x220)
[<80060cd0>] (mxc_set_target+0xf4/0x220) from [<8036c0d4>] (__cpufreq_driver_tar
get+0x4c/0x60)
[<8036c0d4>] (__cpufreq_driver_target+0x4c/0x60) from [<803708b0>] (cpufreq_inte
ractive_freq_down+0xf8/0x12c)
[<803708b0>] (cpufreq_interactive_freq_down+0xf8/0x12c) from [<80084854>] (proce
ss_one_work+0x110/0x39c)
[<80084854>] (process_one_work+0x110/0x39c) from [<80084de4>] (worker_thread+0x1
38/0x2f4)
[<80084de4>] (worker_thread+0x138/0x2f4) from [<80089600>] (kthread+0x80/0x88)

Questions - what are the differences between rev 3.0.0 and 1.1.0?
Why are there two separate branches?  Will they be merged eventually so that we 
don't have to work with two?

As far as I can tell, the differences are fairly minimal.  Focusing on anything 
that might be related to the DVFS or regulators, here are the differences:

(- is the rev 1.1.0 kernel, + is rev 3.0.0 kernel)
Otavio Salvador - March 24, 2013, 7:39 p.m.
On Sun, Mar 24, 2013 at 1:22 PM, John Weber <rjohnweber@gmail.com> wrote:
> I've been working with the rev 1.1.0 kernel (3.0.35) with no problems.
> Recent merge
>
> http://git.yoctoproject.org/cgit/cgit.cgi/meta-fsl-arm/commit/recipes-kernel/linux/linux-imx_3.0.35.bb?id=33cecc59c6e552a5cc79517e5a80815b18479db9
>
> added SRCREV_mx6dl which moved the Wandboard kernel to rev 3.0.0, which I
> suppose is the one Freescale is using for the Dual Lite.

Yes, correct.

> Now, I'm getting an error during kernel boot during a call to
> regulator_set_voltage():
>
> [<80269c4c>] (regulator_set_voltage+0x8/0xdc) from [<800609c8>]
> (set_cpu_freq+0x
> 12c/0x21c)
> [<800609c8>] (set_cpu_freq+0x12c/0x21c) from [<80060cd0>]
> (mxc_set_target+0xf4/0
> x220)
> [<80060cd0>] (mxc_set_target+0xf4/0x220) from [<8036c0d4>]
> (__cpufreq_driver_tar
> get+0x4c/0x60)
> [<8036c0d4>] (__cpufreq_driver_target+0x4c/0x60) from [<803708b0>]
> (cpufreq_inte
> ractive_freq_down+0xf8/0x12c)
> [<803708b0>] (cpufreq_interactive_freq_down+0xf8/0x12c) from [<80084854>]
> (proce
> ss_one_work+0x110/0x39c)
> [<80084854>] (process_one_work+0x110/0x39c) from [<80084de4>]
> (worker_thread+0x1
> 38/0x2f4)
> [<80084de4>] (worker_thread+0x138/0x2f4) from [<80089600>]
> (kthread+0x80/0x88)
>
> Questions - what are the differences between rev 3.0.0 and 1.1.0?

Mainly SoC specific changes.

> Why are there two separate branches?  Will they be merged eventually so that
> we don't have to work with two?

I hope in future they do but not sure.

> As far as I can tell, the differences are fairly minimal.  Focusing on
> anything that might be related to the DVFS or regulators, here are the
> differences:
>
> (- is the rev 1.1.0 kernel, + is rev 3.0.0 kernel)
>
> diff --git a/arch/arm/mach-mx6/cpu_op-mx6.c b/arch/arm/mach-mx6/cpu_op-mx6.c
> index e6ef026..028e876 100644
> --- a/arch/arm/mach-mx6/cpu_op-mx6.c
> +++ b/arch/arm/mach-mx6/cpu_op-mx6.c
> @@ -153,8 +153,8 @@ static struct cpu_op mx6dl_cpu_op_1_2G[] = {
>          .pll_rate = 1200000000,
>          .cpu_rate = 1200000000,
>          .cpu_podf = 0,
> -        .pu_voltage = 1275000,
> -        .soc_voltage = 1275000,
> +        .pu_voltage = 1175000,
> +        .soc_voltage = 1175000,
>          .cpu_voltage = 1275000,},
>         {
>          .pll_rate = 792000000,
> @@ -177,9 +177,9 @@ static struct cpu_op mx6dl_cpu_op_1G[] = {
>          .pll_rate = 996000000,
>          .cpu_rate = 996000000,
>          .cpu_podf = 0,
> -        .pu_voltage = 1275000,
> -        .soc_voltage = 1275000,
> -        .cpu_voltage = 1275000,},
> +        .pu_voltage = 1175000,
> +        .soc_voltage = 1175000,
> +        .cpu_voltage = 1250000,},
>         {
>          .pll_rate = 792000000,
>          .cpu_rate = 792000000,
> diff --git a/arch/arm/mach-mx6/system.c b/arch/arm/mach-mx6/system.c
> index 6ecd51e..6d24f22 100644
> --- a/arch/arm/mach-mx6/system.c
> +++ b/arch/arm/mach-mx6/system.c
> @@ -157,7 +157,7 @@ void mxc_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
>                    * The PUPSCR should include the time it takes for the ARM
> LDO to
>                    * ramp up.
>                    */
> -               __raw_writel(0x202, gpc_base + GPC_PGC_CPU_PUPSCR_OFFSET);
> +               __raw_writel(0xf0f, gpc_base + GPC_PGC_CPU_PUPSCR_OFFSET);
>                 /* The PDNSCR is a counter that counts in IPG_CLK cycles.
> This counter
>                   * can be set to minimum values to power down faster.
>                   */

You may try to isolate the need rework so you can use the kernel
version recommended by FSL?

--
Otavio Salvador                             O.S. Systems
E-mail: otavio@ossystems.com.br  http://www.ossystems.com.br
Mobile: +55 53 9981-7854              http://projetos.ossystems.com.br

Patch

diff --git a/arch/arm/mach-mx6/cpu_op-mx6.c b/arch/arm/mach-mx6/cpu_op-mx6.c
index e6ef026..028e876 100644
--- a/arch/arm/mach-mx6/cpu_op-mx6.c
+++ b/arch/arm/mach-mx6/cpu_op-mx6.c
@@ -153,8 +153,8 @@  static struct cpu_op mx6dl_cpu_op_1_2G[] = {
  	 .pll_rate = 1200000000,
  	 .cpu_rate = 1200000000,
  	 .cpu_podf = 0,
-	 .pu_voltage = 1275000,
-	 .soc_voltage = 1275000,
+	 .pu_voltage = 1175000,
+	 .soc_voltage = 1175000,
  	 .cpu_voltage = 1275000,},
  	{
  	 .pll_rate = 792000000,
@@ -177,9 +177,9 @@  static struct cpu_op mx6dl_cpu_op_1G[] = {
  	 .pll_rate = 996000000,
  	 .cpu_rate = 996000000,
  	 .cpu_podf = 0,
-	 .pu_voltage = 1275000,
-	 .soc_voltage = 1275000,
-	 .cpu_voltage = 1275000,},
+	 .pu_voltage = 1175000,
+	 .soc_voltage = 1175000,
+	 .cpu_voltage = 1250000,},
  	{
  	 .pll_rate = 792000000,
  	 .cpu_rate = 792000000,
diff --git a/arch/arm/mach-mx6/system.c b/arch/arm/mach-mx6/system.c
index 6ecd51e..6d24f22 100644
--- a/arch/arm/mach-mx6/system.c
+++ b/arch/arm/mach-mx6/system.c
@@ -157,7 +157,7 @@  void mxc_cpu_lp_set(enum mxc_cpu_pwr_mode mode)
  		   * The PUPSCR should include the time it takes for the ARM LDO to
  		   * ramp up.
  		   */
-		__raw_writel(0x202, gpc_base + GPC_PGC_CPU_PUPSCR_OFFSET);
+		__raw_writel(0xf0f, gpc_base + GPC_PGC_CPU_PUPSCR_OFFSET);
  		/* The PDNSCR is a counter that counts in IPG_CLK cycles. This counter
  		  * can be set to minimum values to power down faster.
  		  */