Patchwork [fsl-community-bsp-platform] Add support for the Congatec qmx6 board

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Submitter SARTRE Leo
Date March 7, 2013, 4:01 p.m.
Message ID <3465D313FDFB824F9A9C8CD24FA4F6BC0108CCC1@frontmail.adetel.com>
Download mbox | patch
Permalink /patch/45723/
State Changes Requested
Delegated to: Otavio Salvador
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Comments

SARTRE Leo - March 7, 2013, 4:01 p.m.
Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com>
---
 conf/machine/cgtqmx6.conf                          |   14 +
 .../u-boot-imx/uboot-support-for-cgtqmx6.patch     | 3155 +++++++++
 recipes-bsp/u-boot/u-boot-imx_2009.08.bb           |    6 +
 .../linux/linux-imx-3.0.35/cgtqmx6/cgtqmx6.patch   | 7148 ++++++++++++++++++++
 .../linux/linux-imx-3.0.35/cgtqmx6/defconfig       | 2722 ++++++++
 recipes-kernel/linux/linux-imx_3.0.35.bb           |    7 +
 6 files changed, 13052 insertions(+)
 create mode 100644 conf/machine/cgtqmx6.conf
 create mode 100644 recipes-bsp/u-boot/u-boot-imx/uboot-support-for-cgtqmx6.patch
 create mode 100644 recipes-kernel/linux/linux-imx-3.0.35/cgtqmx6/cgtqmx6.patch
 create mode 100644 recipes-kernel/linux/linux-imx-3.0.35/cgtqmx6/defconfig
Otavio Salvador - March 8, 2013, 5:49 p.m.
Hello Leo,

On Thu, Mar 7, 2013 at 1:01 PM, SARTRE Leo <lsartre@adeneo-embedded.com> wrote:
>
> Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com>

Thanks by working on that; please split this in a set of patches for
u-boot, kernel and machine definition. You can see how wandboard-dual
has been send. Another thing, please target the patches to
meta-fsl-arm-extra.

> ---
>  conf/machine/cgtqmx6.conf                          |   14 +
>  .../u-boot-imx/uboot-support-for-cgtqmx6.patch     | 3155 +++++++++
>  recipes-bsp/u-boot/u-boot-imx_2009.08.bb           |    6 +

Please add a this to bbappend in meta-fsl-arm-extra.

>  .../linux/linux-imx-3.0.35/cgtqmx6/cgtqmx6.patch   | 7148 ++++++++++++++++++++
>  .../linux/linux-imx-3.0.35/cgtqmx6/defconfig       | 2722 ++++++++
>  recipes-kernel/linux/linux-imx_3.0.35.bb           |    7 +

Same here.

...

Regards,

Patch

diff --git a/conf/machine/cgtqmx6.conf b/conf/machine/cgtqmx6.conf
new file mode 100644
index 0000000..24b9976
--- /dev/null
+++ b/conf/machine/cgtqmx6.conf
@@ -0,0 +1,14 @@ 
+#@TYPE: Machine
+#@NAME: Congatec Qmx6
+#@DESCRIPTION: Machine configuration for Congatec Qmx6 board
+
+include conf/machine/include/imx-base.inc
+include conf/machine/include/tune-cortexa9.inc
+
+SOC_FAMILY = "mx6q:imx6"
+
+UBOOT_MACHINE = "cgtqmx6_config"
+
+SERIAL_CONSOLE = "115200 ttymxc1"
+
+MACHINE_FEATURES += " pci"
diff --git a/recipes-bsp/u-boot/u-boot-imx/uboot-support-for-cgtqmx6.patch b/recipes-bsp/u-boot/u-boot-imx/uboot-support-for-cgtqmx6.patch
new file mode 100644
index 0000000..8336359
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot-imx/uboot-support-for-cgtqmx6.patch
@@ -0,0 +1,3155 @@ 
+From f946db526944bc17f6e887ff5ec3292659581d78 Mon Sep 17 00:00:00 2001
+From: leo <lsartre@adeno-embedded.com>
+Date: Wed, 20 Feb 2013 10:05:47 +0100
+Subject: [PATCH] Add support for congatec qmx6 board.
+
+---
+ Makefile                                 |    5 +
+ board/freescale/cgt_qmx6/Makefile        |   47 +
+ board/freescale/cgt_qmx6/cgt_qmx6.c      | 1486 ++++++++++++++++++++++++++++++
+ board/freescale/cgt_qmx6/config.mk       |    7 +
+ board/freescale/cgt_qmx6/flash_header.S  |  206 +++++
+ board/freescale/cgt_qmx6/lowlevel_init.S |  167 ++++
+ board/freescale/cgt_qmx6/u-boot.lds      |   74 ++
+ common/cmd_mii.c                         |   19 +
+ drivers/mtd/spi/imx_spi_nor_sst.c        |   24 +-
+ include/asm-arm/mach-types.h             |   13 +
+ include/configs/cgt_qmx6.h               |  332 +++++++
+ include/configs/cgt_qmx6_android.h       |  328 +++++++
+ include/configs/cgt_qmx6_mfg.h           |  280 ++++++
+ localversion-qmx6                        |    1 +
+ 14 files changed, 2986 insertions(+), 3 deletions(-)
+ create mode 100644 board/freescale/cgt_qmx6/Makefile
+ create mode 100644 board/freescale/cgt_qmx6/cgt_qmx6.c
+ create mode 100644 board/freescale/cgt_qmx6/config.mk
+ create mode 100644 board/freescale/cgt_qmx6/flash_header.S
+ create mode 100644 board/freescale/cgt_qmx6/lowlevel_init.S
+ create mode 100644 board/freescale/cgt_qmx6/u-boot.lds
+ create mode 100644 include/configs/cgt_qmx6.h
+ create mode 100644 include/configs/cgt_qmx6_android.h
+ create mode 100644 include/configs/cgt_qmx6_mfg.h
+ create mode 100644 localversion-qmx6
+
+diff --git a/Makefile b/Makefile
+index 1088794..1ed1f27 100644
+--- a/Makefile
++++ b/Makefile
+@@ -3205,6 +3205,11 @@ apollon_config		: unconfig
+ 	@$(MKCONFIG) $(@:_config=) arm arm1136 apollon NULL omap24xx
+ 	@echo "CONFIG_ONENAND_U_BOOT = y" >> $(obj)include/config.mk
+ 
++cgt_qmx6_android_config \
++cgt_qmx6_mfg_config \
++cgt_qmx6_config	: unconfig
++	@$(MKCONFIG) $(@:_config=) arm arm_cortexa8 cgt_qmx6 freescale mx6
++
+ mx23_evk_config : unconfig
+ 	@$(MKCONFIG) $(@:_config=) arm arm926ejs mx23_evk freescale mx23
+ 
+diff --git a/board/freescale/cgt_qmx6/Makefile b/board/freescale/cgt_qmx6/Makefile
+new file mode 100644
+index 0000000..5b040d4
+--- /dev/null
++++ b/board/freescale/cgt_qmx6/Makefile
+@@ -0,0 +1,47 @@
++#
++# (C) Copyright 2011 Freescale Semiconductor, Inc.
++#
++# This program is free software; you can redistribute it and/or
++# modify it under the terms of the GNU General Public License as
++# published by the Free Software Foundation; either version 2 of
++# the License, or (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not, write to the Free Software
++# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++# MA 02111-1307 USA
++#
++
++include $(TOPDIR)/config.mk
++
++LIB	= $(obj)lib$(BOARD).a
++
++COBJS	:= $(BOARD).o
++SOBJS	:= lowlevel_init.o flash_header.o
++
++SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
++OBJS	:= $(addprefix $(obj),$(COBJS))
++SOBJS	:= $(addprefix $(obj),$(SOBJS))
++
++$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
++	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
++
++clean:
++	rm -f $(SOBJS) $(OBJS)
++
++distclean:	clean
++	rm -f $(LIB) core *.bak .depend
++
++#########################################################################
++
++# defines $(obj).depend target
++include $(SRCTREE)/rules.mk
++
++sinclude $(obj).depend
++
++#########################################################################
+diff --git a/board/freescale/cgt_qmx6/cgt_qmx6.c b/board/freescale/cgt_qmx6/cgt_qmx6.c
+new file mode 100644
+index 0000000..975422b
+--- /dev/null
++++ b/board/freescale/cgt_qmx6/cgt_qmx6.c
+@@ -0,0 +1,1486 @@
++/*
++ * Copyright (C) 2011-2012 Freescale Semiconductor, Inc.
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++#include <asm/io.h>
++#include <asm/arch/mx6.h>
++#include <asm/arch/mx6_pins.h>
++#include <asm/arch/mx6dl_pins.h>
++#include <asm/arch/iomux-v3.h>
++#include <asm/arch/regs-anadig.h>
++#include <asm/errno.h>
++#ifdef CONFIG_MXC_FEC
++#include <miiphy.h>
++#endif
++#if defined(CONFIG_VIDEO_MX5)
++#include <linux/list.h>
++#include <linux/fb.h>
++#include <linux/mxcfb.h>
++#include <ipu.h>
++#include <lcd.h>
++#endif
++
++#ifdef CONFIG_IMX_ECSPI
++#include <imx_spi.h>
++#endif
++
++#if CONFIG_I2C_MXC
++#include <i2c.h>
++#endif
++
++#ifdef CONFIG_CMD_MMC
++#include <mmc.h>
++#include <fsl_esdhc.h>
++#endif
++
++#ifdef CONFIG_ARCH_MMU
++#include <asm/mmu.h>
++#include <asm/arch/mmu.h>
++#endif
++
++#ifdef CONFIG_CMD_CLOCK
++#include <asm/clock.h>
++#endif
++
++#ifdef CONFIG_CMD_IMXOTP
++#include <imx_otp.h>
++#endif
++
++#ifdef CONFIG_ANDROID_RECOVERY
++#include "../common/recovery.h"
++#include <part.h>
++#include <ext2fs.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++#include <ubi_uboot.h>
++#include <jffs2/load_kernel.h>
++#endif
++DECLARE_GLOBAL_DATA_PTR;
++
++static enum boot_device boot_dev;
++
++void set_gpio_output_val(unsigned base, unsigned mask, unsigned val)
++{
++	unsigned reg = readl(base + GPIO_DR);
++	if (val & 1)
++		reg |= mask;	/* set high */
++	else
++		reg &= ~mask;	/* clear low */
++	writel(reg, base + GPIO_DR);
++
++	reg = readl(base + GPIO_GDIR);
++	reg |= mask;		/* configure GPIO line as output */
++	writel(reg, base + GPIO_GDIR);
++}
++
++#ifdef CONFIG_VIDEO_MX5
++extern unsigned char fsl_bmp_600x400[];
++extern int fsl_bmp_600x400_size;
++extern int g_ipu_hw_rev;
++
++#if defined(CONFIG_BMP_8BPP)
++unsigned short colormap[256];
++#elif defined(CONFIG_BMP_16BPP)
++unsigned short colormap[65536];
++#else
++unsigned short colormap[16777216];
++#endif
++
++static int di = 1;
++
++extern int ipuv3_fb_init(struct fb_videomode *mode, int di,
++			int interface_pix_fmt,
++			ipu_di_clk_parent_t di_clk_parent,
++			int di_clk_val);
++
++static struct fb_videomode lvds_xga = {
++	 "XGA", 60, 1024, 768, 15385, 220, 40, 21, 7, 60, 10,
++	 FB_SYNC_EXT,
++	 FB_VMODE_NONINTERLACED,
++	 0,
++};
++
++vidinfo_t panel_info;
++#endif
++
++static inline void setup_boot_device(void)
++{
++	uint soc_sbmr = readl(SRC_BASE_ADDR + 0x4);
++	uint bt_mem_ctl = (soc_sbmr & 0x000000FF) >> 4 ;
++	uint bt_mem_type = (soc_sbmr & 0x00000008) >> 3;
++
++	switch (bt_mem_ctl) {
++	case 0x0:
++		if (bt_mem_type)
++			boot_dev = ONE_NAND_BOOT;
++		else
++			boot_dev = WEIM_NOR_BOOT;
++		break;
++	case 0x2:
++			boot_dev = SATA_BOOT;
++		break;
++	case 0x3:
++		if (bt_mem_type)
++			boot_dev = I2C_BOOT;
++		else
++			boot_dev = SPI_NOR_BOOT;
++		break;
++	case 0x4:
++	case 0x5:
++		boot_dev = SD_BOOT;
++		break;
++	case 0x6:
++	case 0x7:
++		boot_dev = MMC_BOOT;
++		break;
++	case 0x8 ... 0xf:
++		boot_dev = NAND_BOOT;
++		break;
++	default:
++		boot_dev = UNKNOWN_BOOT;
++		break;
++	}
++}
++
++enum boot_device get_boot_device(void)
++{
++	return boot_dev;
++}
++
++u32 get_board_rev(void)
++{
++	return fsl_system_rev;
++}
++
++#ifdef CONFIG_ARCH_MMU
++void board_mmu_init(void)
++{
++	unsigned long ttb_base = PHYS_SDRAM_1 + 0x4000;
++	unsigned long i;
++
++	/*
++	* Set the TTB register
++	*/
++	asm volatile ("mcr  p15,0,%0,c2,c0,0" : : "r"(ttb_base) /*:*/);
++
++	/*
++	* Set the Domain Access Control Register
++	*/
++	i = ARM_ACCESS_DACR_DEFAULT;
++	asm volatile ("mcr  p15,0,%0,c3,c0,0" : : "r"(i) /*:*/);
++
++	/*
++	* First clear all TT entries - ie Set them to Faulting
++	*/
++	memset((void *)ttb_base, 0, ARM_FIRST_LEVEL_PAGE_TABLE_SIZE);
++	/* Actual   Virtual  Size   Attributes          Function */
++	/* Base     Base     MB     cached? buffered?  access permissions */
++	/* xxx00000 xxx00000 */
++	X_ARM_MMU_SECTION(0x000, 0x000, 0x001,
++			ARM_UNCACHEABLE, ARM_UNBUFFERABLE,
++			ARM_ACCESS_PERM_RW_RW); /* ROM, 1M */
++	X_ARM_MMU_SECTION(0x001, 0x001, 0x008,
++			ARM_UNCACHEABLE, ARM_UNBUFFERABLE,
++			ARM_ACCESS_PERM_RW_RW); /* 8M */
++	X_ARM_MMU_SECTION(0x009, 0x009, 0x001,
++			ARM_UNCACHEABLE, ARM_UNBUFFERABLE,
++			ARM_ACCESS_PERM_RW_RW); /* IRAM */
++	X_ARM_MMU_SECTION(0x00A, 0x00A, 0x0F6,
++			ARM_UNCACHEABLE, ARM_UNBUFFERABLE,
++			ARM_ACCESS_PERM_RW_RW); /* 246M */
++
++	/* 2 GB memory starting at 0x10000000, only map 1.875 GB */
++	X_ARM_MMU_SECTION(0x100, 0x100, 0x780,
++			ARM_CACHEABLE, ARM_BUFFERABLE,
++			ARM_ACCESS_PERM_RW_RW);
++	/* uncached alias of the same 1.875 GB memory */
++	X_ARM_MMU_SECTION(0x100, 0x880, 0x780,
++			ARM_UNCACHEABLE, ARM_UNBUFFERABLE,
++			ARM_ACCESS_PERM_RW_RW);
++
++	/* Enable MMU */
++	MMU_ON();
++}
++#endif
++
++#ifdef CONFIG_DWC_AHSATA
++
++#define ANATOP_PLL_LOCK                 0x80000000
++#define ANATOP_PLL_ENABLE_MASK          0x00002000
++#define ANATOP_PLL_BYPASS_MASK          0x00010000
++#define ANATOP_PLL_LOCK                 0x80000000
++#define ANATOP_PLL_PWDN_MASK            0x00001000
++#define ANATOP_PLL_HOLD_RING_OFF_MASK   0x00000800
++#define ANATOP_SATA_CLK_ENABLE_MASK     0x00100000
++
++int setup_sata(void)
++{
++	u32 reg = 0;
++	s32 timeout = 100000;
++
++	/* Enable sata clock */
++	reg = readl(CCM_BASE_ADDR + 0x7c); /* CCGR5 */
++	reg |= 0x30;
++	writel(reg, CCM_BASE_ADDR + 0x7c);
++
++	/* Enable PLLs */
++	reg = readl(ANATOP_BASE_ADDR + 0xe0); /* ENET PLL */
++	reg &= ~ANATOP_PLL_PWDN_MASK;
++	writel(reg, ANATOP_BASE_ADDR + 0xe0);
++	reg |= ANATOP_PLL_ENABLE_MASK;
++	while (timeout--) {
++		if (readl(ANATOP_BASE_ADDR + 0xe0) & ANATOP_PLL_LOCK)
++			break;
++	}
++	if (timeout <= 0)
++		return -1;
++	reg &= ~ANATOP_PLL_BYPASS_MASK;
++	writel(reg, ANATOP_BASE_ADDR + 0xe0);
++	reg |= ANATOP_SATA_CLK_ENABLE_MASK;
++	writel(reg, ANATOP_BASE_ADDR + 0xe0);
++
++	/* Enable sata phy */
++	reg = readl(IOMUXC_BASE_ADDR + 0x34); /* GPR13 */
++
++	reg &= ~0x07ffffff;
++	/*
++	 * rx_eq_val_0 = 5 [26:24]
++	 * los_lvl = 0x12 [23:19]
++	 * rx_dpll_mode_0 = 0x3 [18:16]
++	 * mpll_ss_en = 0x0 [14]
++	 * tx_atten_0 = 0x4 [13:11]
++	 * tx_boost_0 = 0x0 [10:7]
++	 * tx_lvl = 0x11 [6:2]
++	 * mpll_ck_off_b = 0x1 [1]
++	 * tx_edgerate_0 = 0x0 [0]
++	 * */
++	reg |= 0x59124c6;
++	writel(reg, IOMUXC_BASE_ADDR + 0x34);
++
++	return 0;
++}
++#endif
++
++int dram_init(void)
++{
++	/*
++	 * Switch PL301_FAST2 to DDR Dual-channel mapping
++	 * however this block the boot up, temperory redraw
++	 */
++	/*
++	 * u32 reg = 1;
++	 * writel(reg, GPV0_BASE_ADDR);
++	 */
++
++	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
++	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
++
++	return 0;
++}
++
++static void setup_uart(void)
++{
++#if defined CONFIG_MX6Q
++	/* UART1 TXD */
++	mxc_iomux_v3_setup_pad(MX6Q_PAD_CSI0_DAT10__UART1_TXD);
++
++	/* UART1 RXD */
++	mxc_iomux_v3_setup_pad(MX6Q_PAD_CSI0_DAT11__UART1_RXD);
++
++	/* UART2 TXD */
++	mxc_iomux_v3_setup_pad(MX6Q_PAD_EIM_D26__UART2_TXD);
++
++	/* UART2 RXD */
++	mxc_iomux_v3_setup_pad(MX6Q_PAD_EIM_D27__UART2_RXD);
++#elif defined CONFIG_MX6DL
++	/* UART1 TXD */
++	mxc_iomux_v3_setup_pad(MX6DL_PAD_CSI0_DAT10__UART1_TXD);
++
++	/* UART1 RXD */
++	mxc_iomux_v3_setup_pad(MX6DL_PAD_CSI0_DAT11__UART1_RXD);
++
++	/* UART2 TXD */
++	mxc_iomux_v3_setup_pad(MX6DL_PAD_EIM_D26__UART2_TXD);
++
++	/* UART2 RXD */
++	mxc_iomux_v3_setup_pad(MX6DL_PAD_EIM_D27__UART2_RXD);
++#endif
++}
++
++#ifdef CONFIG_VIDEO_MX5
++void setup_lvds_poweron(void)
++{
++	int reg;
++	/* AUX_5V_EN: GPIO(6, 10) */
++#ifdef CONFIG_MX6DL
++	mxc_iomux_v3_setup_pad(MX6DL_PAD_GPIO_7__GPIO_1_7);
++#else
++	mxc_iomux_v3_setup_pad(MX6Q_PAD_GPIO_7__GPIO_1_7);
++#endif
++
++	set_gpio_output_val(GPIO1_BASE_ADDR, (1 << 7), 1);
++}
++#endif
++
++#ifdef CONFIG_I2C_MXC
++#define I2C1_SDA_GPIO3_28_BIT_MASK  (1 << 28)
++#define I2C1_SCL_GPIO3_21_BIT_MASK  (1 << 21)
++#define I2C2_SCL_GPIO4_12_BIT_MASK  (1 << 12)
++#define I2C2_SDA_GPIO4_13_BIT_MASK  (1 << 13)
++#define I2C3_SCL_GPIO1_3_BIT_MASK   (1 << 3)
++#define I2C3_SDA_GPIO1_6_BIT_MASK   (1 << 6)
++
++
++static void setup_i2c(unsigned int module_base)
++{
++	unsigned int reg;
++
++	switch (module_base) {
++	case I2C1_BASE_ADDR:
++#if defined CONFIG_MX6Q
++		/* i2c1 SDA */
++		mxc_iomux_v3_setup_pad(MX6Q_PAD_EIM_D28__I2C1_SDA);
++
++		/* i2c1 SCL */
++		mxc_iomux_v3_setup_pad(MX6Q_PAD_EIM_D21__I2C1_SCL);
++#elif defined CONFIG_MX6DL
++		/* i2c1 SDA */
++		mxc_iomux_v3_setup_pad(MX6DL_PAD_EIM_D28__I2C1_SDA);
++		/* i2c1 SCL */
++		mxc_iomux_v3_setup_pad(MX6DL_PAD_EIM_D21__I2C1_SCL);
++#endif
++
++		/* Enable i2c clock */
++		reg = readl(CCM_BASE_ADDR + CLKCTL_CCGR2);
++		reg |= 0xC0;
++		writel(reg, CCM_BASE_ADDR + CLKCTL_CCGR2);
++
++		break;
++	case I2C2_BASE_ADDR:
++#if defined CONFIG_MX6Q
++		/* i2c2 SDA */
++		mxc_iomux_v3_setup_pad(MX6Q_PAD_KEY_ROW3__I2C2_SDA);
++
++		/* i2c2 SCL */
++		mxc_iomux_v3_setup_pad(MX6Q_PAD_KEY_COL3__I2C2_SCL);
++#elif defined CONFIG_MX6DL
++		/* i2c2 SDA */
++		mxc_iomux_v3_setup_pad(MX6DL_PAD_KEY_ROW3__I2C2_SDA);
++
++		/* i2c2 SCL */
++		mxc_iomux_v3_setup_pad(MX6DL_PAD_KEY_COL3__I2C2_SCL);
++#endif
++
++		/* Enable i2c clock */
++		reg = readl(CCM_BASE_ADDR + CLKCTL_CCGR2);
++		reg |= 0x300;
++		writel(reg, CCM_BASE_ADDR + CLKCTL_CCGR2);
++
++		break;
++	case I2C3_BASE_ADDR:
++#if defined CONFIG_MX6Q
++		/* GPIO_3 for I2C3_SCL */
++		mxc_iomux_v3_setup_pad(MX6Q_PAD_GPIO_3__I2C3_SCL);
++		/* GPIO_6 for I2C3_SDA */
++		mxc_iomux_v3_setup_pad(MX6Q_PAD_GPIO_6__I2C3_SDA);
++
++#elif defined CONFIG_MX6DL
++		/* GPIO_3 for I2C3_SCL */
++		mxc_iomux_v3_setup_pad(MX6DL_PAD_GPIO_3__I2C3_SCL);
++		/* GPIO_6 for I2C3_SDA */
++		mxc_iomux_v3_setup_pad(MX6DL_PAD_GPIO_6__I2C3_SDA);
++#endif
++		/* Enable i2c clock */
++		reg = readl(CCM_BASE_ADDR + CLKCTL_CCGR2);
++		reg |= 0xC00;
++		writel(reg, CCM_BASE_ADDR + CLKCTL_CCGR2);
++
++		break;
++	default:
++		printf("Invalid I2C base: 0x%x\n", module_base);
++		break;
++	}
++}
++/* Note: udelay() is not accurate for i2c timing */
++static void __udelay(int time)
++{
++	int i, j;
++
++	for (i = 0; i < time; i++) {
++		for (j = 0; j < 200; j++) {
++			asm("nop");
++			asm("nop");
++		}
++	}
++}
++static void mx6q_i2c_gpio_scl_direction(int bus, int output)
++{
++	u32 reg;
++
++	switch (bus) {
++	case 1:
++#if defined CONFIG_MX6Q
++		mxc_iomux_v3_setup_pad(MX6Q_PAD_EIM_D21__GPIO_3_21);
++#elif defined CONFIG_MX6DL
++		mxc_iomux_v3_setup_pad(MX6DL_PAD_EIM_D21__GPIO_3_21);
++#endif
++		reg = readl(GPIO3_BASE_ADDR + GPIO_GDIR);
++		if (output)
++			reg |= I2C1_SCL_GPIO3_21_BIT_MASK;
++		else
++			reg &= ~I2C1_SCL_GPIO3_21_BIT_MASK;
++		writel(reg, GPIO3_BASE_ADDR + GPIO_GDIR);
++		break;
++	case 2:
++#if defined CONFIG_MX6Q
++		mxc_iomux_v3_setup_pad(MX6Q_PAD_KEY_COL3__GPIO_4_12);
++#elif defined CONFIG_MX6DL
++		mxc_iomux_v3_setup_pad(MX6DL_PAD_KEY_COL3__GPIO_4_12);
++#endif
++		reg = readl(GPIO4_BASE_ADDR + GPIO_GDIR);
++		if (output)
++			reg |= I2C2_SCL_GPIO4_12_BIT_MASK;
++		else
++			reg &= ~I2C2_SCL_GPIO4_12_BIT_MASK;
++		writel(reg, GPIO4_BASE_ADDR + GPIO_GDIR);
++		break;
++	case 3:
++#if defined CONFIG_MX6Q
++		mxc_iomux_v3_setup_pad(MX6Q_PAD_GPIO_3__GPIO_1_3);
++#elif defined CONFIG_MX6DL
++		mxc_iomux_v3_setup_pad(MX6DL_PAD_GPIO_3__GPIO_1_3);
++#endif
++		reg = readl(GPIO1_BASE_ADDR + GPIO_GDIR);
++		if (output)
++			reg |= I2C3_SCL_GPIO1_3_BIT_MASK;
++		else
++			reg &= I2C3_SCL_GPIO1_3_BIT_MASK;
++		writel(reg, GPIO1_BASE_ADDR + GPIO_GDIR);
++		break;
++	}
++}
++
++/* set 1 to output, sent 0 to input */
++static void mx6q_i2c_gpio_sda_direction(int bus, int output)
++{
++	u32 reg;
++
++	switch (bus) {
++	case 1:
++#if defined CONFIG_MX6Q
++		mxc_iomux_v3_setup_pad(MX6Q_PAD_EIM_D28__GPIO_3_28);
++#elif defined CONFIG_MX6DL
++		mxc_iomux_v3_setup_pad(MX6Q_PAD_EIM_D28__GPIO_3_28);
++#endif
++		reg = readl(GPIO3_BASE_ADDR + GPIO_GDIR);
++		if (output)
++			reg |= I2C1_SDA_GPIO3_28_BIT_MASK;
++		else
++			reg &= ~I2C1_SDA_GPIO3_28_BIT_MASK;
++		writel(reg, GPIO3_BASE_ADDR + GPIO_GDIR);
++		break;
++	case 2:
++#if defined CONFIG_MX6Q
++		mxc_iomux_v3_setup_pad(MX6Q_PAD_KEY_ROW3__GPIO_4_13);
++#elif defined CONFIG_MX6DL
++		mxc_iomux_v3_setup_pad(MX6DL_PAD_KEY_ROW3__GPIO_4_13);
++#endif
++		reg = readl(GPIO4_BASE_ADDR + GPIO_GDIR);
++		if (output)
++			reg |= I2C2_SDA_GPIO4_13_BIT_MASK;
++		else
++			reg &= ~I2C2_SDA_GPIO4_13_BIT_MASK;
++		writel(reg, GPIO4_BASE_ADDR + GPIO_GDIR);
++	case 3:
++#if defined CONFIG_MX6Q
++		mxc_iomux_v3_setup_pad(MX6Q_PAD_GPIO_6__GPIO_1_6);
++#elif defined CONFIG_MX6DL
++		mxc_iomux_v3_setup_pad(MX6DL_PAD_GPIO_6__GPIO_1_6);
++#endif
++		reg = readl(GPIO1_BASE_ADDR + GPIO_GDIR);
++		if (output)
++			reg |= I2C3_SDA_GPIO1_6_BIT_MASK;
++		else
++			reg &= ~I2C3_SDA_GPIO1_6_BIT_MASK;
++		writel(reg, GPIO1_BASE_ADDR + GPIO_GDIR);
++	default:
++		break;
++	}
++}
++
++/* set 1 to high 0 to low */
++static void mx6q_i2c_gpio_scl_set_level(int bus, int high)
++{
++	u32 reg;
++
++	switch (bus) {
++	case 1:
++		reg = readl(GPIO3_BASE_ADDR + GPIO_DR);
++		if (high)
++			reg |= I2C1_SCL_GPIO3_21_BIT_MASK;
++		else
++			reg &= ~I2C1_SCL_GPIO3_21_BIT_MASK;
++		writel(reg, GPIO3_BASE_ADDR + GPIO_DR);
++		break;
++	case 2:
++		reg = readl(GPIO4_BASE_ADDR + GPIO_DR);
++		if (high)
++			reg |= I2C2_SCL_GPIO4_12_BIT_MASK;
++		else
++			reg &= ~I2C2_SCL_GPIO4_12_BIT_MASK;
++		writel(reg, GPIO4_BASE_ADDR + GPIO_DR);
++		break;
++	case 3:
++		reg = readl(GPIO1_BASE_ADDR + GPIO_DR);
++		if (high)
++			reg |= I2C3_SCL_GPIO1_3_BIT_MASK;
++		else
++			reg &= ~I2C3_SCL_GPIO1_3_BIT_MASK;
++		writel(reg, GPIO1_BASE_ADDR + GPIO_DR);
++		break;
++	}
++}
++
++/* set 1 to high 0 to low */
++static void mx6q_i2c_gpio_sda_set_level(int bus, int high)
++{
++	u32 reg;
++
++	switch (bus) {
++	case 1:
++		reg = readl(GPIO3_BASE_ADDR + GPIO_DR);
++		if (high)
++			reg |= I2C1_SDA_GPIO3_28_BIT_MASK;
++		else
++			reg &= ~I2C1_SDA_GPIO3_28_BIT_MASK;
++		writel(reg, GPIO3_BASE_ADDR + GPIO_DR);
++		break;
++	case 2:
++		reg = readl(GPIO4_BASE_ADDR + GPIO_DR);
++		if (high)
++			reg |= I2C2_SDA_GPIO4_13_BIT_MASK;
++		else
++			reg &= ~I2C2_SDA_GPIO4_13_BIT_MASK;
++		writel(reg, GPIO4_BASE_ADDR + GPIO_DR);
++		break;
++	case 3:
++		reg = readl(GPIO1_BASE_ADDR + GPIO_DR);
++		if (high)
++			reg |= I2C3_SDA_GPIO1_6_BIT_MASK;
++		else
++			reg &= ~I2C3_SDA_GPIO1_6_BIT_MASK;
++		writel(reg, GPIO1_BASE_ADDR + GPIO_DR);
++		break;
++	}
++}
++
++static int mx6q_i2c_gpio_check_sda(int bus)
++{
++	u32 reg;
++	int result = 0;
++
++	switch (bus) {
++	case 1:
++		reg = readl(GPIO3_BASE_ADDR + GPIO_PSR);
++		result = !!(reg & I2C1_SDA_GPIO3_28_BIT_MASK);
++		break;
++	case 2:
++		reg = readl(GPIO4_BASE_ADDR + GPIO_PSR);
++		result = !!(reg & I2C2_SDA_GPIO4_13_BIT_MASK);
++		break;
++	case 3:
++		reg = readl(GPIO1_BASE_ADDR + GPIO_PSR);
++		result = !!(reg & I2C3_SDA_GPIO1_6_BIT_MASK);
++		break;
++	}
++
++	return result;
++}
++
++ /* Random reboot cause i2c SDA low issue:
++  * the i2c bus busy because some device pull down the I2C SDA
++  * line. This happens when Host is reading some byte from slave, and
++  * then host is reset/reboot. Since in this case, device is
++  * controlling i2c SDA line, the only thing host can do this give the
++  * clock on SCL and sending NAK, and STOP to finish this
++  * transaction.
++  *
++  * How to fix this issue:
++  * detect if the SDA was low on bus send 8 dummy clock, and 1
++  * clock + NAK, and STOP to finish i2c transaction the pending
++  * transfer.
++  */
++int i2c_bus_recovery(void)
++{
++	int i, bus, result = 0;
++
++	for (bus = 1; bus <= 3; bus++) {
++		mx6q_i2c_gpio_sda_direction(bus, 0);
++
++		if (mx6q_i2c_gpio_check_sda(bus) == 0) {
++			printf("i2c: I2C%d SDA is low, start i2c recovery...\n", bus);
++			mx6q_i2c_gpio_scl_direction(bus, 1);
++			mx6q_i2c_gpio_scl_set_level(bus, 1);
++			__udelay(10000);
++
++			for (i = 0; i < 9; i++) {
++				mx6q_i2c_gpio_scl_set_level(bus, 1);
++				__udelay(5);
++				mx6q_i2c_gpio_scl_set_level(bus, 0);
++				__udelay(5);
++			}
++
++			/* 9th clock here, the slave should already
++			   release the SDA, we can set SDA as high to
++			   a NAK.*/
++			mx6q_i2c_gpio_sda_direction(bus, 1);
++			mx6q_i2c_gpio_sda_set_level(bus, 1);
++			__udelay(1); /* Pull up SDA first */
++			mx6q_i2c_gpio_scl_set_level(bus, 1);
++			__udelay(5); /* plus pervious 1 us */
++			mx6q_i2c_gpio_scl_set_level(bus, 0);
++			__udelay(5);
++			mx6q_i2c_gpio_sda_set_level(bus, 0);
++			__udelay(5);
++			mx6q_i2c_gpio_scl_set_level(bus, 1);
++			__udelay(5);
++			/* Here: SCL is high, and SDA from low to high, it's a
++			 * stop condition */
++			mx6q_i2c_gpio_sda_set_level(bus, 1);
++			__udelay(5);
++
++			mx6q_i2c_gpio_sda_direction(bus, 0);
++			if (mx6q_i2c_gpio_check_sda(bus) == 1)
++				printf("I2C%d Recovery success\n", bus);
++			else {
++				printf("I2C%d Recovery failed, I2C1 SDA still low!!!\n", bus);
++				result |= 1 << bus;
++			}
++		}
++
++		/* configure back to i2c */
++		switch (bus) {
++		case 1:
++			setup_i2c(I2C1_BASE_ADDR);
++			break;
++		case 2:
++			setup_i2c(I2C2_BASE_ADDR);
++			break;
++		case 3:
++			setup_i2c(I2C3_BASE_ADDR);
++			break;
++		}
++	}
++
++	return result;
++}
++
++/* check and set PMIC value */
++void setup_pmic_reg(uint addr, uchar val)
++{
++	uchar rdval;
++	
++	if (i2c_read(0x8, addr, 1, &rdval, 1))
++		printf("%s:i2c_read:error\n", __func__);
++	else
++	{
++		if (rdval != val)
++		{
++			printf("Warning: adjusted PFUZE value  reg: 0x%02x  old: 0x%02x  new:0x%02x\n",addr,rdval,val);
++			i2c_write(0x8, addr, 1, &val, 1);
++		}
++	}	
++}
++
++void setup_pmic_voltages(void)
++{
++	unsigned char id1 = 0, id2 = 0, value = 0 ;
++	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
++	if (!i2c_probe(0x8)) {
++		if (i2c_read(0x8, 0x00, 1, &id1, 1))
++			printf("%s:i2c_read:error\n", __func__);
++		if (i2c_read(0x8, 0x03, 1, &id2, 1))
++			printf("%s:i2c_read:error\n", __func__);
++
++		#if CONFIG_MX6_INTER_LDO_BYPASS
++		/*VDDCORE 1.1V@800Mhz: SW1AB*/
++		value = 0x20;
++		i2c_write(0x8, 0x20, 1, &value, 1);
++
++		/*VDDSOC 1.2V : SW1C*/
++		value = 0x24;
++		i2c_write(0x8, 0x2e, 1, &value, 1);
++
++		/* Bypass the VDDSOC from Anatop */
++		val = REG_RD(ANATOP_BASE_ADDR, HW_ANADIG_REG_CORE);
++		val &= ~BM_ANADIG_REG_CORE_REG2_TRG;
++		val |= BF_ANADIG_REG_CORE_REG2_TRG(0x1f);
++		REG_WR(ANATOP_BASE_ADDR, HW_ANADIG_REG_CORE, val);
++
++		/* Bypass the VDDCORE from Anatop */
++		val = REG_RD(ANATOP_BASE_ADDR, HW_ANADIG_REG_CORE);
++		val &= ~BM_ANADIG_REG_CORE_REG0_TRG;
++		val |= BF_ANADIG_REG_CORE_REG0_TRG(0x1f);
++		REG_WR(ANATOP_BASE_ADDR, HW_ANADIG_REG_CORE, val);
++
++		/* Bypass the VDDPU from Anatop */
++		val = REG_RD(ANATOP_BASE_ADDR, HW_ANADIG_REG_CORE);
++		val &= ~BM_ANADIG_REG_CORE_REG1_TRG;
++		val |= BF_ANADIG_REG_CORE_REG1_TRG(0x1f);
++		REG_WR(ANATOP_BASE_ADDR, HW_ANADIG_REG_CORE, val);
++
++		/*clear PowerDown Enable bit of WDOG1_WMCR*/
++		writew(0, WDOG1_BASE_ADDR + 0x08);
++		printf("hw_anadig_reg_core=%x\n",
++			REG_RD(ANATOP_BASE_ADDR, HW_ANADIG_REG_CORE));
++		#endif
++		
++		switch (id2)
++		{
++			case 0x01:
++				/* GEN1 PMIC (default programming), set correct values for PHY, EMMC, DDR VTT */
++				printf("PFUZE100 1st Gen detected (0x%x/0x%x)\n", id1, id2);
++				
++				/* VGEN5, 1.8V phy power supply */
++				value = 0x10;
++				i2c_write(0x8, 0x70, 1, &value, 1);
++
++				/* VGEN6, 1.8V emmc vccio power supply */
++				value = 0x10;
++			 	i2c_write(0x8, 0x71, 1, &value, 1);
++ 	
++			 	/* SW4, 0.75V DDR VTT */
++				value = 0x0e;
++				i2c_write(0x8, 0x4a, 1, &value, 1);
++				break;
++
++			case 0x10:
++			case 0x11:
++				/* GEN2 PMIC (OTP programmed) - check correct settings */
++ 				printf("PFUZE100 2nd Gen (OTP) detected (0x%x/0x%x)\n", id1, id2);
++
++				setup_pmic_reg(0x70, 0x10);
++				setup_pmic_reg(0x71, 0x10);
++				setup_pmic_reg(0x4a, 0x0e);
++				break;
++
++			default:
++				/* unknown PMIC */
++ 				printf("unknown PFUZE100 detected (0x%x/0x%x)\n", id1, id2);
++
++				setup_pmic_reg(0x70, 0x10);
++				setup_pmic_reg(0x71, 0x10);
++				setup_pmic_reg(0x4a, 0x0e);
++				break;
++			}
++	}
++}
++#endif
++
++#ifdef CONFIG_IMX_ECSPI
++s32 spi_get_cfg(struct imx_spi_dev_t *dev)
++{
++	switch (dev->slave.cs) {
++	case 0:
++		/* SPI-NOR */
++		dev->base = ECSPI1_BASE_ADDR;
++		dev->freq = 25000000;
++		dev->ss_pol = IMX_SPI_ACTIVE_LOW;
++		dev->ss = 0;
++		dev->fifo_sz = 64 * 4;
++		dev->us_delay = 0;
++		break;
++	case 1:
++		/* SPI-NOR */
++		dev->base = ECSPI1_BASE_ADDR;
++		dev->freq = 25000000;
++		dev->ss_pol = IMX_SPI_ACTIVE_LOW;
++		dev->ss = 1;
++		dev->fifo_sz = 64 * 4;
++		dev->us_delay = 0;
++		break;
++	default:
++		printf("Invalid Bus ID!\n");
++	}
++
++	return 0;
++}
++
++void spi_io_init(struct imx_spi_dev_t *dev)
++{
++	u32 reg;
++
++	switch (dev->base) {
++	case ECSPI1_BASE_ADDR:
++		/* Enable clock */
++		reg = readl(CCM_BASE_ADDR + CLKCTL_CCGR1);
++		reg |= 0x3;
++		writel(reg, CCM_BASE_ADDR + CLKCTL_CCGR1);
++
++#if defined CONFIG_MX6Q
++		/* SCLK */
++		mxc_iomux_v3_setup_pad(MX6Q_PAD_EIM_D16__ECSPI1_SCLK);
++
++		/* MISO */
++		mxc_iomux_v3_setup_pad(MX6Q_PAD_EIM_D17__ECSPI1_MISO);
++
++		/* MOSI */
++		mxc_iomux_v3_setup_pad(MX6Q_PAD_EIM_D18__ECSPI1_MOSI);
++
++		if (dev->ss == 1)
++			mxc_iomux_v3_setup_pad(MX6Q_PAD_EIM_D19__ECSPI1_SS1);
++#elif defined CONFIG_MX6DL
++		/* SCLK */
++		mxc_iomux_v3_setup_pad(MX6DL_PAD_EIM_D16__ECSPI1_SCLK);
++
++		/* MISO */
++		mxc_iomux_v3_setup_pad(MX6DL_PAD_EIM_D17__ECSPI1_MISO);
++
++		/* MOSI */
++		mxc_iomux_v3_setup_pad(MX6DL_PAD_EIM_D18__ECSPI1_MOSI);
++
++		if (dev->ss == 1)
++			mxc_iomux_v3_setup_pad(MX6DL_PAD_EIM_D19__ECSPI1_SS1);
++#endif
++		break;
++	case ECSPI2_BASE_ADDR:
++	case ECSPI3_BASE_ADDR:
++		/* ecspi2-3 fall through */
++		break;
++	default:
++		break;
++	}
++}
++#endif
++
++#ifdef CONFIG_NET_MULTI
++int board_eth_init(bd_t *bis)
++{
++	int rc = -ENODEV;
++
++	return rc;
++}
++#endif
++
++#ifdef CONFIG_CMD_MMC
++
++struct fsl_esdhc_cfg usdhc_cfg[4] = {
++	{USDHC2_BASE_ADDR, 1, 1, 1, 0},
++	{USDHC3_BASE_ADDR, 1, 1, 1, 0},
++	{USDHC4_BASE_ADDR, 1, 1, 1, 0},
++};
++
++#ifdef CONFIG_DYNAMIC_MMC_DEVNO
++int get_mmc_env_devno(void)
++{
++	uint soc_sbmr = readl(SRC_BASE_ADDR + 0x4);
++
++	if (SD_BOOT == boot_dev || MMC_BOOT == boot_dev) {
++		/* BOOT_CFG2[3] and BOOT_CFG2[4] */
++		return (soc_sbmr & 0x00001800) >> 11;
++	} else
++		return -1;
++
++}
++#endif
++
++#if defined CONFIG_MX6Q
++iomux_v3_cfg_t usdhc1_pads[] = {
++	MX6Q_PAD_SD1_CLK__USDHC1_CLK,
++	MX6Q_PAD_SD1_CMD__USDHC1_CMD,
++	MX6Q_PAD_SD1_DAT0__USDHC1_DAT0,
++	MX6Q_PAD_SD1_DAT1__USDHC1_DAT1,
++	MX6Q_PAD_SD1_DAT2__USDHC1_DAT2,
++	MX6Q_PAD_SD1_DAT3__USDHC1_DAT3,
++};
++
++iomux_v3_cfg_t usdhc2_pads[] = {
++	MX6Q_PAD_SD2_CLK__USDHC2_CLK,
++	MX6Q_PAD_SD2_CMD__USDHC2_CMD,
++	MX6Q_PAD_SD2_DAT0__USDHC2_DAT0,
++	MX6Q_PAD_SD2_DAT1__USDHC2_DAT1,
++	MX6Q_PAD_SD2_DAT2__USDHC2_DAT2,
++	MX6Q_PAD_SD2_DAT3__USDHC2_DAT3,
++};
++
++iomux_v3_cfg_t usdhc3_pads[] = {
++	MX6Q_PAD_SD3_CLK__USDHC3_CLK,
++	MX6Q_PAD_SD3_CMD__USDHC3_CMD,
++	MX6Q_PAD_SD3_DAT0__USDHC3_DAT0,
++	MX6Q_PAD_SD3_DAT1__USDHC3_DAT1,
++	MX6Q_PAD_SD3_DAT2__USDHC3_DAT2,
++	MX6Q_PAD_SD3_DAT3__USDHC3_DAT3,
++	MX6Q_PAD_SD3_DAT4__USDHC3_DAT4,
++	MX6Q_PAD_SD3_DAT5__USDHC3_DAT5,
++	MX6Q_PAD_SD3_DAT6__USDHC3_DAT6,
++	MX6Q_PAD_SD3_DAT7__USDHC3_DAT7,
++	MX6Q_PAD_SD3_RST__USDHC3_RST,
++};
++
++iomux_v3_cfg_t usdhc4_pads[] = {
++	MX6Q_PAD_SD4_CLK__USDHC4_CLK,
++	MX6Q_PAD_SD4_CMD__USDHC4_CMD,
++	MX6Q_PAD_SD4_DAT0__USDHC4_DAT0,
++	MX6Q_PAD_SD4_DAT1__USDHC4_DAT1,
++	MX6Q_PAD_SD4_DAT2__USDHC4_DAT2,
++	MX6Q_PAD_SD4_DAT3__USDHC4_DAT3,
++	MX6Q_PAD_SD4_DAT4__USDHC4_DAT4,
++	MX6Q_PAD_SD4_DAT5__USDHC4_DAT5,
++	MX6Q_PAD_SD4_DAT6__USDHC4_DAT6,
++	MX6Q_PAD_SD4_DAT7__USDHC4_DAT7,
++};
++#elif defined CONFIG_MX6DL
++iomux_v3_cfg_t usdhc1_pads[] = {
++	MX6DL_PAD_SD1_CLK__USDHC1_CLK,
++	MX6DL_PAD_SD1_CMD__USDHC1_CMD,
++	MX6DL_PAD_SD1_DAT0__USDHC1_DAT0,
++	MX6DL_PAD_SD1_DAT1__USDHC1_DAT1,
++	MX6DL_PAD_SD1_DAT2__USDHC1_DAT2,
++	MX6DL_PAD_SD1_DAT3__USDHC1_DAT3,
++};
++
++iomux_v3_cfg_t usdhc2_pads[] = {
++	MX6DL_PAD_SD2_CLK__USDHC2_CLK,
++	MX6DL_PAD_SD2_CMD__USDHC2_CMD,
++	MX6DL_PAD_SD2_DAT0__USDHC2_DAT0,
++	MX6DL_PAD_SD2_DAT1__USDHC2_DAT1,
++	MX6DL_PAD_SD2_DAT2__USDHC2_DAT2,
++	MX6DL_PAD_SD2_DAT3__USDHC2_DAT3,
++};
++
++iomux_v3_cfg_t usdhc3_pads[] = {
++	MX6DL_PAD_SD3_CLK__USDHC3_CLK,
++	MX6DL_PAD_SD3_CMD__USDHC3_CMD,
++	MX6DL_PAD_SD3_DAT0__USDHC3_DAT0,
++	MX6DL_PAD_SD3_DAT1__USDHC3_DAT1,
++	MX6DL_PAD_SD3_DAT2__USDHC3_DAT2,
++	MX6DL_PAD_SD3_DAT3__USDHC3_DAT3,
++	MX6DL_PAD_SD3_DAT4__USDHC3_DAT4,
++	MX6DL_PAD_SD3_DAT5__USDHC3_DAT5,
++	MX6DL_PAD_SD3_DAT6__USDHC3_DAT6,
++	MX6DL_PAD_SD3_DAT7__USDHC3_DAT7,
++	MX6Q_PAD_SD3_RST__USDHC3_RST,
++};
++
++iomux_v3_cfg_t usdhc4_pads[] = {
++	MX6DL_PAD_SD4_CLK__USDHC4_CLK,
++	MX6DL_PAD_SD4_CMD__USDHC4_CMD,
++	MX6DL_PAD_SD4_DAT0__USDHC4_DAT0,
++	MX6DL_PAD_SD4_DAT1__USDHC4_DAT1,
++	MX6DL_PAD_SD4_DAT2__USDHC4_DAT2,
++	MX6DL_PAD_SD4_DAT3__USDHC4_DAT3,
++	MX6DL_PAD_SD4_DAT4__USDHC4_DAT4,
++	MX6DL_PAD_SD4_DAT5__USDHC4_DAT5,
++	MX6DL_PAD_SD4_DAT6__USDHC4_DAT6,
++	MX6DL_PAD_SD4_DAT7__USDHC4_DAT7,
++};
++#endif
++
++int usdhc_gpio_init(bd_t *bis)
++{
++	s32 status = 0;
++	u32 index = 0;
++
++	for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM;
++		++index) {
++		switch (index) {
++		case 0:
++			mxc_iomux_v3_setup_multiple_pads(usdhc3_pads,
++				sizeof(usdhc3_pads) /
++				sizeof(usdhc3_pads[0]));
++			break;
++		case 1:
++			mxc_iomux_v3_setup_multiple_pads(usdhc4_pads,
++				sizeof(usdhc4_pads) /
++				sizeof(usdhc4_pads[0]));
++			break;
++		case 2:
++			mxc_iomux_v3_setup_multiple_pads(usdhc2_pads,
++				sizeof(usdhc2_pads) /
++				sizeof(usdhc2_pads[0]));
++			break;
++		default:
++			printf("Warning: you configured more USDHC controllers"
++				"(%d) then supported by the board (%d)\n",
++				index+1, CONFIG_SYS_FSL_USDHC_NUM);
++			return status;
++		}
++		status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
++	}
++
++	return status;
++}
++
++int board_mmc_init(bd_t *bis)
++{
++	if (!usdhc_gpio_init(bis))
++		return 0;
++	else
++		return -1;
++}
++
++/* For DDR mode operation, provide target delay parameter for each SD port.
++ * Use cfg->esdhc_base to distinguish the SD port #. The delay for each port
++ * is dependent on signal layout for that particular port.  If the following
++ * CONFIG is not defined, then the default target delay value will be used.
++ */
++#ifdef CONFIG_GET_DDR_TARGET_DELAY
++u32 get_ddr_delay(struct fsl_esdhc_cfg *cfg)
++{
++	/* No delay required  */
++	return 0;
++}
++#endif
++
++#endif
++
++#ifdef CONFIG_LCD
++void lcd_enable(void)
++{
++	char *s;
++	int ret;
++	unsigned int reg;
++
++	s = getenv("lvds_num");
++	di = simple_strtol(s, NULL, 10);
++
++	/*
++	* hw_rev 2: IPUV3DEX
++	* hw_rev 3: IPUV3M
++	* hw_rev 4: IPUV3H
++	*/
++	g_ipu_hw_rev = IPUV3_HW_REV_IPUV3H;
++
++#if defined CONFIG_MX6Q
++	mxc_iomux_v3_setup_pad(MX6Q_PAD_SD1_DAT3__GPIO_1_21);
++#elif defined CONFIG_MX6DL
++	mxc_iomux_v3_setup_pad(MX6DL_PAD_SD1_DAT3__GPIO_1_21);
++#endif
++
++	set_gpio_output_val(GPIO1_BASE_ADDR, (1 << 21), 1);
++
++	/* Enable IPU clock */
++	if (di == 1) {
++		reg = readl(CCM_BASE_ADDR + CLKCTL_CCGR3);
++		reg |= 0xC033;
++		writel(reg, CCM_BASE_ADDR + CLKCTL_CCGR3);
++	} else {
++		reg = readl(CCM_BASE_ADDR + CLKCTL_CCGR3);
++		reg |= 0x300F;
++		writel(reg, CCM_BASE_ADDR + CLKCTL_CCGR3);
++	}
++
++	ret = ipuv3_fb_init(&lvds_xga, di, IPU_PIX_FMT_RGB666,
++			DI_PCLK_LDB, 65000000);
++	if (ret)
++		puts("LCD cannot be configured\n");
++
++	reg = readl(ANATOP_BASE_ADDR + 0xF0);
++	reg &= ~0x00003F00;
++	reg |= 0x00001300;
++	writel(reg, ANATOP_BASE_ADDR + 0xF4);
++
++	reg = readl(CCM_BASE_ADDR + CLKCTL_CS2CDR);
++	reg &= ~0x00007E00;
++	reg |= 0x00003600;
++	writel(reg, CCM_BASE_ADDR + CLKCTL_CS2CDR);
++
++	reg = readl(CCM_BASE_ADDR + CLKCTL_CSCMR2);
++	reg |= 0x00000C00;
++	writel(reg, CCM_BASE_ADDR + CLKCTL_CSCMR2);
++
++	reg = 0x0002A953;
++	writel(reg, CCM_BASE_ADDR + CLKCTL_CHSCCDR);
++
++	if (di == 1)
++		writel(0x40C, IOMUXC_BASE_ADDR + 0x8);
++	else
++		writel(0x201, IOMUXC_BASE_ADDR + 0x8);
++}
++#endif
++
++#ifdef CONFIG_VIDEO_MX5
++void panel_info_init(void)
++{
++	panel_info.vl_bpix = LCD_BPP;
++	panel_info.vl_col = lvds_xga.xres;
++	panel_info.vl_row = lvds_xga.yres;
++	panel_info.cmap = colormap;
++}
++#endif
++
++#ifdef CONFIG_SPLASH_SCREEN
++void setup_splash_image(void)
++{
++	char *s;
++	ulong addr;
++
++	s = getenv("splashimage");
++
++	if (s != NULL) {
++		addr = simple_strtoul(s, NULL, 16);
++
++#if defined(CONFIG_ARCH_MMU)
++		addr = ioremap_nocache(iomem_to_phys(addr),
++				fsl_bmp_600x400_size);
++#endif
++		memcpy((char *)addr, (char *)fsl_bmp_600x400,
++				fsl_bmp_600x400_size);
++	}
++}
++#endif
++
++int board_init(void)
++{
++#ifdef CONFIG_MFG
++/* MFG firmware need reset usb to avoid host crash firstly */
++#define USBCMD 0x140
++	int val = readl(OTG_BASE_ADDR + USBCMD);
++	val &= ~0x1;		/*RS bit */
++	writel(val, OTG_BASE_ADDR + USBCMD);
++#endif
++	mxc_iomux_v3_init((void *)IOMUXC_BASE_ADDR);
++	setup_boot_device();
++	fsl_set_system_rev();
++
++	/* board id for linux */
++	gd->bd->bi_arch_number = MACH_TYPE_CGT_QMX6;
++
++	/* address of boot parameters */
++	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
++
++	/* turn off backlight */
++	mxc_iomux_v3_setup_pad(MX6Q_PAD_GPIO_9__GPIO_1_9);
++	set_gpio_output_val(GPIO1_BASE_ADDR, (1 << 9), 0);
++
++	setup_uart();
++
++#ifdef CONFIG_DWC_AHSATA
++	setup_sata();
++#endif
++
++#ifdef CONFIG_VIDEO_MX5
++	/* Enable lvds power */
++	setup_lvds_poweron();
++
++	panel_info_init();
++
++	gd->fb_base = CONFIG_FB_BASE;
++#ifdef CONFIG_ARCH_MMU
++	gd->fb_base = ioremap_nocache(iomem_to_phys(gd->fb_base), 0);
++#endif
++#endif
++
++	return 0;
++}
++
++
++#ifdef CONFIG_ANDROID_RECOVERY
++struct reco_envs supported_reco_envs[BOOT_DEV_NUM] = {
++	{
++		.cmd = NULL,
++		.args = NULL,
++	},
++	{
++		.cmd = NULL,
++		.args = NULL,
++	},
++	{
++		.cmd = NULL,
++		.args = NULL,
++	},
++	{
++		.cmd = NULL,
++		.args = NULL,
++	},
++	{
++		.cmd = CONFIG_ANDROID_RECOVERY_BOOTCMD_MMC,
++		.args = CONFIG_ANDROID_RECOVERY_BOOTARGS_MMC,
++	},
++	{
++		.cmd = CONFIG_ANDROID_RECOVERY_BOOTCMD_MMC,
++		.args = CONFIG_ANDROID_RECOVERY_BOOTARGS_MMC,
++	},
++	{
++		.cmd = CONFIG_ANDROID_RECOVERY_BOOTCMD_MMC,
++		.args = CONFIG_ANDROID_RECOVERY_BOOTARGS_MMC,
++	},
++	{
++		.cmd = CONFIG_ANDROID_RECOVERY_BOOTCMD_MMC,
++		.args = CONFIG_ANDROID_RECOVERY_BOOTARGS_MMC,
++	},
++	{
++		.cmd = NULL,
++		.args = NULL,
++	},
++};
++
++int check_recovery_cmd_file(void)
++{
++	int button_pressed = 0;
++	int recovery_mode = 0;
++	u32 reg;
++
++	recovery_mode = check_and_clean_recovery_flag();
++
++	/* Check Recovery Combo Button press or not. */
++	mxc_iomux_v3_setup_pad(MX6Q_PAD_GPIO_19__GPIO_4_5);
++	reg = readl(GPIO4_BASE_ADDR + GPIO_GDIR);
++	reg &= ~(1<<5);
++	writel(reg, GPIO4_BASE_ADDR + GPIO_GDIR);
++	reg = readl(GPIO4_BASE_ADDR + GPIO_PSR);
++	if (!(reg & (1 << 5))) { /* VOL_DN key is low assert */
++		button_pressed = 1;
++		printf("Recovery key pressed\n");
++	}
++
++	return recovery_mode || button_pressed;
++}
++#endif
++
++int board_late_init(void)
++{
++	#ifdef CONFIG_I2C_MXC
++	setup_i2c(CONFIG_SYS_I2C_PORT);
++	i2c_bus_recovery();
++	setup_pmic_voltages();
++	#endif
++	return 0;
++}
++
++#ifdef CONFIG_MXC_FEC
++static int phy_read(char *devname, unsigned char addr, unsigned char reg,
++		    unsigned short *pdata)
++{
++	int ret = miiphy_read(devname, addr, reg, pdata);
++	if (ret)
++		printf("Error reading from %s PHY addr=%02x reg=%02x\n",
++		       devname, addr, reg);
++	return ret;
++}
++
++static int phy_write(char *devname, unsigned char addr, unsigned char reg,
++		     unsigned short value)
++{
++	int ret = miiphy_write(devname, addr, reg, value);
++	if (ret)
++		printf("Error writing to %s PHY addr=%02x reg=%02x\n", devname,
++		       addr, reg);
++	return ret;
++}
++
++int mx6_rgmii_rework(char *devname, int phy_addr)
++{
++#if 0
++	/* To advertise only 10 Mbs */
++	phy_write(devname, phy_addr, 0x4, 0x61);
++	phy_write(devname, phy_addr, 0x9, 0x0c00);
++#endif
++
++	/* KSZ9031RN ethernet phy on rev. Y.0+ */ 
++
++	phy_write(devname, phy_addr, 0x0d, 2);
++	phy_write(devname, phy_addr, 0x0e, 4);
++	phy_write(devname, phy_addr, 0x0d, 0xc002);
++	phy_write(devname, phy_addr, 0x0e, 0x0000);
++
++	phy_write(devname, phy_addr, 0x0d, 2);
++	phy_write(devname, phy_addr, 0x0e, 5);
++	phy_write(devname, phy_addr, 0x0d, 0xc002);
++	phy_write(devname, phy_addr, 0x0e, 0x0000);
++
++	phy_write(devname, phy_addr, 0x0d, 2);
++	phy_write(devname, phy_addr, 0x0e, 6);
++	phy_write(devname, phy_addr, 0x0d, 0xc002);
++	phy_write(devname, phy_addr, 0x0e, 0xFFFF);
++
++	phy_write(devname, phy_addr, 0x0d, 2);
++	phy_write(devname, phy_addr, 0x0e, 8);
++	phy_write(devname, phy_addr, 0x0d, 0xc002);
++	phy_write(devname, phy_addr, 0x0e, 0x3FFF);
++
++	phy_write(devname, phy_addr, 0x0d, 0x0);
++	
++	return 0;
++}
++iomux_v3_cfg_t enet_pads[] = {
++	MX6Q_PAD_ENET_MDIO__ENET_MDIO,
++	MX6Q_PAD_ENET_MDC__ENET_MDC,
++	MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC,
++	MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0,
++	MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1,
++	MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2,
++	MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3,
++	MX6Q_PAD_RGMII_TX_CTL__ENET_RGMII_TX_CTL,
++	/* pin 35 - 1 (PHY_AD2) on reset */
++	MX6Q_PAD_RGMII_RXC__GPIO_6_30,
++	/* pin 32 - 1 - (MODE0) all */
++	MX6Q_PAD_RGMII_RD0__GPIO_6_25,
++	/* pin 31 - 1 - (MODE1) all */
++	MX6Q_PAD_RGMII_RD1__GPIO_6_27,
++	/* pin 28 - 1 - (MODE2) all */
++	MX6Q_PAD_RGMII_RD2__GPIO_6_28,
++	/* pin 27 - 1 - (MODE3) all */
++	MX6Q_PAD_RGMII_RD3__GPIO_6_29,
++	/* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */
++	MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24,
++	MX6Q_PAD_GPIO_0__CCM_CLKO,
++	MX6Q_PAD_GPIO_3__CCM_CLKO2,
++	MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK,
++};
++
++iomux_v3_cfg_t enet_pads_final[] = {
++	MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC,
++	MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0,
++	MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1,
++	MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2,
++	MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3,
++	MX6Q_PAD_RGMII_RX_CTL__ENET_RGMII_RX_CTL,
++};
++
++void enet_board_init(void)
++{
++	iomux_v3_cfg_t enet_reset =
++	    (MX6Q_PAD_EIM_D23__GPIO_3_23 &
++	     ~MUX_PAD_CTRL_MASK) | MUX_PAD_CTRL(0x48);
++
++	/* phy reset: gpio3-23 */
++	set_gpio_output_val(GPIO3_BASE_ADDR, (1 << 23), 0);
++	set_gpio_output_val(GPIO6_BASE_ADDR, (1 << 30),
++			    (CONFIG_FEC0_PHY_ADDR >> 2));
++	set_gpio_output_val(GPIO6_BASE_ADDR, (1 << 25), 1);
++	set_gpio_output_val(GPIO6_BASE_ADDR, (1 << 27), 1);
++	set_gpio_output_val(GPIO6_BASE_ADDR, (1 << 28), 1);
++	set_gpio_output_val(GPIO6_BASE_ADDR, (1 << 29), 1);
++	mxc_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
++	mxc_iomux_v3_setup_pad(enet_reset);
++	set_gpio_output_val(GPIO6_BASE_ADDR, (1 << 24), 1);
++
++	udelay(500);
++	set_gpio_output_val(GPIO3_BASE_ADDR, (1 << 23), 1);
++	mxc_iomux_v3_setup_multiple_pads(enet_pads_final,
++					 ARRAY_SIZE(enet_pads_final));
++}
++#endif
++
++int checkboard(void)
++{
++	printf("Board: %s-QMX6: Board: 0x%x [",
++	mx6_chip_name(),
++	fsl_system_rev);
++	
++	switch (__REG(SRC_BASE_ADDR + 0x8)) {
++	case 0x0001:
++		printf("POR");
++		break;
++	case 0x0009:
++		printf("RST");
++		break;
++	case 0x0010:
++	case 0x0011:
++		printf("WDOG");
++		break;
++	default:
++		printf("unknown");
++	}
++	printf(" ]\n");
++
++	printf("Boot Device: ");
++	switch (get_boot_device()) {
++	case WEIM_NOR_BOOT:
++		printf("NOR\n");
++		break;
++	case ONE_NAND_BOOT:
++		printf("ONE NAND\n");
++		break;
++	case PATA_BOOT:
++		printf("PATA\n");
++		break;
++	case SATA_BOOT:
++		printf("SATA\n");
++		break;
++	case I2C_BOOT:
++		printf("I2C\n");
++		break;
++	case SPI_NOR_BOOT:
++		printf("SPI NOR\n");
++		break;
++	case SD_BOOT:
++		printf("SD\n");
++		break;
++	case MMC_BOOT:
++		printf("MMC\n");
++		break;
++	case NAND_BOOT:
++		printf("NAND\n");
++		break;
++	case UNKNOWN_BOOT:
++	default:
++		printf("UNKNOWN\n");
++		break;
++	}
++	return 0;
++}
++
++#if defined CONFIG_MX6Q
++#define MX6X_IOMUX(s) MX6Q_##s
++#elif defined CONFIG_MX6DL
++#define MX6X_IOMUX(s) MX6DL_##s
++#endif
++
++#ifdef CONFIG_IMX_UDC
++
++void udc_pins_setting(void)
++{
++#define GPIO_3_22_BIT_MASK (1<<22)
++	u32 reg;
++	mxc_iomux_v3_setup_pad(MX6Q_PAD_GPIO_1__USBOTG_ID);
++
++#ifdef CONFIG_USB_OTG_PWR
++	/* USB_OTG_PWR */
++	mxc_iomux_v3_setup_pad(MX6Q_PAD_EIM_D22__GPIO_3_22);
++
++	reg = readl(GPIO3_BASE_ADDR + GPIO_GDIR);
++	/* set gpio_3_22 as output */
++	reg |= GPIO_3_22_BIT_MASK;
++	writel(reg, GPIO3_BASE_ADDR + GPIO_GDIR);
++
++	/* set USB_OTG_PWR to 0 */
++	reg = readl(GPIO3_BASE_ADDR + GPIO_DR);
++	reg &= ~GPIO_3_22_BIT_MASK;
++	writel(reg, GPIO3_BASE_ADDR + GPIO_DR);
++#endif
++	/* USB_ID via GPIO_1 */
++	mxc_iomux_set_gpr_register(1, 13, 1, 1);
++}
++#endif
++
++void initTestPad()
++{
++  mxc_iomux_v3_setup_pad(MX6Q_PAD_EIM_A25__GPIO_5_2);
++}
++
++void setTestPad(u32 val)
++{
++  val &= 0x1;
++  set_gpio_output_val(GPIO5_BASE_ADDR, (1 << 2),val);
++}
+diff --git a/board/freescale/cgt_qmx6/config.mk b/board/freescale/cgt_qmx6/config.mk
+new file mode 100644
+index 0000000..a0ce2a1
+--- /dev/null
++++ b/board/freescale/cgt_qmx6/config.mk
+@@ -0,0 +1,7 @@
++LDSCRIPT := $(SRCTREE)/board/$(VENDOR)/$(BOARD)/u-boot.lds
++
++sinclude $(OBJTREE)/board/$(VENDOR)/$(BOARD)/config.tmp
++
++ifndef TEXT_BASE
++	TEXT_BASE = 0x27800000
++endif
+diff --git a/board/freescale/cgt_qmx6/flash_header.S b/board/freescale/cgt_qmx6/flash_header.S
+new file mode 100644
+index 0000000..950d426
+--- /dev/null
++++ b/board/freescale/cgt_qmx6/flash_header.S
+@@ -0,0 +1,206 @@
++/*
++ * Copyright (C) 2011 Freescale Semiconductor, Inc.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <config.h>
++#include <asm/arch/mx6.h>
++
++#ifdef	CONFIG_FLASH_HEADER
++#ifndef CONFIG_FLASH_HEADER_OFFSET
++# error "Must define the offset of flash header"
++#endif
++
++#define CPU_2_BE_32(l) \
++       ((((l) & 0x000000FF) << 24) | \
++	(((l) & 0x0000FF00) << 8)  | \
++	(((l) & 0x00FF0000) >> 8)  | \
++	(((l) & 0xFF000000) >> 24))
++
++#define MXC_DCD_ITEM(i, addr, val)   \
++dcd_node_##i:                        \
++        .word CPU_2_BE_32(addr) ;     \
++        .word CPU_2_BE_32(val)  ;     \
++
++.section ".text.flasheader", "x"
++	b	_start
++	.org	CONFIG_FLASH_HEADER_OFFSET
++
++ivt_header:       .word 0x402000D1 /* Tag=0xD1, Len=0x0020, Ver=0x40 */
++app_code_jump_v:  .word _start
++reserv1:          .word 0x0
++dcd_ptr:          .word dcd_hdr
++boot_data_ptr:	  .word boot_data
++self_ptr:         .word ivt_header
++app_code_csf:     .word 0x0
++reserv2:          .word 0x0
++
++boot_data:        .word TEXT_BASE
++image_len:        .word _end_of_copy  - TEXT_BASE + CONFIG_FLASH_HEADER_OFFSET
++plugin:           .word 0x0
++
++dcd_hdr:          .word 0x40F802D2 /* Tag=0xD2, Len=94*8 + 4 + 4, Ver=0x40 */
++write_dcd_cmd:    .word 0x04F402CC /* Tag=0xCC, Len=94*8 + 4, Param=0x04 */
++
++/* DCD */
++
++/* sml +++ debug: no sure if we need to disable watchdog and setup clocks ... to be checked */
++//MXC_DCD_ITEM(00, SRC_BASE_ADDR, 0x01C00521)
++//MXC_DCD_ITEM(00, WDOG1_BASE_ADDR, 0x00000030)
++
++/* DDR IO TYPE */
++MXC_DCD_ITEM(1, IOMUXC_BASE_ADDR + 0x798, 0x000C0000)
++MXC_DCD_ITEM(2, IOMUXC_BASE_ADDR + 0x758, 0x00000000)
++
++/* clock */
++MXC_DCD_ITEM(3, IOMUXC_BASE_ADDR + 0x588, 0x00000030)
++MXC_DCD_ITEM(4, IOMUXC_BASE_ADDR + 0x594, 0x00000030)
++
++/* address */
++MXC_DCD_ITEM(5, IOMUXC_BASE_ADDR + 0x56c, 0x00000030)
++MXC_DCD_ITEM(6, IOMUXC_BASE_ADDR + 0x578, 0x00000030)
++MXC_DCD_ITEM(7, IOMUXC_BASE_ADDR + 0x74c, 0x00000030)
++
++/* control */
++MXC_DCD_ITEM(8, IOMUXC_BASE_ADDR + 0x57c, 0x00000030)
++MXC_DCD_ITEM(9, IOMUXC_BASE_ADDR + 0x590, 0x00003000)
++MXC_DCD_ITEM(10, IOMUXC_BASE_ADDR + 0x598, 0x00003000)
++MXC_DCD_ITEM(11, IOMUXC_BASE_ADDR + 0x58c, 0x00000000)
++MXC_DCD_ITEM(12, IOMUXC_BASE_ADDR + 0x59c, 0x00003030)
++MXC_DCD_ITEM(13, IOMUXC_BASE_ADDR + 0x5a0, 0x00003030)
++MXC_DCD_ITEM(14, IOMUXC_BASE_ADDR + 0x78c, 0x00000030)
++
++/* data strobe */
++MXC_DCD_ITEM(15, IOMUXC_BASE_ADDR + 0x750, 0x00020000)
++
++MXC_DCD_ITEM(16, IOMUXC_BASE_ADDR + 0x5a8, 0x00000030)
++MXC_DCD_ITEM(17, IOMUXC_BASE_ADDR + 0x5b0, 0x00000030)
++MXC_DCD_ITEM(18, IOMUXC_BASE_ADDR + 0x524, 0x00000030)
++MXC_DCD_ITEM(19, IOMUXC_BASE_ADDR + 0x51c, 0x00000030)
++MXC_DCD_ITEM(20, IOMUXC_BASE_ADDR + 0x518, 0x00000030)
++MXC_DCD_ITEM(21, IOMUXC_BASE_ADDR + 0x50c, 0x00000030)
++MXC_DCD_ITEM(22, IOMUXC_BASE_ADDR + 0x5b8, 0x00000030)
++MXC_DCD_ITEM(23, IOMUXC_BASE_ADDR + 0x5c0, 0x00000030)
++
++/* data */
++MXC_DCD_ITEM(24, IOMUXC_BASE_ADDR + 0x774, 0x00020000)
++
++MXC_DCD_ITEM(25, IOMUXC_BASE_ADDR + 0x784, 0x00000030)
++MXC_DCD_ITEM(26, IOMUXC_BASE_ADDR + 0x788, 0x00000030)
++MXC_DCD_ITEM(27, IOMUXC_BASE_ADDR + 0x794, 0x00000030)
++MXC_DCD_ITEM(28, IOMUXC_BASE_ADDR + 0x79c, 0x00000030)
++MXC_DCD_ITEM(29, IOMUXC_BASE_ADDR + 0x7a0, 0x00000030)
++MXC_DCD_ITEM(30, IOMUXC_BASE_ADDR + 0x7a4, 0x00000030)
++MXC_DCD_ITEM(31, IOMUXC_BASE_ADDR + 0x7a8, 0x00000030)
++MXC_DCD_ITEM(32, IOMUXC_BASE_ADDR + 0x748, 0x00000030)
++
++MXC_DCD_ITEM(33, IOMUXC_BASE_ADDR + 0x5ac, 0x00000030)
++MXC_DCD_ITEM(34, IOMUXC_BASE_ADDR + 0x5b4, 0x00000030)
++MXC_DCD_ITEM(35, IOMUXC_BASE_ADDR + 0x528, 0x00000030)
++MXC_DCD_ITEM(36, IOMUXC_BASE_ADDR + 0x520, 0x00000030)
++MXC_DCD_ITEM(37, IOMUXC_BASE_ADDR + 0x514, 0x00000030)
++MXC_DCD_ITEM(38, IOMUXC_BASE_ADDR + 0x510, 0x00000030)
++MXC_DCD_ITEM(39, IOMUXC_BASE_ADDR + 0x5bc, 0x00000030)
++MXC_DCD_ITEM(40, IOMUXC_BASE_ADDR + 0x5c4, 0x00000030)
++
++/* calibrations */
++/* ZQ */
++MXC_DCD_ITEM(41, MMDC_P0_BASE_ADDR + 0x800, 0xA1390003)
++MXC_DCD_ITEM(42, MMDC_P1_BASE_ADDR + 0x800, 0xA1390003)
++
++/* write leveling */
++MXC_DCD_ITEM(43, MMDC_P0_BASE_ADDR + 0x80c, 0x00010001)
++MXC_DCD_ITEM(44, MMDC_P0_BASE_ADDR + 0x810, 0x00010001)
++                                            
++MXC_DCD_ITEM(45, MMDC_P1_BASE_ADDR + 0x80c, 0x0001001F)
++MXC_DCD_ITEM(46, MMDC_P1_BASE_ADDR + 0x810, 0x0001001F)
++
++/* DQS gating, read delay, write delay calibration values based on calibration compare of 0x00ffff00 */
++MXC_DCD_ITEM(47, MMDC_P0_BASE_ADDR + 0x83c, 0x03550361)
++MXC_DCD_ITEM(48, MMDC_P0_BASE_ADDR + 0x840, 0x03550352)
++MXC_DCD_ITEM(49, MMDC_P1_BASE_ADDR + 0x83c, 0x037D037D)
++MXC_DCD_ITEM(50, MMDC_P1_BASE_ADDR + 0x840, 0x0367033C)
++
++/* read calibration */
++MXC_DCD_ITEM(51, MMDC_P0_BASE_ADDR + 0x848, 0x41353739)
++MXC_DCD_ITEM(52, MMDC_P1_BASE_ADDR + 0x848, 0x3A3C3644)
++
++/* write calibration */
++MXC_DCD_ITEM(53, MMDC_P0_BASE_ADDR + 0x850, 0x3A454948)
++MXC_DCD_ITEM(54, MMDC_P1_BASE_ADDR + 0x850, 0x4D364C3F)
++
++/* read data bit delay: (3 is the recommended default value, although out of reset value is 0) */
++MXC_DCD_ITEM(55, MMDC_P0_BASE_ADDR + 0x81c, 0x33333333)
++MXC_DCD_ITEM(56, MMDC_P0_BASE_ADDR + 0x820, 0x33333333)
++MXC_DCD_ITEM(57, MMDC_P0_BASE_ADDR + 0x824, 0x33333333)
++MXC_DCD_ITEM(58, MMDC_P0_BASE_ADDR + 0x828, 0x33333333)
++MXC_DCD_ITEM(59, MMDC_P1_BASE_ADDR + 0x81c, 0x33333333)
++MXC_DCD_ITEM(60, MMDC_P1_BASE_ADDR + 0x820, 0x33333333)
++MXC_DCD_ITEM(61, MMDC_P1_BASE_ADDR + 0x824, 0x33333333)
++MXC_DCD_ITEM(62, MMDC_P1_BASE_ADDR + 0x828, 0x33333333)
++
++/* complete calibration by forced measurment */
++MXC_DCD_ITEM(63, MMDC_P0_BASE_ADDR + 0x8b8, 0x00000800)
++MXC_DCD_ITEM(64, MMDC_P1_BASE_ADDR + 0x8b8, 0x00000800)
++
++/* MMDC init */
++/* in DDR3, 64-bit mode, only MMDC0 is initiated */
++MXC_DCD_ITEM(65, MMDC_P0_BASE_ADDR + 0x004, 0x00020036)
++MXC_DCD_ITEM(66, MMDC_P0_BASE_ADDR + 0x008, 0x09444040)
++MXC_DCD_ITEM(67, MMDC_P0_BASE_ADDR + 0x00c, 0x40445323)
++MXC_DCD_ITEM(68, MMDC_P0_BASE_ADDR + 0x010, 0xB66E8C63)
++MXC_DCD_ITEM(69, MMDC_P0_BASE_ADDR + 0x014, 0x01ff00db)
++MXC_DCD_ITEM(70, MMDC_P0_BASE_ADDR + 0x018, 0x00091740)
++
++MXC_DCD_ITEM(71, MMDC_P0_BASE_ADDR + 0x01c, 0x00008000)
++
++MXC_DCD_ITEM(72, MMDC_P0_BASE_ADDR + 0x02c, 0x000026d2)
++MXC_DCD_ITEM(73, MMDC_P0_BASE_ADDR + 0x030, 0x005b0e21)
++MXC_DCD_ITEM(74, MMDC_P0_BASE_ADDR + 0x040, 0x0000004F)
++
++MXC_DCD_ITEM(75, MMDC_P0_BASE_ADDR + 0x000, 0x841A0000)
++
++/* Initialize 2GB DDR3 - Micron MT41J128M */
++MXC_DCD_ITEM(76, MMDC_P0_BASE_ADDR + 0x01c, 0x04008032)
++MXC_DCD_ITEM(77, MMDC_P0_BASE_ADDR + 0x01c, 0x0400803a)
++MXC_DCD_ITEM(78, MMDC_P0_BASE_ADDR + 0x01c, 0x00008033)
++MXC_DCD_ITEM(79, MMDC_P0_BASE_ADDR + 0x01c, 0x0000803b)
++MXC_DCD_ITEM(80, MMDC_P0_BASE_ADDR + 0x01c, 0x00428031)
++MXC_DCD_ITEM(81, MMDC_P0_BASE_ADDR + 0x01c, 0x00428039)
++MXC_DCD_ITEM(82, MMDC_P0_BASE_ADDR + 0x01c, 0x07208030)
++MXC_DCD_ITEM(83, MMDC_P0_BASE_ADDR + 0x01c, 0x07208038)
++
++/* DDR device ZQ calibration */
++MXC_DCD_ITEM(84, MMDC_P0_BASE_ADDR + 0x01c, 0x04008040)
++MXC_DCD_ITEM(85, MMDC_P0_BASE_ADDR + 0x01c, 0x04008048)
++
++/* final DDR setup, before operation start */
++MXC_DCD_ITEM(86, MMDC_P0_BASE_ADDR + 0x020, 0x00005800)
++MXC_DCD_ITEM(87, MMDC_P0_BASE_ADDR + 0x818, 0x00011117)
++MXC_DCD_ITEM(88, MMDC_P1_BASE_ADDR + 0x818, 0x00011117)
++
++MXC_DCD_ITEM(89, MMDC_P0_BASE_ADDR + 0x004, 0x00025576)
++MXC_DCD_ITEM(90, MMDC_P0_BASE_ADDR + 0x404, 0x00011006)
++MXC_DCD_ITEM(91, MMDC_P0_BASE_ADDR + 0x01c, 0x00000000)
++
++/* enable AXI cache for VDOA/VPU/IPU */
++MXC_DCD_ITEM(92, IOMUXC_BASE_ADDR + 0x010, 0xf00000ff)
++/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
++MXC_DCD_ITEM(93, IOMUXC_BASE_ADDR + 0x018, 0x007f007f)
++MXC_DCD_ITEM(94, IOMUXC_BASE_ADDR + 0x01c, 0x007f007f)
++
++#endif
+diff --git a/board/freescale/cgt_qmx6/lowlevel_init.S b/board/freescale/cgt_qmx6/lowlevel_init.S
+new file mode 100644
+index 0000000..4a31cb0
+--- /dev/null
++++ b/board/freescale/cgt_qmx6/lowlevel_init.S
+@@ -0,0 +1,167 @@
++/*
++ * Copyright (C) 2011 Freescale Semiconductor, Inc.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <config.h>
++#include <asm/arch/mx6.h>
++
++/*
++ Disable L2Cache because ROM turn it on when uboot use plug-in.
++ If L2Cache is on default, there are cache coherence problem if kernel have
++ not config L2Cache.
++*/
++.macro init_l2cc
++    ldr     r1, =0xa02000
++    ldr     r0, =0x0
++    str     r0, [r1, #0x100]
++.endm /* init_l2cc */
++
++/* invalidate the D-CACHE */
++.macro inv_dcache
++    mov     r0,#0
++    mcr     p15,2,r0,c0,c0,0  /* cache size selection register, select dcache */
++    mrc     p15,1,r0,c0,c0,0  /* cache size ID register */
++    mov     r0,r0,ASR #13
++    ldr     r3,=0xfff
++    and     r0,r0,r3
++    cmp     r0,#0x7f
++    moveq   r6,#0x1000
++    beq     size_done
++    cmp     r0,#0xff
++    moveq   r6,#0x2000
++    movne   r6,#0x4000
++
++size_done:
++    mov     r2,#0
++    mov     r3,#0x40000000
++    mov     r4,#0x80000000
++    mov     r5,#0xc0000000
++
++d_inv_loop:
++    mcr     p15,0,r2,c7,c6,2  /* invalidate dcache by set / way */
++    mcr     p15,0,r3,c7,c6,2  /* invalidate dcache by set / way */
++    mcr     p15,0,r4,c7,c6,2  /* invalidate dcache by set / way */
++    mcr     p15,0,r5,c7,c6,2  /* invalidate dcache by set / way */
++    add     r2,r2,#0x20
++    add     r3,r3,#0x20
++    add     r4,r4,#0x20
++    add     r5,r5,#0x20
++
++    cmp     r2,r6
++    bne     d_inv_loop
++.endm
++
++/* AIPS setup - Only setup MPROTx registers.
++ * The PACR default values are good.*/
++.macro init_aips
++	/*
++	 * Set all MPROTx to be non-bufferable, trusted for R/W,
++	 * not forced to user-mode.
++	 */
++	ldr r0, =AIPS1_ON_BASE_ADDR
++	ldr r1, =0x77777777
++	str r1, [r0, #0x0]
++	str r1, [r0, #0x4]
++	ldr r1, =0x0
++	str r1, [r0, #0x40]
++	str r1, [r0, #0x44]
++	str r1, [r0, #0x48]
++	str r1, [r0, #0x4C]
++	str r1, [r0, #0x50]
++
++	ldr r0, =AIPS2_ON_BASE_ADDR
++	ldr r1, =0x77777777
++	str r1, [r0, #0x0]
++	str r1, [r0, #0x4]
++	ldr r1, =0x0
++	str r1, [r0, #0x40]
++	str r1, [r0, #0x44]
++	str r1, [r0, #0x48]
++	str r1, [r0, #0x4C]
++	str r1, [r0, #0x50]
++.endm /* init_aips */
++
++.macro setup_pll pll, freq
++.endm
++
++.macro init_clock
++
++/* PLL1, PLL2, and PLL3 are enabled by ROM */
++#ifdef CONFIG_PLL3
++	/* enable PLL3 for UART */
++	ldr r0, ANATOP_BASE_ADDR_W
++
++	/* power up PLL */
++	ldr r1, [r0, #ANATOP_USB1]
++	orr r1, r1, #0x1000
++	str r1, [r0, #ANATOP_USB1]
++
++	/* enable PLL */
++	ldr r1, [r0, #ANATOP_USB1]
++	orr r1, r1, #0x2000
++	str r1, [r0, #ANATOP_USB1]
++
++	/* wait PLL lock */
++100:
++	ldr r1, [r0, #ANATOP_USB1]
++	mov r1, r1, lsr #31
++	cmp r1, #0x1
++	bne 100b
++
++	/* clear bypass bit */
++	ldr r1, [r0, #ANATOP_USB1]
++	and r1, r1, #0xfffeffff
++	str r1, [r0, #ANATOP_USB1]
++#endif
++
++	/* Restore the default values in the Gate registers */
++	ldr r0, CCM_BASE_ADDR_W
++	ldr r1, =0xC0003F
++	str r1, [r0, #CLKCTL_CCGR0]
++	ldr r1, =0x30FC00
++	str r1, [r0, #CLKCTL_CCGR1]
++	ldr r1, =0xFFFC000
++	str r1, [r0, #CLKCTL_CCGR2]
++	ldr r1, =0x3FF00000
++	str r1, [r0, #CLKCTL_CCGR3]
++	ldr r1, =0xFFF300
++	str r1, [r0, #CLKCTL_CCGR4]
++	ldr r1, =0xF0000C3
++	str r1, [r0, #CLKCTL_CCGR5]
++	ldr r1, =0x03FF
++	str r1, [r0, #CLKCTL_CCGR6]
++.endm
++
++.section ".text.init", "x"
++
++.globl lowlevel_init
++lowlevel_init:
++
++	inv_dcache
++
++	init_l2cc
++
++	init_aips
++
++	init_clock
++
++	mov pc, lr
++
++/* Board level setting value */
++ANATOP_BASE_ADDR_W:		.word ANATOP_BASE_ADDR
++CCM_BASE_ADDR_W:		.word CCM_BASE_ADDR
+diff --git a/board/freescale/cgt_qmx6/u-boot.lds b/board/freescale/cgt_qmx6/u-boot.lds
+new file mode 100644
+index 0000000..28ee8e0
+--- /dev/null
++++ b/board/freescale/cgt_qmx6/u-boot.lds
+@@ -0,0 +1,74 @@
++/*
++ * January 2004 - Changed to support H4 device
++ * Copyright (c) 2004 Texas Instruments
++ *
++ * (C) Copyright 2002
++ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
++ *
++ * (C) Copyright 2011 Freescale Semiconductor, Inc.
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
++OUTPUT_ARCH(arm)
++ENTRY(_start)
++SECTIONS
++{
++	. = 0x00000000;
++
++	. = ALIGN(4);
++	.text	   :
++	{
++	  /* WARNING - the following is hand-optimized to fit within	*/
++	  /* the sector layout of our flash chips!	XXX FIXME XXX	*/
++	  board/freescale/cgt_qmx6/flash_header.o	(.text.flasheader)
++	  cpu/arm_cortexa8/start.o
++	  board/freescale/cgt_qmx6/libcgt_qmx6.a	(.text)
++	  lib_arm/libarm.a		(.text)
++	  net/libnet.a			(.text)
++	  drivers/mtd/libmtd.a		(.text)
++	  drivers/mmc/libmmc.a		(.text)
++
++	  . = DEFINED(env_offset) ? env_offset : .;
++	  common/env_embedded.o(.text)
++
++	  *(.text)
++	}
++
++	. = ALIGN(4);
++	.rodata : { *(.rodata) }
++
++	. = ALIGN(4);
++	.data : { *(.data) }
++
++	. = ALIGN(4);
++	.got : { *(.got) }
++
++	. = .;
++	__u_boot_cmd_start = .;
++	.u_boot_cmd : { *(.u_boot_cmd) }
++	__u_boot_cmd_end = .;
++
++	. = ALIGN(4);
++	_end_of_copy = .; /* end_of ROM copy code here */
++	__bss_start = .;
++	.bss : { *(.bss) }
++	_end = .;
++}
+diff --git a/common/cmd_mii.c b/common/cmd_mii.c
+index 65e13c3..765eba9 100644
+--- a/common/cmd_mii.c
++++ b/common/cmd_mii.c
+@@ -300,12 +300,31 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+ 	unsigned short	data;
+ 	int		rcode = 0;
+ 	char		*devname;
++	struct eth_device *current;
+ 
+ 	if (argc < 2) {
+ 		cmd_usage(cmdtp);
+ 		return 1;
+ 	}
+ 
++// sml +++ debug
++	current = eth_get_dev();
++	if (!current) {
++		puts ("No ethernet found.\n");
++		return -1;
++	}
++	
++	if (current->state != ETH_STATE_ACTIVE)
++	{
++		eth_halt();
++		eth_set_current();
++		if (eth_init(NULL) < 0) {
++			eth_halt();
++			return(-1);
++		}
++	}
++// sml +++ debug end	
++	
+ #if defined(CONFIG_MII_INIT)
+ 	mii_init ();
+ #endif
+diff --git a/drivers/mtd/spi/imx_spi_nor_sst.c b/drivers/mtd/spi/imx_spi_nor_sst.c
+index d484a51..19ba1bf 100644
+--- a/drivers/mtd/spi/imx_spi_nor_sst.c
++++ b/drivers/mtd/spi/imx_spi_nor_sst.c
+@@ -61,9 +61,9 @@ static const struct imx_spi_flash_params imx_spi_flash_table[] = {
+ 	{
+ 		.idcode1		= 0x25,
+ 		.block_size		= SZ_64K,
+-		.block_count		= 32,
+-		.device_size		= SZ_64K * 32,
+-		.name			= "SST25VF016B - 2MB",
++		.block_count		= 64,
++		.device_size		= SZ_64K * 64,
++		.name			= "SST25VF032B - 4MB",
+ 	},
+ };
+ 
+@@ -184,6 +184,15 @@ static int spi_nor_erase_block(struct spi_flash *flash,
+ 				block_addr);
+ 		return -1;
+ 	}
++	
++	#ifndef CONFIG_MFGAREA_UNPROTECT
++	/* protect 16KB at the end of flash for manufacturing purpose */
++	if ((addr + block_size) > (flash->size - 16*1024))
++	{
++		printf("Error - tried to erase reserved area\n");
++		return -1;
++	}
++	#endif
+ 
+ 	if (ENABLE_WRITE_STATUS(flash) != 0 ||
+ 			spi_nor_write_status(flash, 0) != 0) {
+@@ -328,6 +337,15 @@ static int spi_nor_flash_write(struct spi_flash *flash, u32 offset,
+ 	debug("%s(flash addr=0x%08x, ram=%p, len=0x%x)\n",
+ 			__func__, offset, buf, len);
+ 
++	#ifndef CONFIG_MFGAREA_UNPROTECT
++	/* protect 16KB at the end of flash for manufacturing purpose */
++	if ((d_addr + len) > (flash->size - 16*1024))
++	{
++		printf("Error - tried to write to reserved area\n");
++		return -1;
++	}
++	#endif
++	
+ 	if (ENABLE_WRITE_STATUS(flash) != 0 ||
+ 			spi_nor_write_status(flash, 0) != 0) {
+ 		printf("Error: %s: %d\n", __func__, __LINE__);
+diff --git a/include/asm-arm/mach-types.h b/include/asm-arm/mach-types.h
+index 2630bac..e1fc3b3 100644
+--- a/include/asm-arm/mach-types.h
++++ b/include/asm-arm/mach-types.h
+@@ -3259,6 +3259,7 @@ extern unsigned int __machine_arch_type;
+ #define MACH_TYPE_MX6Q_ARM2            3837
+ #define MACH_TYPE_MX6Q_SABRESD	       3980
+ #define MACH_TYPE_MX6SL_ARM2           4091
++#define MACH_TYPE_CGT_QMX6             4122
+ #define MACH_TYPE_MX6SL_EVK            4307
+ 
+ #ifdef CONFIG_ARCH_EBSA110
+@@ -42213,6 +42214,18 @@ extern unsigned int __machine_arch_type;
+ # define machine_is_mx6sl_evk()	(0)
+ #endif
+ 
++#ifdef CONFIG_MACH_CGT_QMX6
++# ifdef machine_arch_type
++#  undef machine_arch_type
++#  define machine_arch_type	__machine_arch_type
++# else
++#  define machine_arch_type	MACH_TYPE_CGT_QMX6
++# endif
++# define machine_is_cgt_qmx6()	(machine_arch_type == MACH_TYPE_CGT_QMX6)
++#else
++# define machine_is_cgt_qmx6()	(0)
++#endif
++
+ /*
+  * These have not yet been registered
+  */
+diff --git a/include/configs/cgt_qmx6.h b/include/configs/cgt_qmx6.h
+new file mode 100644
+index 0000000..e151939
+--- /dev/null
++++ b/include/configs/cgt_qmx6.h
+@@ -0,0 +1,332 @@
++/*
++ * Copyright (C) 2011-2012 Freescale Semiconductor, Inc.
++ *
++ * Configuration settings for the MX6Q SABRE-Lite Freescale board.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++#include <asm/arch/mx6.h>
++
++ /* High Level Configuration Options */
++#define CONFIG_ARMV7	/* This is armv7 Cortex-A9 CPU core */
++#define CONFIG_MXC
++#define CONFIG_MX6Q
++#define CONFIG_FLASH_HEADER
++#define CONFIG_FLASH_HEADER_OFFSET 0x400
++#define CONFIG_MX6_CLK32	   32768
++
++#define CONFIG_SKIP_RELOCATE_UBOOT
++
++#define CONFIG_ARCH_CPU_INIT
++#undef CONFIG_ARCH_MMU /* disable MMU first */
++#define CONFIG_L2_OFF  /* disable L2 cache first*/
++
++#define CONFIG_MX6_HCLK_FREQ	24000000
++
++#define CONFIG_DISPLAY_CPUINFO
++#define CONFIG_DISPLAY_BOARDINFO
++
++#define CONFIG_SYS_64BIT_VSPRINTF
++
++#define BOARD_LATE_INIT
++
++#define CONFIG_CMDLINE_TAG	/* enable passing of ATAGs */
++#define CONFIG_REVISION_TAG
++#define CONFIG_SETUP_MEMORY_TAGS
++#define CONFIG_INITRD_TAG
++
++/*
++ * Size of malloc() pool
++ */
++#define CONFIG_SYS_MALLOC_LEN		(2 * 1024 * 1024)
++/* size in bytes reserved for initial data */
++#define CONFIG_SYS_GBL_DATA_SIZE	128
++
++/*
++ * Hardware drivers
++ */
++#define CONFIG_MXC_UART
++#define CONFIG_UART_BASE_ADDR   UART2_BASE_ADDR
++
++/* allow to overwrite serial and ethaddr */
++#define CONFIG_ENV_OVERWRITE
++#define CONFIG_CONS_INDEX		1
++#define CONFIG_BAUDRATE			115200
++#define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
++
++/***********************************************************
++ * Command definition
++ ***********************************************************/
++
++#include <config_cmd_default.h>
++
++#define CONFIG_CMD_PING
++#define CONFIG_CMD_DHCP
++#define CONFIG_CMD_MII
++#define CONFIG_CMD_NET
++#define CONFIG_NET_RETRY_COUNT  100
++#define CONFIG_NET_MULTI 1
++#define CONFIG_BOOTP_SUBNETMASK
++#define CONFIG_BOOTP_GATEWAY
++#define CONFIG_BOOTP_DNS
++
++#define CONFIG_CMD_SPI
++#define CONFIG_CMD_I2C
++
++/* Enable below configure when supporting nand */
++
++#define CONFIG_CMD_MMC
++#define CONFIG_MMC_8BIT_PORTS	0x00000002
++#define CONFIG_CMD_SF
++#define CONFIG_CMD_ENV
++#define CONFIG_CMD_REGUL
++
++#define CONFIG_CMD_CLOCK
++#define CONFIG_REF_CLK_FREQ CONFIG_MX6_HCLK_FREQ
++
++#define CONFIG_CMD_SATA
++#undef CONFIG_CMD_IMLS
++
++#define CONFIG_CMD_IMX_DOWNLOAD_MODE
++
++#define CONFIG_BOOTDELAY 3
++
++#define CONFIG_PRIME	"FEC0"
++
++#define CONFIG_LOADADDR		0x10800000	/* loadaddr env var */
++#define CONFIG_RD_LOADADDR	0x11000000
++
++#define	CONFIG_EXTRA_ENV_SETTINGS					\
++		"netdev=eth0\0"						\
++		"ethprime=FEC0\0"					\
++		"ethaddr=00:00:00:00:00:00\0" \
++		"uboot=u-boot.bin\0"			\
++		"kernel=uImage\0"				\
++		"vid_dev0=hdmi,1920x1080M@60,if=RGB24\0" \
++		"vid_dev1=ldb,LDB-XGA,if=RGB666\0" \
++		"bootargs=console=ttymxc1,115200\0" \
++		"bootargs_base=setenv bootargs ${bootargs} " \
++			"video=mxcfb0:dev=${vid_dev0} " \
++			"video=mxcfb1:dev=${vid_dev1}\0" \
++		"bootargs_mmc=setenv bootargs ${bootargs} rootwait enable_wait_mode=on\0" \
++		"bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs "\
++			"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp " \
++			"enable_wait_mode=off\0" \
++		"bootcmd_net=dhcp; run bootargs_base bootargs_nfs;bootm\0" \
++		"bootcmd_mmc=run bootargs_base bootargs_mmc;" \
++			"for disk in 0 1 2; do mmc dev ${disk};" \
++				"for fs in fat ext2 ; do " \
++					"${fs}load mmc ${disk}:1 10008000 " \
++						"/6q_bootscript && " \
++					"source 10008000 ; " \
++				"done ; " \
++			"done\0" \
++		"bootcmd=run bootcmd_mmc\0" \
++		"clearenv=sf probe 1 && sf erase 0xc0000 0x2000 && " \
++			"echo restored environment to factory default\0" \
++		"upgradeu=for disk in 0 1 2; do mmc dev ${disk} ;" \
++				"for fs in fat ext2 ; do " \
++					"${fs}load mmc ${disk}:1 10008000 " \
++						"/6q_upgrade && " \
++					"source 10008000 ; " \
++				"done ; " \
++			"done\0" \
++		"bootfile=_BOOT_FILE_PATH_IN_TFTP_\0" \
++		"nfsroot=_ROOTFS_PATH_IN_NFS_\0"
++
++
++#define CONFIG_ARP_TIMEOUT	200UL
++
++/*
++ * Miscellaneous configurable options
++ */
++#define CONFIG_SYS_LONGHELP		/* undef to save memory */
++#define CONFIG_SYS_PROMPT		"conga-QMX6 U-Boot > "
++#define CONFIG_AUTO_COMPLETE
++#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
++/* Print Buffer Size */
++#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
++#define CONFIG_SYS_MAXARGS	16	/* max number of command args */
++#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
++
++#define CONFIG_SYS_MEMTEST_START	0x10000000	/* memtest works on */
++#define CONFIG_SYS_MEMTEST_END		0x10010000
++
++#undef	CONFIG_SYS_CLKS_IN_HZ		/* everything, incl board info, in Hz */
++
++#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
++
++#define CONFIG_SYS_HZ			1000
++
++#define CONFIG_CMDLINE_EDITING
++#define CONFIG_SYS_HUSH_PARSER		1 /* Use the HUSH parser */
++#ifdef	CONFIG_SYS_HUSH_PARSER
++#define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "
++#endif
++
++#define CONFIG_FEC0_IOBASE	ENET_BASE_ADDR
++#define CONFIG_FEC0_PINMUX	-1
++#define CONFIG_FEC0_MIIBASE	-1
++#define CONFIG_GET_FEC_MAC_ADDR_FROM_ENV
++#define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
++#define CONFIG_MXC_FEC
++#define CONFIG_FEC0_PHY_ADDR		6
++#define CONFIG_ETH_PRIME
++#define CONFIG_RMII
++#define CONFIG_PHY_MICREL_KSZ9021
++#define CONFIG_CMD_MII
++#define CONFIG_CMD_DHCP
++#define CONFIG_CMD_PING
++#define CONFIG_IPADDR			192.168.1.103
++
++/*The IP ADDRESS of SERVERIP*/
++#define CONFIG_SERVERIP			_SERVER_IP_ADDR_
++
++#define CONFIG_NETMASK			255.255.255.0
++
++/*
++ * OCOTP Configs
++ */
++#ifdef CONFIG_CMD_IMXOTP
++	#define CONFIG_IMX_OTP
++	#define IMX_OTP_BASE		OCOTP_BASE_ADDR
++	#define IMX_OTP_ADDR_MAX	0x7F
++	#define IMX_OTP_DATA_ERROR_VAL	0xBADABADA
++#endif
++
++/*
++ * I2C Configs
++ */
++#ifdef CONFIG_CMD_I2C
++	#define CONFIG_HARD_I2C         1
++	#define CONFIG_I2C_MXC          1
++	#define CONFIG_SYS_I2C_PORT             I2C2_BASE_ADDR
++	#define CONFIG_SYS_I2C_SPEED            100000
++	#define CONFIG_SYS_I2C_SLAVE            0x08
++#endif
++
++/*
++ * SPI Configs
++ */
++#ifdef CONFIG_CMD_SF
++	#define CONFIG_FSL_SF		1
++	#define CONFIG_SPI_FLASH_IMX_SST	1
++	#define CONFIG_SPI_FLASH_CS	1
++	#define CONFIG_IMX_ECSPI
++	#define IMX_CSPI_VER_2_3	1
++	#define MAX_SPI_BYTES		(64 * 4)
++#endif
++
++/* Regulator Configs */
++#ifdef CONFIG_CMD_REGUL
++	#define CONFIG_ANATOP_REGULATOR
++	#define CONFIG_CORE_REGULATOR_NAME "vdd1p1"
++	#define CONFIG_PERIPH_REGULATOR_NAME "vdd1p1"
++#endif
++
++/*
++ * MMC Configs
++ */
++#ifdef CONFIG_CMD_MMC
++	#define CONFIG_MMC
++	#define CONFIG_GENERIC_MMC
++	#define CONFIG_IMX_MMC
++	#define CONFIG_SYS_FSL_USDHC_NUM        3
++	#define CONFIG_SYS_FSL_ESDHC_ADDR       0
++	#define CONFIG_SYS_MMC_ENV_DEV  2
++	#define CONFIG_DOS_PARTITION	1
++	#define CONFIG_CMD_FAT		1
++	#define CONFIG_CMD_EXT2		1
++
++	/* detect whether SD1, 2, 3, or 4 is boot device */
++	#define CONFIG_DYNAMIC_MMC_DEVNO
++
++	/* Setup target delay in DDR mode for each SD port */
++	#define CONFIG_GET_DDR_TARGET_DELAY
++#endif
++
++/*
++ * SATA Configs
++ */
++#ifdef CONFIG_CMD_SATA
++	#define CONFIG_DWC_AHSATA
++	#define CONFIG_SYS_SATA_MAX_DEVICE	1
++	#define CONFIG_DWC_AHSATA_PORT_ID	0
++	#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
++	#define CONFIG_LBA48
++	#define CONFIG_LIBATA
++
++	#define CONFIG_DOS_PARTITION	1
++	#define CONFIG_CMD_FAT		1
++	#define CONFIG_CMD_EXT2		1
++#endif
++
++/*
++ * USB OTG
++ */
++#define CONFIG_IMX_UDC	1
++ 
++/*-----------------------------------------------------------------------
++ * Stack sizes
++ *
++ * The stack sizes are set up in start.S using the settings below
++ */
++#define CONFIG_STACKSIZE	(128 * 1024)	/* regular stack */
++
++/*-----------------------------------------------------------------------
++ * Physical Memory Map
++ */
++#define CONFIG_NR_DRAM_BANKS	1
++#define PHYS_SDRAM_1		CSD0_DDR_BASE_ADDR
++#define PHYS_SDRAM_1_SIZE	(2u * 1024 * 1024 * 1024)
++#define iomem_valid_addr(addr, size) \
++	(addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE))
++
++/*-----------------------------------------------------------------------
++ * FLASH and environment organization
++ */
++#define CONFIG_SYS_NO_FLASH
++
++/* Monitor at beginning of flash */
++/* #define CONFIG_FSL_ENV_IN_MMC */
++/* #define CONFIG_FSL_ENV_IN_SATA */
++#define CONFIG_FSL_ENV_IN_SF
++
++#define CONFIG_ENV_SECT_SIZE    (8 * 1024)
++#define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
++
++#if defined(CONFIG_FSL_ENV_IN_NAND)
++	#define CONFIG_ENV_IS_IN_NAND 1
++	#define CONFIG_ENV_OFFSET	0x100000
++#elif defined(CONFIG_FSL_ENV_IN_MMC)
++	#define CONFIG_ENV_IS_IN_MMC	1
++	#define CONFIG_ENV_OFFSET	(768 * 1024)
++#elif defined(CONFIG_FSL_ENV_IN_SATA)
++	#define CONFIG_ENV_IS_IN_SATA   1
++	#define CONFIG_SATA_ENV_DEV     0
++	#define CONFIG_ENV_OFFSET       (768 * 1024)
++#elif defined(CONFIG_FSL_ENV_IN_SF)
++	#define CONFIG_ENV_IS_IN_SPI_FLASH	1
++	#define CONFIG_ENV_SPI_CS		1
++	#define CONFIG_ENV_OFFSET       (768 * 1024)
++#else
++	#define CONFIG_ENV_IS_NOWHERE	1
++#endif
++#endif				/* __CONFIG_H */
+diff --git a/include/configs/cgt_qmx6_android.h b/include/configs/cgt_qmx6_android.h
+new file mode 100644
+index 0000000..e1d5459
+--- /dev/null
++++ b/include/configs/cgt_qmx6_android.h
+@@ -0,0 +1,328 @@
++/*
++ * Copyright (C) 2011-2012 Freescale Semiconductor, Inc.
++ *
++ * Configuration settings for the MX6Q SABRE-Lite Freescale board.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++#include <asm/arch/mx6.h>
++
++ /* High Level Configuration Options */
++#define CONFIG_ARMV7	/* This is armv7 Cortex-A9 CPU core */
++#define CONFIG_MXC
++#define CONFIG_MX6Q
++#define CONFIG_FLASH_HEADER
++#define CONFIG_FLASH_HEADER_OFFSET 0x400
++#define CONFIG_MX6_CLK32	   32768
++
++#define CONFIG_SKIP_RELOCATE_UBOOT
++
++#define CONFIG_ARCH_CPU_INIT
++#undef CONFIG_ARCH_MMU /* disable MMU first */
++#define CONFIG_L2_OFF  /* disable L2 cache first*/
++
++#define CONFIG_MX6_HCLK_FREQ	24000000
++
++#define CONFIG_DISPLAY_CPUINFO
++#define CONFIG_DISPLAY_BOARDINFO
++
++#define CONFIG_SYS_64BIT_VSPRINTF
++
++#define BOARD_LATE_INIT
++
++#define CONFIG_CMDLINE_TAG	/* enable passing of ATAGs */
++#define CONFIG_REVISION_TAG
++#define CONFIG_SETUP_MEMORY_TAGS
++#define CONFIG_INITRD_TAG
++
++/*
++ * Size of malloc() pool
++ */
++#define CONFIG_SYS_MALLOC_LEN		(2 * 1024 * 1024)
++/* size in bytes reserved for initial data */
++#define CONFIG_SYS_GBL_DATA_SIZE	128
++
++/*
++ * Hardware drivers
++ */
++#define CONFIG_MXC_UART
++#define CONFIG_UART_BASE_ADDR   UART2_BASE_ADDR
++
++/* allow to overwrite serial and ethaddr */
++#define CONFIG_ENV_OVERWRITE
++#define CONFIG_CONS_INDEX		1
++#define CONFIG_BAUDRATE			115200
++#define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
++
++/* Android related config */
++#define CONFIG_USB_DEVICE
++#define CONFIG_IMX_UDC		       1
++#define CONFIG_FASTBOOT		       1
++#define CONFIG_FASTBOOT_STORAGE_EMMC_SATA
++#define CONFIG_FASTBOOT_VENDOR_ID      0xbb4
++#define CONFIG_FASTBOOT_PRODUCT_ID     0xc01
++#define CONFIG_FASTBOOT_BCD_DEVICE     0x311
++#define CONFIG_FASTBOOT_MANUFACTURER_STR  "Freescale"
++#define CONFIG_FASTBOOT_PRODUCT_NAME_STR "i.mx6q qmx6"
++#define CONFIG_FASTBOOT_INTERFACE_STR	 "Android fastboot"
++#define CONFIG_FASTBOOT_CONFIGURATION_STR  "Android fastboot"
++#define CONFIG_FASTBOOT_SERIAL_NUM	"12345"
++#define CONFIG_FASTBOOT_SATA_NO		 0
++#define CONFIG_FASTBOOT_TRANSFER_BUF	0x30000000
++#define CONFIG_FASTBOOT_TRANSFER_BUF_SIZE 0x10000000 /* 256M byte */
++
++#define CONFIG_CMD_BOOTI
++#define CONFIG_ANDROID_RECOVERY
++#define CONFIG_ANDROID_BOOT_PARTITION_MMC 1
++#define CONFIG_ANDROID_SYSTEM_PARTITION_MMC 5
++#define CONFIG_ANDROID_RECOVERY_PARTITION_MMC 2
++#define CONFIG_ANDROID_CACHE_PARTITION_MMC 6
++
++#define CONFIG_ANDROID_RECOVERY_BOOTARGS_MMC NULL
++#define CONFIG_ANDROID_RECOVERY_BOOTCMD_MMC  \
++	"booti mmc1 recovery"
++#define CONFIG_ANDROID_RECOVERY_CMD_FILE "/recovery/command"
++
++/***********************************************************
++ * Command definition
++ ***********************************************************/
++
++#include <config_cmd_default.h>
++
++#define CONFIG_CMD_PING
++#define CONFIG_CMD_DHCP
++#define CONFIG_CMD_MII
++#define CONFIG_CMD_NET
++#define CONFIG_NET_RETRY_COUNT  100
++#define CONFIG_NET_MULTI 1
++#define CONFIG_BOOTP_SUBNETMASK
++#define CONFIG_BOOTP_GATEWAY
++#define CONFIG_BOOTP_DNS
++
++#define CONFIG_CMD_SPI
++#define CONFIG_CMD_I2C
++
++/* Enable below configure when supporting nand */
++
++#define CONFIG_CMD_MMC
++#define CONFIG_MMC_8BIT_PORTS	0x00000002
++#define CONFIG_CMD_SF
++#define CONFIG_CMD_ENV
++#define CONFIG_CMD_REGUL
++
++#define CONFIG_CMD_CLOCK
++#define CONFIG_REF_CLK_FREQ CONFIG_MX6_HCLK_FREQ
++
++#define CONFIG_CMD_SATA
++#undef CONFIG_CMD_IMLS
++
++#define CONFIG_CMD_IMX_DOWNLOAD_MODE
++
++#define CONFIG_BOOTDELAY 3
++
++#define CONFIG_PRIME	"FEC0"
++
++#define CONFIG_LOADADDR		0x10800000	/* loadaddr env var */
++#define CONFIG_RD_LOADADDR	0x11000000
++
++#define CONFIG_INITRD_TAG
++
++#define	CONFIG_EXTRA_ENV_SETTINGS					\
++		"netdev=eth0\0"						\
++		"ethprime=FEC0\0"					\
++		"bootcmd=booti mmc1\0"
++#define CONFIG_ARP_TIMEOUT	200UL
++
++/*
++ * Miscellaneous configurable options
++ */
++#define CONFIG_SYS_LONGHELP		/* undef to save memory */
++#define CONFIG_SYS_PROMPT		"conga-QMX6 U-Boot > "
++#define CONFIG_AUTO_COMPLETE
++#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
++/* Print Buffer Size */
++#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
++#define CONFIG_SYS_MAXARGS	16	/* max number of command args */
++#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
++
++#define CONFIG_SYS_MEMTEST_START	0x10000000	/* memtest works on */
++#define CONFIG_SYS_MEMTEST_END		0x10010000
++
++#undef	CONFIG_SYS_CLKS_IN_HZ		/* everything, incl board info, in Hz */
++
++#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
++
++#define CONFIG_SYS_HZ			1000
++
++#define CONFIG_CMDLINE_EDITING
++#define CONFIG_SYS_HUSH_PARSER		1 /* Use the HUSH parser */
++#ifdef	CONFIG_SYS_HUSH_PARSER
++#define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "
++#endif
++
++#define CONFIG_FEC0_IOBASE	ENET_BASE_ADDR
++#define CONFIG_FEC0_PINMUX	-1
++#define CONFIG_FEC0_MIIBASE	-1
++#define CONFIG_GET_FEC_MAC_ADDR_FROM_ENV
++#define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
++#define CONFIG_MXC_FEC
++#define CONFIG_FEC0_PHY_ADDR		6
++#define CONFIG_ETH_PRIME
++#define CONFIG_RMII
++#define CONFIG_PHY_MICREL_KSZ9021
++#define CONFIG_CMD_MII
++#define CONFIG_CMD_DHCP
++#define CONFIG_CMD_PING
++#define CONFIG_IPADDR			192.168.1.103
++
++/*The IP ADDRESS of SERVERIP*/
++#define CONFIG_SERVERIP			_SERVER_IP_ADDR_
++
++#define CONFIG_NETMASK			255.255.255.0
++
++/*
++ * OCOTP Configs
++ */
++#ifdef CONFIG_CMD_IMXOTP
++	#define CONFIG_IMX_OTP
++	#define IMX_OTP_BASE		OCOTP_BASE_ADDR
++	#define IMX_OTP_ADDR_MAX	0x7F
++	#define IMX_OTP_DATA_ERROR_VAL	0xBADABADA
++#endif
++
++/*
++ * I2C Configs
++ */
++#ifdef CONFIG_CMD_I2C
++	#define CONFIG_HARD_I2C         1
++	#define CONFIG_I2C_MXC          1
++	#define CONFIG_SYS_I2C_PORT             I2C2_BASE_ADDR
++	#define CONFIG_SYS_I2C_SPEED            100000
++	#define CONFIG_SYS_I2C_SLAVE            0x08
++#endif
++
++/*
++ * SPI Configs
++ */
++#ifdef CONFIG_CMD_SF
++	#define CONFIG_FSL_SF		1
++	#define CONFIG_SPI_FLASH_IMX_SST	1
++	#define CONFIG_SPI_FLASH_CS	1
++	#define CONFIG_IMX_ECSPI
++	#define IMX_CSPI_VER_2_3	1
++	#define MAX_SPI_BYTES		(64 * 4)
++#endif
++
++/* Regulator Configs */
++#ifdef CONFIG_CMD_REGUL
++	#define CONFIG_ANATOP_REGULATOR
++	#define CONFIG_CORE_REGULATOR_NAME "vdd1p1"
++	#define CONFIG_PERIPH_REGULATOR_NAME "vdd1p1"
++#endif
++
++/*
++ * MMC Configs
++ */
++#ifdef CONFIG_CMD_MMC
++	#define CONFIG_MMC
++	#define CONFIG_GENERIC_MMC
++	#define CONFIG_IMX_MMC
++	#define CONFIG_SYS_FSL_USDHC_NUM        3
++	#define CONFIG_SYS_FSL_ESDHC_ADDR       0
++	#define CONFIG_SYS_MMC_ENV_DEV  2
++	#define CONFIG_DOS_PARTITION	1
++	#define CONFIG_CMD_FAT		1
++	#define CONFIG_CMD_EXT2		1
++
++	/* detect whether SD1, 2, 3, or 4 is boot device */
++	#define CONFIG_DYNAMIC_MMC_DEVNO
++
++	/* Setup target delay in DDR mode for each SD port */
++	#define CONFIG_GET_DDR_TARGET_DELAY
++#endif
++
++/*
++ * SATA Configs
++ */
++#ifdef CONFIG_CMD_SATA
++	#define CONFIG_DWC_AHSATA
++	#define CONFIG_SYS_SATA_MAX_DEVICE	1
++	#define CONFIG_DWC_AHSATA_PORT_ID	0
++	#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
++	#define CONFIG_LBA48
++	#define CONFIG_LIBATA
++
++	#define CONFIG_DOS_PARTITION	1
++	#define CONFIG_CMD_FAT		1
++	#define CONFIG_CMD_EXT2		1
++#endif
++
++/*
++ * USB OTG
++ */
++#define CONFIG_IMX_UDC	1
++ 
++/*-----------------------------------------------------------------------
++ * Stack sizes
++ *
++ * The stack sizes are set up in start.S using the settings below
++ */
++#define CONFIG_STACKSIZE	(128 * 1024)	/* regular stack */
++
++/*-----------------------------------------------------------------------
++ * Physical Memory Map
++ */
++#define CONFIG_NR_DRAM_BANKS	1
++#define PHYS_SDRAM_1		CSD0_DDR_BASE_ADDR
++#define PHYS_SDRAM_1_SIZE	(2u * 1024 * 1024 * 1024)
++#define iomem_valid_addr(addr, size) \
++	(addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE))
++
++/*-----------------------------------------------------------------------
++ * FLASH and environment organization
++ */
++#define CONFIG_SYS_NO_FLASH
++
++/* Monitor at beginning of flash */
++/* #define CONFIG_FSL_ENV_IN_MMC */
++/* #define CONFIG_FSL_ENV_IN_SATA */
++#define CONFIG_FSL_ENV_IN_SF
++
++#define CONFIG_ENV_SECT_SIZE    (8 * 1024)
++#define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
++
++#if defined(CONFIG_FSL_ENV_IN_NAND)
++	#define CONFIG_ENV_IS_IN_NAND 1
++	#define CONFIG_ENV_OFFSET	0x100000
++#elif defined(CONFIG_FSL_ENV_IN_MMC)
++	#define CONFIG_ENV_IS_IN_MMC	1
++	#define CONFIG_ENV_OFFSET	(768 * 1024)
++#elif defined(CONFIG_FSL_ENV_IN_SATA)
++	#define CONFIG_ENV_IS_IN_SATA   1
++	#define CONFIG_SATA_ENV_DEV     0
++	#define CONFIG_ENV_OFFSET       (768 * 1024)
++#elif defined(CONFIG_FSL_ENV_IN_SF)
++	#define CONFIG_ENV_IS_IN_SPI_FLASH	1
++	#define CONFIG_ENV_SPI_CS		1
++	#define CONFIG_ENV_OFFSET       (768 * 1024)
++#else
++	#define CONFIG_ENV_IS_NOWHERE	1
++#endif
++#endif				/* __CONFIG_H */
+diff --git a/include/configs/cgt_qmx6_mfg.h b/include/configs/cgt_qmx6_mfg.h
+new file mode 100644
+index 0000000..9594da5
+--- /dev/null
++++ b/include/configs/cgt_qmx6_mfg.h
+@@ -0,0 +1,280 @@
++/*
++ * Copyright (C) 2011-2012 Freescale Semiconductor, Inc.
++ *
++ * Configuration settings for the MX6Q SABRE-Lite Freescale board.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#ifndef __CONFIG_H
++#define __CONFIG_H
++
++#include <asm/arch/mx6.h>
++
++ /* High Level Configuration Options */
++#define CONFIG_MFG
++#define CONFIG_ARMV7	/* This is armv7 Cortex-A9 CPU core */
++#define CONFIG_MXC
++#define CONFIG_MX6Q
++#define CONFIG_FLASH_HEADER
++#define CONFIG_FLASH_HEADER_OFFSET 0x400
++#define CONFIG_MX6_CLK32	   32768
++
++#define CONFIG_SKIP_RELOCATE_UBOOT
++
++#define CONFIG_ARCH_CPU_INIT
++#undef CONFIG_ARCH_MMU /* disable MMU first */
++#define CONFIG_L2_OFF  /* disable L2 cache first*/
++
++#define CONFIG_MX6_HCLK_FREQ	24000000
++
++#define CONFIG_DISPLAY_CPUINFO
++#define CONFIG_DISPLAY_BOARDINFO
++
++#define CONFIG_SYS_64BIT_VSPRINTF
++
++#define BOARD_LATE_INIT
++
++#define CONFIG_CMDLINE_TAG	/* enable passing of ATAGs */
++#define CONFIG_REVISION_TAG
++#define CONFIG_SETUP_MEMORY_TAGS
++#define CONFIG_INITRD_TAG
++
++/*
++ * Size of malloc() pool
++ */
++#define CONFIG_SYS_MALLOC_LEN		(2 * 1024 * 1024)
++/* size in bytes reserved for initial data */
++#define CONFIG_SYS_GBL_DATA_SIZE	128
++
++/*
++ * Hardware drivers
++ */
++#define CONFIG_MXC_UART
++#define CONFIG_UART_BASE_ADDR   UART2_BASE_ADDR
++
++/* allow to overwrite serial and ethaddr */
++#define CONFIG_ENV_OVERWRITE
++#define CONFIG_CONS_INDEX		1
++#define CONFIG_BAUDRATE			115200
++#define CONFIG_SYS_BAUDRATE_TABLE	{9600, 19200, 38400, 57600, 115200}
++
++/***********************************************************
++ * Command definition
++ ***********************************************************/
++
++#include <config_cmd_default.h>
++
++#define CONFIG_CMD_PING
++#define CONFIG_CMD_DHCP
++#define CONFIG_CMD_MII
++#define CONFIG_CMD_NET
++#define CONFIG_NET_RETRY_COUNT  100
++#define CONFIG_NET_MULTI 1
++#define CONFIG_BOOTP_SUBNETMASK
++#define CONFIG_BOOTP_GATEWAY
++#define CONFIG_BOOTP_DNS
++
++#define CONFIG_CMD_SPI
++#define CONFIG_CMD_I2C
++#define CONFIG_CMD_IMXOTP
++
++/* Enable below configure when supporting nand */
++
++#define CONFIG_CMD_MMC
++#define CONFIG_MMC_8BIT_PORTS	0x00000002
++#define CONFIG_CMD_SF
++#define CONFIG_CMD_ENV
++
++#define CONFIG_CMD_CLOCK
++#define CONFIG_REF_CLK_FREQ CONFIG_MX6_HCLK_FREQ
++
++#define CONFIG_CMD_SATA
++#undef CONFIG_CMD_IMLS
++
++#define CONFIG_BOOTDELAY 3
++
++#define CONFIG_PRIME	"FEC0"
++
++#define CONFIG_LOADADDR		0x10800000	/* loadaddr env var */
++#define CONFIG_RD_LOADADDR	0x11000000
++
++#define CONFIG_BOOTARGS         "console=ttymxc1,115200 rdinit=/linuxrc rootwait root=/dev/ram0"
++#define CONFIG_BOOTCOMMAND      "bootm 0x10800000 0x11000000"
++
++#define	CONFIG_EXTRA_ENV_SETTINGS					\
++		"netdev=eth0\0"						\
++		"ethprime=FEC0\0"					\
++		"uboot=u-boot.bin\0"			\
++		"kernel=uImage\0"				\
++
++
++#define CONFIG_ARP_TIMEOUT	200UL
++
++/*
++ * Miscellaneous configurable options
++ */
++#define CONFIG_SYS_LONGHELP		/* undef to save memory */
++#define CONFIG_SYS_PROMPT		"conga-QMX6-MFG U-Boot > "
++#define CONFIG_AUTO_COMPLETE
++#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
++/* Print Buffer Size */
++#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
++#define CONFIG_SYS_MAXARGS	16	/* max number of command args */
++#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
++
++#define CONFIG_SYS_MEMTEST_START	0x10000000	/* memtest works on */
++#define CONFIG_SYS_MEMTEST_END		0x10010000
++
++#undef	CONFIG_SYS_CLKS_IN_HZ		/* everything, incl board info, in Hz */
++
++#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
++
++#define CONFIG_SYS_HZ			1000
++
++#define CONFIG_CMDLINE_EDITING
++#define CONFIG_SYS_HUSH_PARSER		1 /* Use the HUSH parser */
++#ifdef	CONFIG_SYS_HUSH_PARSER
++#define	CONFIG_SYS_PROMPT_HUSH_PS2	"> "
++#endif
++
++#define CONFIG_FEC0_IOBASE	ENET_BASE_ADDR
++#define CONFIG_FEC0_PINMUX	-1
++#define CONFIG_FEC0_MIIBASE	-1
++#define CONFIG_GET_FEC_MAC_ADDR_FROM_ENV
++#define CONFIG_GET_FEC_MAC_ADDR_FROM_IIM
++#define CONFIG_MXC_FEC
++#define CONFIG_FEC0_PHY_ADDR		6
++#define CONFIG_ETH_PRIME
++#define CONFIG_RMII
++#define CONFIG_PHY_MICREL_KSZ9021
++#define CONFIG_CMD_MII
++#define CONFIG_CMD_DHCP
++#define CONFIG_CMD_PING
++#define CONFIG_IPADDR			192.168.1.103
++
++/*The IP ADDRESS of SERVERIP*/
++#define CONFIG_SERVERIP			_SERVER_IP_ADDR_
++
++#define CONFIG_NETMASK			255.255.255.0
++
++/*
++ * OCOTP Configs
++ */
++#ifdef CONFIG_CMD_IMXOTP
++	#define CONFIG_IMX_OTP
++	#define IMX_OTP_BASE		OCOTP_BASE_ADDR
++	#define IMX_OTP_ADDR_MAX	0x7F
++	#define IMX_OTP_DATA_ERROR_VAL	0xBADABADA
++#endif
++
++/*
++ * I2C Configs
++ */
++#ifdef CONFIG_CMD_I2C
++	#define CONFIG_HARD_I2C         1
++	#define CONFIG_I2C_MXC          1
++	#define CONFIG_SYS_I2C_PORT             I2C2_BASE_ADDR
++	#define CONFIG_SYS_I2C_SPEED            100000
++	#define CONFIG_SYS_I2C_SLAVE            0x08
++#endif
++
++/*
++ * SPI Configs
++ */
++#ifdef CONFIG_CMD_SF
++	#define CONFIG_FSL_SF		1
++	#define CONFIG_SPI_FLASH_IMX_SST	1
++	#define CONFIG_SPI_FLASH_CS	1
++/*	#define CONFIG_MFGAREA_UNPROTECT */
++	#define CONFIG_IMX_ECSPI
++	#define IMX_CSPI_VER_2_3	1
++	#define MAX_SPI_BYTES		(64 * 4)
++#endif
++
++/*
++ * MMC Configs
++ */
++#ifdef CONFIG_CMD_MMC
++	#define CONFIG_MMC
++	#define CONFIG_GENERIC_MMC
++	#define CONFIG_IMX_MMC
++	#define CONFIG_SYS_FSL_USDHC_NUM        3
++	#define CONFIG_SYS_FSL_ESDHC_ADDR       0
++	#define CONFIG_SYS_MMC_ENV_DEV  2
++	#define CONFIG_DOS_PARTITION	1
++	#define CONFIG_CMD_FAT		1
++	#define CONFIG_CMD_EXT2		1
++
++	/* detect whether SD1, 2, 3, or 4 is boot device */
++	#define CONFIG_DYNAMIC_MMC_DEVNO
++
++	/* Setup target delay in DDR mode for each SD port */
++	#define CONFIG_GET_DDR_TARGET_DELAY
++#endif
++
++/*
++ * SATA Configs
++ */
++#ifdef CONFIG_CMD_SATA
++	#define CONFIG_DWC_AHSATA
++	#define CONFIG_SYS_SATA_MAX_DEVICE	1
++	#define CONFIG_DWC_AHSATA_PORT_ID	0
++	#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
++	#define CONFIG_LBA48
++	#define CONFIG_LIBATA
++
++	#define CONFIG_DOS_PARTITION	1
++	#define CONFIG_CMD_FAT		1
++	#define CONFIG_CMD_EXT2		1
++#endif
++
++/*
++ * USB OTG
++ */
++#define CONFIG_IMX_UDC	1
++ 
++/*-----------------------------------------------------------------------
++ * Stack sizes
++ *
++ * The stack sizes are set up in start.S using the settings below
++ */
++#define CONFIG_STACKSIZE	(128 * 1024)	/* regular stack */
++
++/*-----------------------------------------------------------------------
++ * Physical Memory Map
++ */
++#define CONFIG_NR_DRAM_BANKS	1
++#define PHYS_SDRAM_1		CSD0_DDR_BASE_ADDR
++#define PHYS_SDRAM_1_SIZE	(2u * 1024 * 1024 * 1024)
++#define iomem_valid_addr(addr, size) \
++	(addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE))
++
++/*-----------------------------------------------------------------------
++ * FLASH and environment organization
++ */
++#define CONFIG_SYS_NO_FLASH
++
++/* Monitor at beginning of flash */
++/* #define CONFIG_FSL_ENV_IN_MMC */
++/* #define CONFIG_FSL_ENV_IN_SATA */
++/* #define CONFIG_FSL_ENV_IN_SF */
++
++#define CONFIG_ENV_SECT_SIZE    (128 * 1024)
++#define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
++#define CONFIG_ENV_IS_NOWHERE	1
++
++#endif				/* __CONFIG_H */
+diff --git a/localversion-qmx6 b/localversion-qmx6
+new file mode 100644
+index 0000000..abf4f23
+--- /dev/null
++++ b/localversion-qmx6
+@@ -0,0 +1 @@
++ QMX6R002
+-- 
+1.7.10.4
+
diff --git a/recipes-bsp/u-boot/u-boot-imx_2009.08.bb b/recipes-bsp/u-boot/u-boot-imx_2009.08.bb
index 2210221..770615b 100644
--- a/recipes-bsp/u-boot/u-boot-imx_2009.08.bb
+++ b/recipes-bsp/u-boot/u-boot-imx_2009.08.bb
@@ -29,6 +29,11 @@  SRC_URI_append_mx6 = " \
    file://mx6q_sabresd-Change-default-environment-to-work-with.patch \
 "
 
+# Revision of imx_3.0.35_1.1.0 branch
+SRCREV_cgtqmx6 = "98a5299c945cb7e440e3c3d9c572f017e5a02ede"
+SRC_URI_append_cgtqmx6 = " \
+   file://uboot-support-for-cgtqmx6.patch \
+"
 
 SRC_URI = "git://git.freescale.com/imx/uboot-imx.git"
 
@@ -39,6 +44,7 @@  UBOOT_MACHINE_imx6qsabrelite = "mx6q_sabrelite_config"
 UBOOT_MACHINE_imx6qsabreauto = "mx6q_sabreauto_config"
 UBOOT_MACHINE_imx6qsabresd = "mx6q_sabresd_config"
 UBOOT_MACHINE_imx28evk = "mx28_evk_config"
+UBOOT_MACHINE_cgtqmx6 = "cgt_qmx6_config"
 
 UBOOT_MAKE_TARGET = "u-boot.bin"
 
diff --git a/recipes-kernel/linux/linux-imx-3.0.35/cgtqmx6/cgtqmx6.patch b/recipes-kernel/linux/linux-imx-3.0.35/cgtqmx6/cgtqmx6.patch
new file mode 100644
index 0000000..787c9af
--- /dev/null
+++ b/recipes-kernel/linux/linux-imx-3.0.35/cgtqmx6/cgtqmx6.patch
@@ -0,0 +1,7148 @@ 
+diff --git a/arch/arm/configs/qmx6_defconfig b/arch/arm/configs/qmx6_defconfig
+new file mode 100644
+index 0000000..9aeb4a5
+--- /dev/null
++++ b/arch/arm/configs/qmx6_defconfig
+@@ -0,0 +1,2659 @@
++#
++# Automatically generated make config: don't edit
++# Linux/arm 3.0.15 Kernel Configuration
++#
++CONFIG_ARM=y
++CONFIG_HAVE_PWM=y
++CONFIG_SYS_SUPPORTS_APM_EMULATION=y
++CONFIG_HAVE_SCHED_CLOCK=y
++CONFIG_GENERIC_GPIO=y
++# CONFIG_ARCH_USES_GETTIMEOFFSET is not set
++CONFIG_GENERIC_CLOCKEVENTS=y
++CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
++CONFIG_KTIME_SCALAR=y
++CONFIG_HAVE_PROC_CPU=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_GENERIC_LOCKBREAK=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_ARCH_HAS_CPUFREQ=y
++CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_ZONE_DMA=y
++CONFIG_NEED_DMA_MAP_STATE=y
++CONFIG_FIQ=y
++CONFIG_VECTORS_BASE=0xffff0000
++# CONFIG_ARM_PATCH_PHYS_VIRT is not set
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++CONFIG_HAVE_IRQ_WORK=y
++CONFIG_IRQ_WORK=y
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_CROSS_COMPILE=""
++CONFIG_LOCALVERSION=""
++CONFIG_LOCALVERSION_AUTO=y
++CONFIG_HAVE_KERNEL_GZIP=y
++CONFIG_HAVE_KERNEL_LZMA=y
++CONFIG_HAVE_KERNEL_LZO=y
++CONFIG_KERNEL_GZIP=y
++# CONFIG_KERNEL_LZMA is not set
++# CONFIG_KERNEL_LZO is not set
++CONFIG_DEFAULT_HOSTNAME="(none)"
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_FHANDLE is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_AUDIT is not set
++CONFIG_HAVE_GENERIC_HARDIRQS=y
++
++#
++# IRQ subsystem
++#
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_HAVE_SPARSE_IRQ=y
++CONFIG_GENERIC_IRQ_SHOW=y
++# CONFIG_SPARSE_IRQ is not set
++
++#
++# RCU Subsystem
++#
++CONFIG_TREE_PREEMPT_RCU=y
++CONFIG_PREEMPT_RCU=y
++# CONFIG_RCU_TRACE is not set
++CONFIG_RCU_FANOUT=32
++# CONFIG_RCU_FANOUT_EXACT is not set
++# CONFIG_TREE_RCU_TRACE is not set
++# CONFIG_RCU_BOOST is not set
++CONFIG_IKCONFIG=y
++CONFIG_IKCONFIG_PROC=y
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++# CONFIG_NAMESPACES is not set
++# CONFIG_SCHED_AUTOGROUP is not set
++# CONFIG_SYSFS_DEPRECATED is not set
++# CONFIG_RELAY is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_RD_GZIP=y
++# CONFIG_RD_BZIP2 is not set
++# CONFIG_RD_LZMA is not set
++# CONFIG_RD_XZ is not set
++# CONFIG_RD_LZO is not set
++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
++CONFIG_SYSCTL=y
++CONFIG_ANON_INODES=y
++CONFIG_EXPERT=y
++CONFIG_UID16=y
++CONFIG_SYSCTL_SYSCALL=y
++CONFIG_KALLSYMS=y
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_TIMERFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_AIO=y
++CONFIG_EMBEDDED=y
++CONFIG_HAVE_PERF_EVENTS=y
++CONFIG_PERF_USE_VMALLOC=y
++
++#
++# Kernel Performance Events And Counters
++#
++CONFIG_PERF_EVENTS=y
++# CONFIG_PERF_COUNTERS is not set
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_SLUB_DEBUG=y
++CONFIG_COMPAT_BRK=y
++# CONFIG_SLAB is not set
++CONFIG_SLUB=y
++# CONFIG_SLOB is not set
++# CONFIG_PROFILING is not set
++CONFIG_HAVE_OPROFILE=y
++# CONFIG_KPROBES is not set
++CONFIG_HAVE_KPROBES=y
++CONFIG_HAVE_KRETPROBES=y
++CONFIG_USE_GENERIC_SMP_HELPERS=y
++CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
++CONFIG_HAVE_CLK=y
++CONFIG_HAVE_DMA_API_DEBUG=y
++CONFIG_HAVE_HW_BREAKPOINT=y
++
++#
++# GCOV-based kernel profiling
++#
++# CONFIG_GCOV_KERNEL is not set
++CONFIG_HAVE_GENERIC_DMA_COHERENT=y
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++CONFIG_BASE_SMALL=0
++CONFIG_MODULES=y
++# CONFIG_MODULE_FORCE_LOAD is not set
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODULE_FORCE_UNLOAD=y
++CONFIG_MODVERSIONS=y
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++CONFIG_STOP_MACHINE=y
++CONFIG_BLOCK=y
++CONFIG_LBDAF=y
++# CONFIG_BLK_DEV_BSG is not set
++# CONFIG_BLK_DEV_INTEGRITY is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_DEADLINE=y
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++# CONFIG_INLINE_SPIN_TRYLOCK is not set
++# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
++# CONFIG_INLINE_SPIN_LOCK is not set
++# CONFIG_INLINE_SPIN_LOCK_BH is not set
++# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
++# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
++# CONFIG_INLINE_SPIN_UNLOCK is not set
++# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
++# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
++# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
++# CONFIG_INLINE_READ_TRYLOCK is not set
++# CONFIG_INLINE_READ_LOCK is not set
++# CONFIG_INLINE_READ_LOCK_BH is not set
++# CONFIG_INLINE_READ_LOCK_IRQ is not set
++# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
++# CONFIG_INLINE_READ_UNLOCK is not set
++# CONFIG_INLINE_READ_UNLOCK_BH is not set
++# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
++# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
++# CONFIG_INLINE_WRITE_TRYLOCK is not set
++# CONFIG_INLINE_WRITE_LOCK is not set
++# CONFIG_INLINE_WRITE_LOCK_BH is not set
++# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
++# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
++# CONFIG_INLINE_WRITE_UNLOCK is not set
++# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
++# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
++# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
++CONFIG_MUTEX_SPIN_ON_OWNER=y
++CONFIG_FREEZER=y
++
++#
++# System Type
++#
++CONFIG_MMU=y
++# CONFIG_ARCH_INTEGRATOR is not set
++# CONFIG_ARCH_REALVIEW is not set
++# CONFIG_ARCH_VERSATILE is not set
++# CONFIG_ARCH_VEXPRESS is not set
++# CONFIG_ARCH_AT91 is not set
++# CONFIG_ARCH_BCMRING is not set
++# CONFIG_ARCH_CLPS711X is not set
++# CONFIG_ARCH_CNS3XXX is not set
++# CONFIG_ARCH_GEMINI is not set
++# CONFIG_ARCH_EBSA110 is not set
++# CONFIG_ARCH_EP93XX is not set
++# CONFIG_ARCH_FOOTBRIDGE is not set
++CONFIG_ARCH_MXC=y
++# CONFIG_ARCH_MXS is not set
++# CONFIG_ARCH_NETX is not set
++# CONFIG_ARCH_H720X is not set
++# CONFIG_ARCH_IOP13XX is not set
++# CONFIG_ARCH_IOP32X is not set
++# CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IXP23XX is not set
++# CONFIG_ARCH_IXP2000 is not set
++# CONFIG_ARCH_IXP4XX is not set
++# CONFIG_ARCH_DOVE is not set
++# CONFIG_ARCH_KIRKWOOD is not set
++# CONFIG_ARCH_LOKI is not set
++# CONFIG_ARCH_LPC32XX is not set
++# CONFIG_ARCH_MV78XX0 is not set
++# CONFIG_ARCH_ORION5X is not set
++# CONFIG_ARCH_MMP is not set
++# CONFIG_ARCH_KS8695 is not set
++# CONFIG_ARCH_W90X900 is not set
++# CONFIG_ARCH_NUC93X is not set
++# CONFIG_ARCH_TEGRA is not set
++# CONFIG_ARCH_PNX4008 is not set
++# CONFIG_ARCH_PXA is not set
++# CONFIG_ARCH_MSM is not set
++# CONFIG_ARCH_SHMOBILE is not set
++# CONFIG_ARCH_RPC is not set
++# CONFIG_ARCH_SA1100 is not set
++# CONFIG_ARCH_S3C2410 is not set
++# CONFIG_ARCH_S3C64XX is not set
++# CONFIG_ARCH_S5P64X0 is not set
++# CONFIG_ARCH_S5PC100 is not set
++# CONFIG_ARCH_S5PV210 is not set
++# CONFIG_ARCH_EXYNOS4 is not set
++# CONFIG_ARCH_SHARK is not set
++# CONFIG_ARCH_TCC_926 is not set
++# CONFIG_ARCH_U300 is not set
++# CONFIG_ARCH_U8500 is not set
++# CONFIG_ARCH_NOMADIK is not set
++# CONFIG_ARCH_DAVINCI is not set
++# CONFIG_ARCH_OMAP is not set
++# CONFIG_PLAT_SPEAR is not set
++# CONFIG_ARCH_VT8500 is not set
++CONFIG_GPIO_PCA953X=y
++# CONFIG_KEYBOARD_GPIO_POLLED is not set
++CONFIG_IMX_HAVE_PLATFORM_DMA=y
++CONFIG_IMX_HAVE_PLATFORM_FEC=y
++CONFIG_IMX_HAVE_PLATFORM_FLEXCAN=y
++CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC=y
++CONFIG_IMX_HAVE_PLATFORM_GPMI_NFC=y
++CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_SNVS_RTC=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_I2C=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_SSI=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_UART=y
++CONFIG_IMX_HAVE_PLATFORM_MXC_EHCI=y
++CONFIG_IMX_HAVE_PLATFORM_MXC_PWM=y
++CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX=y
++CONFIG_IMX_HAVE_PLATFORM_SPI_IMX=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_IPUV3=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_VPU=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_DVFS=y
++CONFIG_IMX_HAVE_PLATFORM_AHCI=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_OCOTP=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_VIIM=y
++CONFIG_IMX_HAVE_PLATFORM_LDB=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_SPDIF=y
++CONFIG_IMX_HAVE_PLATFORM_VIV_GPU=y
++CONFIG_IMX_HAVE_PLATFORM_MXC_HDMI=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_ANATOP_THERMAL=y
++CONFIG_IMX_HAVE_PLATFORM_FSL_OTG=y
++CONFIG_IMX_HAVE_PLATFORM_FSL_USB_WAKEUP=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_PM=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_ASRC=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_CSI2=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_VDOA=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_PCIE=y
++
++#
++# Freescale MXC Implementations
++#
++# CONFIG_ARCH_MX1 is not set
++# CONFIG_ARCH_MX2 is not set
++# CONFIG_ARCH_MX25 is not set
++# CONFIG_ARCH_MX3 is not set
++# CONFIG_ARCH_MX503 is not set
++# CONFIG_ARCH_MX51 is not set
++CONFIG_ARCH_MX6=y
++CONFIG_ARCH_MX6Q=y
++CONFIG_FORCE_MAX_ZONEORDER=14
++CONFIG_SOC_IMX6Q=y
++# CONFIG_MACH_MX6Q_ARM2 is not set
++# CONFIG_MACH_MX6Q_SABRELITE is not set
++CONFIG_MACH_MX6Q_QMX6=y
++# CONFIG_MACH_MX6Q_SABRESD is not set
++# CONFIG_MACH_MX6Q_SABREAUTO is not set
++
++#
++# MX6 Options:
++#
++# CONFIG_IMX_PCIE is not set
++CONFIG_ISP1504_MXC=y
++# CONFIG_MXC_IRQ_PRIOR is not set
++CONFIG_MXC_PWM=y
++# CONFIG_MXC_DEBUG_BOARD is not set
++CONFIG_ARCH_MXC_IOMUX_V3=y
++CONFIG_ARCH_MXC_AUDMUX_V2=y
++CONFIG_IRAM_ALLOC=y
++CONFIG_CLK_DEBUG=y
++CONFIG_DMA_ZONE_SIZE=184
++
++#
++# System MMU
++#
++
++#
++# Processor Type
++#
++CONFIG_CPU_V7=y
++CONFIG_CPU_32v6K=y
++CONFIG_CPU_32v7=y
++CONFIG_CPU_ABRT_EV7=y
++CONFIG_CPU_PABRT_V7=y
++CONFIG_CPU_CACHE_V7=y
++CONFIG_CPU_CACHE_VIPT=y
++CONFIG_CPU_COPY_V6=y
++CONFIG_CPU_TLB_V7=y
++CONFIG_CPU_HAS_ASID=y
++CONFIG_CPU_CP15=y
++CONFIG_CPU_CP15_MMU=y
++
++#
++# Processor Features
++#
++CONFIG_ARM_THUMB=y
++# CONFIG_ARM_THUMBEE is not set
++# CONFIG_SWP_EMULATE is not set
++# CONFIG_CPU_ICACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_DISABLE is not set
++# CONFIG_CPU_BPREDICT_DISABLE is not set
++CONFIG_OUTER_CACHE=y
++CONFIG_OUTER_CACHE_SYNC=y
++CONFIG_CACHE_L2X0=y
++CONFIG_CACHE_PL310=y
++CONFIG_ARM_L1_CACHE_SHIFT=5
++CONFIG_ARM_DMA_MEM_BUFFERABLE=y
++CONFIG_CPU_HAS_PMU=y
++# CONFIG_ARM_ERRATA_430973 is not set
++# CONFIG_ARM_ERRATA_458693 is not set
++# CONFIG_ARM_ERRATA_460075 is not set
++# CONFIG_ARM_ERRATA_742230 is not set
++# CONFIG_ARM_ERRATA_742231 is not set
++# CONFIG_PL310_ERRATA_588369 is not set
++# CONFIG_ARM_ERRATA_720789 is not set
++# CONFIG_PL310_ERRATA_727915 is not set
++CONFIG_ARM_ERRATA_743622=y
++CONFIG_ARM_ERRATA_751472=y
++# CONFIG_ARM_ERRATA_753970 is not set
++CONFIG_ARM_ERRATA_754322=y
++# CONFIG_ARM_ERRATA_754327 is not set
++CONFIG_ARM_GIC=y
++
++#
++# Bus support
++#
++# CONFIG_PCI_SYSCALL is not set
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++CONFIG_ARM_ERRATA_764369=y
++# CONFIG_PL310_ERRATA_769419 is not set
++
++#
++# Kernel Features
++#
++CONFIG_TICK_ONESHOT=y
++CONFIG_NO_HZ=y
++CONFIG_HIGH_RES_TIMERS=y
++CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
++CONFIG_SMP=y
++CONFIG_SMP_ON_UP=y
++CONFIG_HAVE_ARM_SCU=y
++CONFIG_HAVE_ARM_TWD=y
++# CONFIG_VMSPLIT_3G is not set
++CONFIG_VMSPLIT_2G=y
++# CONFIG_VMSPLIT_1G is not set
++CONFIG_PAGE_OFFSET=0x80000000
++CONFIG_NR_CPUS=4
++CONFIG_HOTPLUG_CPU=y
++CONFIG_LOCAL_TIMERS=y
++# CONFIG_PREEMPT_NONE is not set
++# CONFIG_PREEMPT_VOLUNTARY is not set
++CONFIG_PREEMPT=y
++CONFIG_HZ=100
++# CONFIG_THUMB2_KERNEL is not set
++CONFIG_AEABI=y
++# CONFIG_OABI_COMPAT is not set
++# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
++# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
++CONFIG_HAVE_ARCH_PFN_VALID=y
++CONFIG_HIGHMEM=y
++# CONFIG_HIGHPTE is not set
++CONFIG_HW_PERF_EVENTS=y
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++CONFIG_HAVE_MEMBLOCK=y
++CONFIG_PAGEFLAGS_EXTENDED=y
++CONFIG_SPLIT_PTLOCK_CPUS=4
++CONFIG_COMPACTION=y
++CONFIG_MIGRATION=y
++# CONFIG_PHYS_ADDR_T_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=1
++CONFIG_BOUNCE=y
++CONFIG_VIRT_TO_BUS=y
++CONFIG_KSM=y
++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
++# CONFIG_CLEANCACHE is not set
++CONFIG_ALIGNMENT_TRAP=y
++# CONFIG_UACCESS_WITH_MEMCPY is not set
++# CONFIG_SECCOMP is not set
++# CONFIG_CC_STACKPROTECTOR is not set
++# CONFIG_DEPRECATED_PARAM_STRUCT is not set
++
++#
++# Boot options
++#
++# CONFIG_USE_OF is not set
++CONFIG_ZBOOT_ROM_TEXT=0x0
++CONFIG_ZBOOT_ROM_BSS=0x0
++CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off"
++CONFIG_CMDLINE_FROM_BOOTLOADER=y
++# CONFIG_CMDLINE_EXTEND is not set
++# CONFIG_CMDLINE_FORCE is not set
++# CONFIG_XIP_KERNEL is not set
++# CONFIG_KEXEC is not set
++# CONFIG_CRASH_DUMP is not set
++# CONFIG_AUTO_ZRELADDR is not set
++
++#
++# CPU Power Management
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++CONFIG_CPU_FREQ_STAT=y
++# CONFIG_CPU_FREQ_STAT_DETAILS is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y
++# CONFIG_CPU_FREQ_GOV_PERFORMANCE is not set
++CONFIG_CPU_FREQ_GOV_POWERSAVE=y
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
++CONFIG_CPU_FREQ_GOV_INTERACTIVE=y
++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
++CONFIG_CPU_FREQ_IMX=y
++# CONFIG_CPU_IDLE is not set
++
++#
++# Floating point emulation
++#
++
++#
++# At least one emulation must be selected
++#
++CONFIG_VFP=y
++CONFIG_VFPv3=y
++CONFIG_NEON=y
++
++#
++# Userspace binary formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
++CONFIG_HAVE_AOUT=y
++# CONFIG_BINFMT_AOUT is not set
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Power management options
++#
++CONFIG_SUSPEND=y
++# CONFIG_PM_TEST_SUSPEND is not set
++CONFIG_SUSPEND_DEVICE_TIME_DEBUG=y
++CONFIG_SUSPEND_FREEZER=y
++CONFIG_PM_SLEEP=y
++CONFIG_PM_SLEEP_SMP=y
++CONFIG_PM_RUNTIME=y
++CONFIG_PM=y
++CONFIG_PM_DEBUG=y
++# CONFIG_PM_ADVANCED_DEBUG is not set
++CONFIG_CAN_PM_TRACE=y
++CONFIG_APM_EMULATION=y
++CONFIG_PM_RUNTIME_CLK=y
++CONFIG_ARCH_SUSPEND_POSSIBLE=y
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_UNIX=y
++CONFIG_XFRM=y
++# CONFIG_XFRM_USER is not set
++# CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_XFRM_MIGRATE is not set
++# CONFIG_XFRM_STATISTICS is not set
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_PNP=y
++CONFIG_IP_PNP_DHCP=y
++CONFIG_IP_PNP_BOOTP=y
++# CONFIG_IP_PNP_RARP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE_DEMUX is not set
++# CONFIG_IP_MROUTE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++CONFIG_INET_XFRM_MODE_TRANSPORT=y
++CONFIG_INET_XFRM_MODE_TUNNEL=y
++CONFIG_INET_XFRM_MODE_BEET=y
++# CONFIG_INET_LRO is not set
++CONFIG_INET_DIAG=y
++CONFIG_INET_TCP_DIAG=y
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_RDS is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_L2TP is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_NET_DSA is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_PHONET is not set
++# CONFIG_IEEE802154 is not set
++# CONFIG_NET_SCHED is not set
++# CONFIG_DCB is not set
++# CONFIG_BATMAN_ADV is not set
++CONFIG_RPS=y
++CONFIG_RFS_ACCEL=y
++CONFIG_XPS=y
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++CONFIG_CAN=y
++CONFIG_CAN_RAW=y
++CONFIG_CAN_BCM=y
++
++#
++# CAN Device Drivers
++#
++CONFIG_CAN_VCAN=y
++# CONFIG_CAN_SLCAN is not set
++CONFIG_CAN_DEV=y
++CONFIG_CAN_CALC_BITTIMING=y
++# CONFIG_CAN_MCP251X is not set
++CONFIG_HAVE_CAN_FLEXCAN=y
++CONFIG_CAN_FLEXCAN=y
++# CONFIG_CAN_SJA1000 is not set
++# CONFIG_CAN_C_CAN is not set
++
++#
++# CAN USB interfaces
++#
++# CONFIG_CAN_EMS_USB is not set
++# CONFIG_CAN_ESD_USB2 is not set
++# CONFIG_CAN_SOFTING is not set
++# CONFIG_CAN_DEBUG_DEVICES is not set
++# CONFIG_IRDA is not set
++CONFIG_BT=y
++CONFIG_BT_L2CAP=y
++CONFIG_BT_SCO=y
++CONFIG_BT_RFCOMM=y
++CONFIG_BT_RFCOMM_TTY=y
++CONFIG_BT_BNEP=y
++CONFIG_BT_BNEP_MC_FILTER=y
++CONFIG_BT_BNEP_PROTO_FILTER=y
++CONFIG_BT_HIDP=y
++
++#
++# Bluetooth device drivers
++#
++CONFIG_BT_HCIBTUSB=y
++# CONFIG_BT_HCIBTSDIO is not set
++CONFIG_BT_HCIUART=y
++# CONFIG_BT_HCIUART_H4 is not set
++# CONFIG_BT_HCIUART_BCSP is not set
++CONFIG_BT_HCIUART_ATH3K=y
++# CONFIG_BT_HCIUART_LL is not set
++# CONFIG_BT_HCIBCM203X is not set
++# CONFIG_BT_HCIBPA10X is not set
++# CONFIG_BT_HCIBFUSB is not set
++CONFIG_BT_HCIVHCI=y
++# CONFIG_BT_MRVL is not set
++# CONFIG_BT_ATH3K is not set
++# CONFIG_AF_RXRPC is not set
++CONFIG_WIRELESS=y
++CONFIG_WIRELESS_EXT=y
++CONFIG_WEXT_CORE=y
++CONFIG_WEXT_PROC=y
++CONFIG_WEXT_SPY=y
++CONFIG_WEXT_PRIV=y
++CONFIG_CFG80211=y
++# CONFIG_NL80211_TESTMODE is not set
++# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
++# CONFIG_CFG80211_REG_DEBUG is not set
++CONFIG_CFG80211_DEFAULT_PS=y
++# CONFIG_CFG80211_DEBUGFS is not set
++# CONFIG_CFG80211_INTERNAL_REGDB is not set
++CONFIG_CFG80211_WEXT=y
++CONFIG_WIRELESS_EXT_SYSFS=y
++CONFIG_LIB80211=y
++CONFIG_LIB80211_CRYPT_WEP=y
++CONFIG_LIB80211_CRYPT_CCMP=y
++CONFIG_LIB80211_CRYPT_TKIP=y
++# CONFIG_LIB80211_DEBUG is not set
++# CONFIG_MAC80211 is not set
++# CONFIG_WIMAX is not set
++CONFIG_RFKILL=y
++CONFIG_RFKILL_INPUT=y
++# CONFIG_RFKILL_REGULATOR is not set
++# CONFIG_RFKILL_GPIO is not set
++# CONFIG_NET_9P is not set
++# CONFIG_CAIF is not set
++# CONFIG_CEPH_LIB is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++# CONFIG_DEVTMPFS is not set
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++CONFIG_FW_LOADER=y
++CONFIG_FIRMWARE_IN_KERNEL=y
++CONFIG_EXTRA_FIRMWARE=""
++# CONFIG_SYS_HYPERVISOR is not set
++CONFIG_CONNECTOR=y
++CONFIG_PROC_EVENTS=y
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_TESTS is not set
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++# CONFIG_MTD_AFS_PARTS is not set
++# CONFIG_MTD_AR7_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_SM_FTL is not set
++# CONFIG_MTD_OOPS is not set
++# CONFIG_MTD_SWAP is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++# CONFIG_MTD_CFI is not set
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_DATAFLASH is not set
++CONFIG_MTD_M25P80=y
++CONFIG_M25PXX_USE_FAST_READ=y
++# CONFIG_MTD_SST25L is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++CONFIG_MTD_NAND_ECC=y
++# CONFIG_MTD_NAND_ECC_SMC is not set
++CONFIG_MTD_NAND=y
++# CONFIG_MTD_NAND_VERIFY_WRITE is not set
++# CONFIG_MTD_NAND_ECC_BCH is not set
++# CONFIG_MTD_SM_COMMON is not set
++# CONFIG_MTD_NAND_MUSEUM_IDS is not set
++# CONFIG_MTD_NAND_GPIO is not set
++CONFIG_MTD_NAND_IDS=y
++# CONFIG_MTD_NAND_DISKONCHIP is not set
++# CONFIG_MTD_NAND_NANDSIM is not set
++# CONFIG_MTD_NAND_GPMI_NAND is not set
++# CONFIG_MTD_NAND_PLATFORM is not set
++# CONFIG_MTD_ALAUDA is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# LPDDR flash memory drivers
++#
++# CONFIG_MTD_LPDDR is not set
++CONFIG_MTD_UBI=y
++CONFIG_MTD_UBI_WL_THRESHOLD=4096
++CONFIG_MTD_UBI_BEB_RESERVE=1
++# CONFIG_MTD_UBI_GLUEBI is not set
++# CONFIG_MTD_UBI_DEBUG is not set
++# CONFIG_PARPORT is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=y
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++# CONFIG_BLK_DEV_DRBD is not set
++# CONFIG_BLK_DEV_NBD is not set
++# CONFIG_BLK_DEV_UB is not set
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=4096
++# CONFIG_BLK_DEV_XIP is not set
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++# CONFIG_MG_DISK is not set
++# CONFIG_BLK_DEV_RBD is not set
++# CONFIG_SENSORS_LIS3LV02D is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_AD525X_DPOT is not set
++# CONFIG_INTEL_MID_PTI is not set
++# CONFIG_ICS932S401 is not set
++# CONFIG_ENCLOSURE_SERVICES is not set
++# CONFIG_APDS9802ALS is not set
++# CONFIG_ISL29003 is not set
++# CONFIG_ISL29020 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_SENSORS_BH1780 is not set
++# CONFIG_SENSORS_BH1770 is not set
++# CONFIG_SENSORS_APDS990X is not set
++# CONFIG_HMC6352 is not set
++# CONFIG_DS1682 is not set
++# CONFIG_TI_DAC7512 is not set
++# CONFIG_BMP085 is not set
++CONFIG_MXS_PERFMON=m
++# CONFIG_C2PORT is not set
++
++#
++# EEPROM support
++#
++# CONFIG_EEPROM_AT24 is not set
++# CONFIG_EEPROM_AT25 is not set
++# CONFIG_EEPROM_LEGACY is not set
++# CONFIG_EEPROM_MAX6875 is not set
++# CONFIG_EEPROM_93CX6 is not set
++# CONFIG_IWMC3200TOP is not set
++
++#
++# Texas Instruments shared transport line discipline
++#
++# CONFIG_TI_ST is not set
++# CONFIG_SENSORS_LIS3_SPI is not set
++# CONFIG_SENSORS_LIS3_I2C is not set
++CONFIG_HAVE_IDE=y
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++CONFIG_SCSI_MOD=y
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=y
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=y
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++# CONFIG_BLK_DEV_SR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++CONFIG_SCSI_MULTI_LUN=y
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_ISCSI_BOOT_SYSFS is not set
++# CONFIG_LIBFC is not set
++# CONFIG_LIBFCOE is not set
++# CONFIG_SCSI_DEBUG is not set
++# CONFIG_SCSI_DH is not set
++# CONFIG_SCSI_OSD_INITIATOR is not set
++CONFIG_ATA=y
++# CONFIG_ATA_NONSTANDARD is not set
++CONFIG_ATA_VERBOSE_ERROR=y
++# CONFIG_SATA_PMP is not set
++
++#
++# Controllers with non-SFF native interface
++#
++CONFIG_SATA_AHCI_PLATFORM=y
++CONFIG_ATA_SFF=y
++
++#
++# SFF controllers with custom DMA interface
++#
++CONFIG_ATA_BMDMA=y
++
++#
++# SATA SFF controllers with BMDMA
++#
++# CONFIG_SATA_MV is not set
++
++#
++# PATA SFF controllers with BMDMA
++#
++# CONFIG_PATA_ARASAN_CF is not set
++
++#
++# PIO-only SFF controllers
++#
++# CONFIG_PATA_PLATFORM is not set
++
++#
++# Generic fallback / legacy drivers
++#
++# CONFIG_MD is not set
++# CONFIG_TARGET_CORE is not set
++CONFIG_NETDEVICES=y
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++# CONFIG_TUN is not set
++# CONFIG_VETH is not set
++CONFIG_MII=y
++CONFIG_PHYLIB=y
++
++#
++# MII PHY device drivers
++#
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_REALTEK_PHY is not set
++# CONFIG_NATIONAL_PHY is not set
++# CONFIG_STE10XP is not set
++# CONFIG_LSI_ET1011C_PHY is not set
++CONFIG_MICREL_PHY=y
++# CONFIG_FIXED_PHY is not set
++# CONFIG_MDIO_BITBANG is not set
++CONFIG_NET_ETHERNET=y
++# CONFIG_AX88796 is not set
++# CONFIG_SMC91X is not set
++# CONFIG_DM9000 is not set
++# CONFIG_ENC28J60 is not set
++# CONFIG_ETHOC is not set
++# CONFIG_SMC911X is not set
++CONFIG_SMSC911X=y
++# CONFIG_SMSC911X_ARCH_HOOKS is not set
++# CONFIG_DNET is not set
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
++# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
++# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
++# CONFIG_B44 is not set
++# CONFIG_KS8842 is not set
++# CONFIG_KS8851 is not set
++# CONFIG_KS8851_MLL is not set
++CONFIG_FEC=y
++# CONFIG_FEC_1588 is not set
++# CONFIG_FTMAC100 is not set
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++CONFIG_WLAN=y
++# CONFIG_USB_ZD1201 is not set
++# CONFIG_USB_NET_RNDIS_WLAN is not set
++CONFIG_ATH_COMMON=m
++# CONFIG_ATH_DEBUG is not set
++CONFIG_ATH6KL=m
++# CONFIG_ATH6KL_DEBUG is not set
++CONFIG_HOSTAP=y
++# CONFIG_HOSTAP_FIRMWARE is not set
++# CONFIG_IWM is not set
++# CONFIG_LIBERTAS is not set
++# CONFIG_MWIFIEX is not set
++
++#
++# Enable WiMAX (Networking options) to see the WiMAX drivers
++#
++
++#
++# USB Network Adapters
++#
++# CONFIG_USB_CATC is not set
++# CONFIG_USB_KAWETH is not set
++# CONFIG_USB_PEGASUS is not set
++# CONFIG_USB_RTL8150 is not set
++# CONFIG_USB_USBNET is not set
++# CONFIG_USB_HSO is not set
++# CONFIG_USB_IPHETH is not set
++# CONFIG_WAN is not set
++
++#
++# CAIF transport drivers
++#
++# CONFIG_PPP is not set
++# CONFIG_SLIP is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=y
++# CONFIG_INPUT_SPARSEKMAP is not set
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=y
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++CONFIG_INPUT_EVDEV=y
++# CONFIG_INPUT_EVBUG is not set
++# CONFIG_INPUT_APMPOWER is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ADP5588 is not set
++# CONFIG_KEYBOARD_ADP5589 is not set
++CONFIG_KEYBOARD_ATKBD=y
++# CONFIG_KEYBOARD_QT1070 is not set
++# CONFIG_KEYBOARD_QT2160 is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++CONFIG_KEYBOARD_GPIO=y
++# CONFIG_KEYBOARD_TCA6416 is not set
++# CONFIG_KEYBOARD_MATRIX is not set
++# CONFIG_KEYBOARD_LM8323 is not set
++# CONFIG_KEYBOARD_MAX7359 is not set
++# CONFIG_KEYBOARD_MCS is not set
++# CONFIG_KEYBOARD_MPR121 is not set
++# CONFIG_KEYBOARD_IMX is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_OPENCORES is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++# CONFIG_KEYBOARD_MXC is not set
++# CONFIG_INPUT_MOUSE is not set
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++CONFIG_INPUT_TOUCHSCREEN=y
++# CONFIG_TOUCHSCREEN_ADS7846 is not set
++# CONFIG_TOUCHSCREEN_AD7877 is not set
++# CONFIG_TOUCHSCREEN_AD7879 is not set
++# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
++# CONFIG_TOUCHSCREEN_BU21013 is not set
++# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
++# CONFIG_TOUCHSCREEN_DYNAPRO is not set
++# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
++# CONFIG_TOUCHSCREEN_EETI is not set
++CONFIG_TOUCHSCREEN_EGALAX=y
++# CONFIG_TOUCHSCREEN_FUJITSU is not set
++# CONFIG_TOUCHSCREEN_GUNZE is not set
++# CONFIG_TOUCHSCREEN_ELO is not set
++# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
++# CONFIG_TOUCHSCREEN_MAX11801 is not set
++# CONFIG_TOUCHSCREEN_MCS5000 is not set
++# CONFIG_TOUCHSCREEN_MTOUCH is not set
++# CONFIG_TOUCHSCREEN_INEXIO is not set
++# CONFIG_TOUCHSCREEN_MK712 is not set
++# CONFIG_TOUCHSCREEN_PENMOUNT is not set
++# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
++# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
++# CONFIG_TOUCHSCREEN_WM97XX is not set
++# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
++# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
++# CONFIG_TOUCHSCREEN_TSC2005 is not set
++# CONFIG_TOUCHSCREEN_TSC2007 is not set
++# CONFIG_TOUCHSCREEN_W90X900 is not set
++# CONFIG_TOUCHSCREEN_ST1232 is not set
++# CONFIG_TOUCHSCREEN_P1003 is not set
++# CONFIG_TOUCHSCREEN_TPS6507X is not set
++CONFIG_INPUT_MISC=y
++# CONFIG_INPUT_AD714X is not set
++# CONFIG_INPUT_ATI_REMOTE is not set
++# CONFIG_INPUT_ATI_REMOTE2 is not set
++# CONFIG_INPUT_KEYSPAN_REMOTE is not set
++# CONFIG_INPUT_POWERMATE is not set
++# CONFIG_INPUT_YEALINK is not set
++# CONFIG_INPUT_CM109 is not set
++CONFIG_INPUT_UINPUT=y
++# CONFIG_INPUT_PCF8574 is not set
++# CONFIG_INPUT_PWM_BEEPER is not set
++# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
++# CONFIG_INPUT_ADXL34X is not set
++# CONFIG_INPUT_CMA3000 is not set
++CONFIG_INPUT_ISL29023=y
++
++#
++# Hardware I/O ports
++#
++CONFIG_SERIO=y
++CONFIG_SERIO_SERPORT=y
++CONFIG_SERIO_LIBPS2=y
++# CONFIG_SERIO_RAW is not set
++# CONFIG_SERIO_ALTERA_PS2 is not set
++# CONFIG_SERIO_PS2MULT is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_CONSOLE_TRANSLATIONS=y
++CONFIG_VT_CONSOLE=y
++CONFIG_HW_CONSOLE=y
++# CONFIG_VT_HW_CONSOLE_BINDING is not set
++CONFIG_UNIX98_PTYS=y
++# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
++CONFIG_LEGACY_PTYS=y
++CONFIG_LEGACY_PTY_COUNT=256
++# CONFIG_SERIAL_NONSTANDARD is not set
++# CONFIG_N_GSM is not set
++# CONFIG_TRACE_SINK is not set
++CONFIG_DEVKMEM=y
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++# CONFIG_SERIAL_MAX3100 is not set
++# CONFIG_SERIAL_MAX3107 is not set
++CONFIG_SERIAL_IMX=y
++CONFIG_SERIAL_IMX_CONSOLE=y
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_TIMBERDALE is not set
++# CONFIG_SERIAL_ALTERA_JTAGUART is not set
++# CONFIG_SERIAL_ALTERA_UART is not set
++# CONFIG_SERIAL_IFX6X60 is not set
++# CONFIG_SERIAL_XILINX_PS_UART is not set
++# CONFIG_TTY_PRINTK is not set
++CONFIG_FSL_OTP=y
++# CONFIG_HVC_DCC is not set
++# CONFIG_IPMI_HANDLER is not set
++CONFIG_HW_RANDOM=y
++# CONFIG_HW_RANDOM_TIMERIOMEM is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++# CONFIG_RAMOOPS is not set
++CONFIG_MXS_VIIM=y
++CONFIG_I2C=y
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_COMPAT=y
++CONFIG_I2C_CHARDEV=y
++# CONFIG_I2C_MUX is not set
++CONFIG_I2C_HELPER_AUTO=y
++
++#
++# I2C Hardware Bus support
++#
++
++#
++# I2C system bus drivers (mostly embedded / system-on-chip)
++#
++# CONFIG_I2C_DESIGNWARE is not set
++# CONFIG_I2C_GPIO is not set
++CONFIG_I2C_IMX=y
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PCA_PLATFORM is not set
++# CONFIG_I2C_PXA_PCI is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_XILINX is not set
++
++#
++# External I2C/SMBus adapter drivers
++#
++# CONFIG_I2C_DIOLAN_U2C is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_TINY_USB is not set
++
++#
++# Other I2C/SMBus bus drivers
++#
++# CONFIG_I2C_STUB is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++CONFIG_SPI=y
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++# CONFIG_SPI_ALTERA is not set
++CONFIG_SPI_BITBANG=y
++# CONFIG_SPI_GPIO is not set
++CONFIG_SPI_IMX_VER_2_3=y
++CONFIG_SPI_IMX=y
++# CONFIG_SPI_OC_TINY is not set
++# CONFIG_SPI_PXA2XX_PCI is not set
++# CONFIG_SPI_XILINX is not set
++# CONFIG_SPI_DESIGNWARE is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++
++#
++# PPS support
++#
++# CONFIG_PPS is not set
++
++#
++# PPS generators support
++#
++
++#
++# PTP clock support
++#
++
++#
++# Enable Device Drivers -> PPS to see the PTP clock options.
++#
++CONFIG_ARCH_REQUIRE_GPIOLIB=y
++CONFIG_GPIOLIB=y
++CONFIG_GPIO_SYSFS=y
++
++#
++# Memory mapped GPIO drivers:
++#
++# CONFIG_GPIO_BASIC_MMIO is not set
++# CONFIG_GPIO_IT8761E is not set
++
++#
++# I2C GPIO expanders:
++#
++# CONFIG_GPIO_MAX7300 is not set
++# CONFIG_GPIO_MAX732X is not set
++# CONFIG_GPIO_PCA953X_IRQ is not set
++# CONFIG_GPIO_PCF857X is not set
++# CONFIG_GPIO_SX150X is not set
++# CONFIG_GPIO_WM8994 is not set
++# CONFIG_GPIO_ADP5588 is not set
++
++#
++# PCI GPIO expanders:
++#
++
++#
++# SPI GPIO expanders:
++#
++# CONFIG_GPIO_MAX7301 is not set
++# CONFIG_GPIO_MCP23S08 is not set
++# CONFIG_GPIO_MC33880 is not set
++# CONFIG_GPIO_74X164 is not set
++
++#
++# AC97 GPIO expanders:
++#
++
++#
++# MODULbus GPIO expanders:
++#
++# CONFIG_W1 is not set
++CONFIG_POWER_SUPPLY=y
++# CONFIG_POWER_SUPPLY_DEBUG is not set
++# CONFIG_PDA_POWER is not set
++# CONFIG_APM_POWER is not set
++# CONFIG_TEST_POWER is not set
++# CONFIG_BATTERY_DS2780 is not set
++# CONFIG_BATTERY_DS2782 is not set
++# CONFIG_BATTERY_BQ20Z75 is not set
++# CONFIG_BATTERY_BQ27x00 is not set
++# CONFIG_BATTERY_MAX17040 is not set
++# CONFIG_BATTERY_MAX17042 is not set
++# CONFIG_CHARGER_ISP1704 is not set
++CONFIG_CHARGER_MAX8903=y
++# CONFIG_CHARGER_GPIO is not set
++CONFIG_HWMON=y
++# CONFIG_HWMON_VID is not set
++# CONFIG_HWMON_DEBUG_CHIP is not set
++
++#
++# Native drivers
++#
++# CONFIG_SENSORS_AD7414 is not set
++# CONFIG_SENSORS_AD7418 is not set
++# CONFIG_SENSORS_ADCXX is not set
++# CONFIG_SENSORS_ADM1021 is not set
++# CONFIG_SENSORS_ADM1025 is not set
++# CONFIG_SENSORS_ADM1026 is not set
++# CONFIG_SENSORS_ADM1029 is not set
++# CONFIG_SENSORS_ADM1031 is not set
++# CONFIG_SENSORS_ADM9240 is not set
++# CONFIG_SENSORS_ADT7411 is not set
++# CONFIG_SENSORS_ADT7462 is not set
++# CONFIG_SENSORS_ADT7470 is not set
++# CONFIG_SENSORS_ADT7475 is not set
++# CONFIG_SENSORS_ASC7621 is not set
++# CONFIG_SENSORS_ATXP1 is not set
++# CONFIG_SENSORS_DS620 is not set
++# CONFIG_SENSORS_DS1621 is not set
++# CONFIG_SENSORS_F71805F is not set
++# CONFIG_SENSORS_F71882FG is not set
++# CONFIG_SENSORS_F75375S is not set
++# CONFIG_SENSORS_G760A is not set
++# CONFIG_SENSORS_GL518SM is not set
++# CONFIG_SENSORS_GL520SM is not set
++# CONFIG_SENSORS_GPIO_FAN is not set
++# CONFIG_SENSORS_IT87 is not set
++# CONFIG_SENSORS_JC42 is not set
++# CONFIG_SENSORS_LINEAGE is not set
++# CONFIG_SENSORS_LM63 is not set
++# CONFIG_SENSORS_LM70 is not set
++# CONFIG_SENSORS_LM73 is not set
++# CONFIG_SENSORS_LM75 is not set
++# CONFIG_SENSORS_LM77 is not set
++# CONFIG_SENSORS_LM78 is not set
++# CONFIG_SENSORS_LM80 is not set
++# CONFIG_SENSORS_LM83 is not set
++# CONFIG_SENSORS_LM85 is not set
++# CONFIG_SENSORS_LM87 is not set
++# CONFIG_SENSORS_LM90 is not set
++# CONFIG_SENSORS_LM92 is not set
++# CONFIG_SENSORS_LM93 is not set
++# CONFIG_SENSORS_LTC4151 is not set
++# CONFIG_SENSORS_LTC4215 is not set
++# CONFIG_SENSORS_LTC4245 is not set
++# CONFIG_SENSORS_LTC4261 is not set
++# CONFIG_SENSORS_LM95241 is not set
++# CONFIG_SENSORS_MAX1111 is not set
++# CONFIG_SENSORS_MAX16065 is not set
++# CONFIG_SENSORS_MAX1619 is not set
++# CONFIG_SENSORS_MAX6639 is not set
++# CONFIG_SENSORS_MAX6642 is not set
++# CONFIG_SENSORS_MAX17135 is not set
++# CONFIG_SENSORS_MAX6650 is not set
++# CONFIG_SENSORS_PC87360 is not set
++# CONFIG_SENSORS_PC87427 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_PMBUS is not set
++# CONFIG_SENSORS_SHT15 is not set
++# CONFIG_SENSORS_SHT21 is not set
++# CONFIG_SENSORS_SMM665 is not set
++# CONFIG_SENSORS_DME1737 is not set
++# CONFIG_SENSORS_EMC1403 is not set
++# CONFIG_SENSORS_EMC2103 is not set
++# CONFIG_SENSORS_EMC6W201 is not set
++# CONFIG_SENSORS_SMSC47M1 is not set
++# CONFIG_SENSORS_SMSC47M192 is not set
++# CONFIG_SENSORS_SMSC47B397 is not set
++# CONFIG_SENSORS_SCH5627 is not set
++# CONFIG_SENSORS_ADS1015 is not set
++# CONFIG_SENSORS_ADS7828 is not set
++# CONFIG_SENSORS_ADS7871 is not set
++# CONFIG_SENSORS_AMC6821 is not set
++# CONFIG_SENSORS_THMC50 is not set
++# CONFIG_SENSORS_TMP102 is not set
++# CONFIG_SENSORS_TMP401 is not set
++# CONFIG_SENSORS_TMP421 is not set
++# CONFIG_SENSORS_VT1211 is not set
++# CONFIG_SENSORS_W83781D is not set
++# CONFIG_SENSORS_W83791D is not set
++# CONFIG_SENSORS_W83792D is not set
++# CONFIG_SENSORS_W83793 is not set
++# CONFIG_SENSORS_W83795 is not set
++# CONFIG_SENSORS_W83L785TS is not set
++# CONFIG_SENSORS_W83L786NG is not set
++# CONFIG_SENSORS_W83627HF is not set
++# CONFIG_SENSORS_W83627EHF is not set
++CONFIG_SENSORS_MAG3110=y
++# CONFIG_MXC_MMA8450 is not set
++CONFIG_MXC_MMA8451=y
++CONFIG_THERMAL=y
++# CONFIG_THERMAL_HWMON is not set
++CONFIG_WATCHDOG=y
++CONFIG_WATCHDOG_NOWAYOUT=y
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++# CONFIG_MPCORE_WATCHDOG is not set
++# CONFIG_MAX63XX_WATCHDOG is not set
++CONFIG_IMX2_WDT=y
++
++#
++# USB-based Watchdog Cards
++#
++# CONFIG_USBPCWATCHDOG is not set
++CONFIG_SSB_POSSIBLE=y
++
++#
++# Sonics Silicon Backplane
++#
++# CONFIG_SSB is not set
++CONFIG_BCMA_POSSIBLE=y
++
++#
++# Broadcom specific AMBA
++#
++# CONFIG_BCMA is not set
++CONFIG_MFD_SUPPORT=y
++CONFIG_MFD_CORE=y
++# CONFIG_MFD_88PM860X is not set
++# CONFIG_MFD_SM501 is not set
++# CONFIG_MFD_ASIC3 is not set
++# CONFIG_HTC_EGPIO is not set
++# CONFIG_HTC_PASIC3 is not set
++# CONFIG_HTC_I2CPLD is not set
++# CONFIG_UCB1400_CORE is not set
++# CONFIG_TPS6105X is not set
++# CONFIG_TPS65010 is not set
++# CONFIG_TPS6507X is not set
++# CONFIG_MFD_TPS6586X is not set
++# CONFIG_TWL4030_CORE is not set
++# CONFIG_MFD_STMPE is not set
++# CONFIG_MFD_TC3589X is not set
++# CONFIG_MFD_TMIO is not set
++# CONFIG_MFD_T7L66XB is not set
++# CONFIG_MFD_TC6387XB is not set
++# CONFIG_MFD_TC6393XB is not set
++# CONFIG_PMIC_DA903X is not set
++# CONFIG_PMIC_ADP5520 is not set
++# CONFIG_MFD_MAX8925 is not set
++# CONFIG_MFD_MAX8997 is not set
++# CONFIG_MFD_MAX8998 is not set
++# CONFIG_MFD_WM8400 is not set
++# CONFIG_MFD_WM831X_I2C is not set
++# CONFIG_MFD_WM831X_SPI is not set
++# CONFIG_MFD_WM8350_I2C is not set
++CONFIG_MFD_WM8994=y
++# CONFIG_MFD_PCF50633 is not set
++# CONFIG_PMIC_DIALOG is not set
++# CONFIG_MFD_MC_PMIC is not set
++# CONFIG_MFD_MC34708 is not set
++CONFIG_MFD_PFUZE=y
++# CONFIG_MFD_MC13XXX is not set
++# CONFIG_ABX500_CORE is not set
++# CONFIG_EZX_PCAP is not set
++# CONFIG_MFD_WL1273_CORE is not set
++# CONFIG_MFD_TPS65910 is not set
++# CONFIG_MFD_MAX17135 is not set
++CONFIG_MFD_MXC_HDMI=y
++CONFIG_REGULATOR=y
++# CONFIG_REGULATOR_DEBUG is not set
++# CONFIG_REGULATOR_DUMMY is not set
++CONFIG_REGULATOR_FIXED_VOLTAGE=y
++# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
++# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
++# CONFIG_REGULATOR_BQ24022 is not set
++# CONFIG_REGULATOR_MAX1586 is not set
++# CONFIG_REGULATOR_MAX8649 is not set
++# CONFIG_REGULATOR_MAX8660 is not set
++# CONFIG_REGULATOR_MAX8952 is not set
++# CONFIG_REGULATOR_WM8994 is not set
++# CONFIG_REGULATOR_LP3971 is not set
++# CONFIG_REGULATOR_LP3972 is not set
++# CONFIG_REGULATOR_MC34708 is not set
++CONFIG_REGULATOR_PFUZE100=y
++# CONFIG_REGULATOR_TPS65023 is not set
++# CONFIG_REGULATOR_TPS6507X is not set
++# CONFIG_REGULATOR_ISL6271A is not set
++# CONFIG_REGULATOR_AD5398 is not set
++CONFIG_REGULATOR_ANATOP=y
++# CONFIG_REGULATOR_TPS6524X is not set
++CONFIG_MEDIA_SUPPORT=y
++
++#
++# Multimedia core support
++#
++# CONFIG_MEDIA_CONTROLLER is not set
++CONFIG_VIDEO_DEV=y
++CONFIG_VIDEO_V4L2_COMMON=y
++# CONFIG_DVB_CORE is not set
++CONFIG_VIDEO_MEDIA=y
++
++#
++# Multimedia drivers
++#
++# CONFIG_RC_CORE is not set
++# CONFIG_MEDIA_ATTACH is not set
++CONFIG_MEDIA_TUNER=y
++# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
++CONFIG_MEDIA_TUNER_SIMPLE=y
++CONFIG_MEDIA_TUNER_TDA8290=y
++CONFIG_MEDIA_TUNER_TDA827X=y
++CONFIG_MEDIA_TUNER_TDA18271=y
++CONFIG_MEDIA_TUNER_TDA9887=y
++CONFIG_MEDIA_TUNER_TEA5761=y
++CONFIG_MEDIA_TUNER_TEA5767=y
++CONFIG_MEDIA_TUNER_MT20XX=y
++CONFIG_MEDIA_TUNER_XC2028=y
++CONFIG_MEDIA_TUNER_XC5000=y
++CONFIG_MEDIA_TUNER_MC44S803=y
++CONFIG_VIDEO_V4L2=y
++CONFIG_VIDEOBUF_GEN=y
++CONFIG_VIDEOBUF_DMA_CONTIG=y
++CONFIG_VIDEO_CAPTURE_DRIVERS=y
++# CONFIG_VIDEO_ADV_DEBUG is not set
++# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
++# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
++
++#
++# Encoders, decoders, sensors and other helper chips
++#
++
++#
++# Audio decoders, processors and mixers
++#
++# CONFIG_VIDEO_TVAUDIO is not set
++# CONFIG_VIDEO_TDA7432 is not set
++# CONFIG_VIDEO_TDA9840 is not set
++# CONFIG_VIDEO_TEA6415C is not set
++# CONFIG_VIDEO_TEA6420 is not set
++# CONFIG_VIDEO_MSP3400 is not set
++# CONFIG_VIDEO_CS5345 is not set
++# CONFIG_VIDEO_CS53L32A is not set
++# CONFIG_VIDEO_TLV320AIC23B is not set
++# CONFIG_VIDEO_WM8775 is not set
++# CONFIG_VIDEO_WM8739 is not set
++# CONFIG_VIDEO_VP27SMPX is not set
++
++#
++# RDS decoders
++#
++# CONFIG_VIDEO_SAA6588 is not set
++
++#
++# Video decoders
++#
++# CONFIG_VIDEO_ADV7180 is not set
++# CONFIG_VIDEO_BT819 is not set
++# CONFIG_VIDEO_BT856 is not set
++# CONFIG_VIDEO_BT866 is not set
++# CONFIG_VIDEO_KS0127 is not set
++# CONFIG_VIDEO_SAA7110 is not set
++# CONFIG_VIDEO_SAA711X is not set
++# CONFIG_VIDEO_SAA7191 is not set
++# CONFIG_VIDEO_TVP514X is not set
++# CONFIG_VIDEO_TVP5150 is not set
++# CONFIG_VIDEO_TVP7002 is not set
++# CONFIG_VIDEO_VPX3220 is not set
++
++#
++# Video and audio decoders
++#
++# CONFIG_VIDEO_SAA717X is not set
++# CONFIG_VIDEO_CX25840 is not set
++
++#
++# MPEG video encoders
++#
++# CONFIG_VIDEO_CX2341X is not set
++
++#
++# Video encoders
++#
++# CONFIG_VIDEO_SAA7127 is not set
++# CONFIG_VIDEO_SAA7185 is not set
++# CONFIG_VIDEO_ADV7170 is not set
++# CONFIG_VIDEO_ADV7175 is not set
++# CONFIG_VIDEO_ADV7343 is not set
++# CONFIG_VIDEO_AK881X is not set
++
++#
++# Camera sensor devices
++#
++# CONFIG_VIDEO_OV7670 is not set
++# CONFIG_VIDEO_MT9V011 is not set
++# CONFIG_VIDEO_TCM825X is not set
++
++#
++# Video improvement chips
++#
++# CONFIG_VIDEO_UPD64031A is not set
++# CONFIG_VIDEO_UPD64083 is not set
++
++#
++# Miscelaneous helper chips
++#
++# CONFIG_VIDEO_THS7303 is not set
++# CONFIG_VIDEO_M52790 is not set
++# CONFIG_VIDEO_VIVI is not set
++CONFIG_VIDEO_MXC_CAMERA=m
++
++#
++# MXC Camera/V4L2 PRP Features support
++#
++CONFIG_VIDEO_MXC_IPU_CAMERA=y
++# CONFIG_VIDEO_MXC_CSI_CAMERA is not set
++# CONFIG_MXC_CAMERA_MICRON111 is not set
++# CONFIG_MXC_CAMERA_OV2640 is not set
++CONFIG_MXC_CAMERA_OV3640=m
++CONFIG_MXC_CAMERA_OV5640=m
++CONFIG_MXC_CAMERA_OV5640_MIPI=m
++CONFIG_MXC_CAMERA_OV8820_MIPI=m
++CONFIG_MXC_CAMERA_OV5642=m
++CONFIG_MXC_CAMERA_SENSOR_CLK=m
++CONFIG_MXC_IPU_PRP_VF_SDC=m
++CONFIG_MXC_IPU_PRP_ENC=m
++CONFIG_MXC_IPU_CSI_ENC=m
++CONFIG_VIDEO_MXC_OUTPUT=y
++CONFIG_VIDEO_MXC_IPU_OUTPUT=y
++# CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT is not set
++# CONFIG_VIDEO_MXC_OPL is not set
++# CONFIG_VIDEO_CPIA2 is not set
++# CONFIG_VIDEO_TIMBERDALE is not set
++# CONFIG_VIDEO_SR030PC30 is not set
++# CONFIG_VIDEO_NOON010PC30 is not set
++# CONFIG_SOC_CAMERA is not set
++CONFIG_V4L_USB_DRIVERS=y
++CONFIG_USB_VIDEO_CLASS=m
++CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
++CONFIG_USB_GSPCA=m
++# CONFIG_USB_M5602 is not set
++# CONFIG_USB_STV06XX is not set
++# CONFIG_USB_GL860 is not set
++# CONFIG_USB_GSPCA_BENQ is not set
++# CONFIG_USB_GSPCA_CONEX is not set
++# CONFIG_USB_GSPCA_CPIA1 is not set
++# CONFIG_USB_GSPCA_ETOMS is not set
++# CONFIG_USB_GSPCA_FINEPIX is not set
++# CONFIG_USB_GSPCA_JEILINJ is not set
++# CONFIG_USB_GSPCA_KINECT is not set
++# CONFIG_USB_GSPCA_KONICA is not set
++# CONFIG_USB_GSPCA_MARS is not set
++# CONFIG_USB_GSPCA_MR97310A is not set
++# CONFIG_USB_GSPCA_NW80X is not set
++# CONFIG_USB_GSPCA_OV519 is not set
++# CONFIG_USB_GSPCA_OV534 is not set
++# CONFIG_USB_GSPCA_OV534_9 is not set
++# CONFIG_USB_GSPCA_PAC207 is not set
++# CONFIG_USB_GSPCA_PAC7302 is not set
++# CONFIG_USB_GSPCA_PAC7311 is not set
++# CONFIG_USB_GSPCA_SN9C2028 is not set
++# CONFIG_USB_GSPCA_SN9C20X is not set
++# CONFIG_USB_GSPCA_SONIXB is not set
++# CONFIG_USB_GSPCA_SONIXJ is not set
++# CONFIG_USB_GSPCA_SPCA500 is not set
++# CONFIG_USB_GSPCA_SPCA501 is not set
++# CONFIG_USB_GSPCA_SPCA505 is not set
++# CONFIG_USB_GSPCA_SPCA506 is not set
++# CONFIG_USB_GSPCA_SPCA508 is not set
++# CONFIG_USB_GSPCA_SPCA561 is not set
++# CONFIG_USB_GSPCA_SPCA1528 is not set
++# CONFIG_USB_GSPCA_SQ905 is not set
++# CONFIG_USB_GSPCA_SQ905C is not set
++# CONFIG_USB_GSPCA_SQ930X is not set
++# CONFIG_USB_GSPCA_STK014 is not set
++# CONFIG_USB_GSPCA_STV0680 is not set
++# CONFIG_USB_GSPCA_SUNPLUS is not set
++# CONFIG_USB_GSPCA_T613 is not set
++# CONFIG_USB_GSPCA_TV8532 is not set
++# CONFIG_USB_GSPCA_VC032X is not set
++# CONFIG_USB_GSPCA_VICAM is not set
++# CONFIG_USB_GSPCA_XIRLINK_CIT is not set
++# CONFIG_USB_GSPCA_ZC3XX is not set
++# CONFIG_VIDEO_PVRUSB2 is not set
++# CONFIG_VIDEO_HDPVR is not set
++# CONFIG_VIDEO_USBVISION is not set
++# CONFIG_USB_ET61X251 is not set
++# CONFIG_USB_SN9C102 is not set
++# CONFIG_USB_PWC is not set
++# CONFIG_USB_ZR364XX is not set
++# CONFIG_USB_STKWEBCAM is not set
++# CONFIG_USB_S2255 is not set
++# CONFIG_V4L_MEM2MEM_DRIVERS is not set
++# CONFIG_RADIO_ADAPTERS is not set
++
++#
++# Graphics support
++#
++# CONFIG_DRM is not set
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++# CONFIG_FB_BOOT_VESA_SUPPORT is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_FOREIGN_ENDIAN is not set
++# CONFIG_FB_SYS_FOPS is not set
++# CONFIG_FB_WMT_GE_ROPS is not set
++CONFIG_FB_DEFERRED_IO=y
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++CONFIG_FB_MODE_HELPERS=y
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_UVESA is not set
++# CONFIG_FB_S1D13XXX is not set
++# CONFIG_FB_TMIO is not set
++# CONFIG_FB_UDL is not set
++# CONFIG_FB_VIRTUAL is not set
++# CONFIG_FB_METRONOME is not set
++# CONFIG_FB_BROADSHEET is not set
++CONFIG_BACKLIGHT_LCD_SUPPORT=y
++# CONFIG_LCD_CLASS_DEVICE is not set
++CONFIG_BACKLIGHT_CLASS_DEVICE=y
++# CONFIG_BACKLIGHT_GENERIC is not set
++CONFIG_BACKLIGHT_PWM=y
++# CONFIG_BACKLIGHT_ADP8860 is not set
++# CONFIG_BACKLIGHT_ADP8870 is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++CONFIG_FB_MXC=y
++CONFIG_FB_MXC_EDID=y
++CONFIG_FB_MXC_SYNC_PANEL=y
++# CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL is not set
++CONFIG_FB_MXC_LDB=y
++CONFIG_FB_MXC_MIPI_DSI=y
++CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y
++# CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set
++# CONFIG_FB_MXC_SEIKO_WVGA_SYNC_PANEL is not set
++# CONFIG_FB_MXC_SII902X is not set
++# CONFIG_FB_MXC_CH7026 is not set
++# CONFIG_FB_MXC_TVOUT_CH7024 is not set
++# CONFIG_FB_MXC_ASYNC_PANEL is not set
++CONFIG_FB_MXC_EINK_PANEL=y
++# CONFIG_FB_MXC_EINK_AUTO_UPDATE_MODE is not set
++# CONFIG_FB_MXC_ELCDIF_FB is not set
++CONFIG_FB_MXC_HDMI=y
++
++#
++# Console display driver support
++#
++CONFIG_DUMMY_CONSOLE=y
++CONFIG_FRAMEBUFFER_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
++# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
++CONFIG_FONTS=y
++# CONFIG_FONT_8x8 is not set
++CONFIG_FONT_8x16=y
++# CONFIG_FONT_6x11 is not set
++# CONFIG_FONT_7x14 is not set
++# CONFIG_FONT_PEARL_8x8 is not set
++# CONFIG_FONT_ACORN_8x8 is not set
++# CONFIG_FONT_MINI_4x6 is not set
++# CONFIG_FONT_SUN8x16 is not set
++# CONFIG_FONT_SUN12x22 is not set
++# CONFIG_FONT_10x18 is not set
++CONFIG_LOGO=y
++CONFIG_LOGO_LINUX_MONO=y
++CONFIG_LOGO_LINUX_VGA16=y
++CONFIG_LOGO_LINUX_CLUT224=y
++CONFIG_SOUND=y
++# CONFIG_SOUND_OSS_CORE is not set
++CONFIG_SND=y
++CONFIG_SND_TIMER=y
++CONFIG_SND_PCM=y
++CONFIG_SND_HWDEP=y
++CONFIG_SND_RAWMIDI=y
++CONFIG_SND_JACK=y
++# CONFIG_SND_SEQUENCER is not set
++# CONFIG_SND_MIXER_OSS is not set
++# CONFIG_SND_PCM_OSS is not set
++# CONFIG_SND_HRTIMER is not set
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++# CONFIG_SND_RAWMIDI_SEQ is not set
++# CONFIG_SND_OPL3_LIB_SEQ is not set
++# CONFIG_SND_OPL4_LIB_SEQ is not set
++# CONFIG_SND_SBAWE_SEQ is not set
++# CONFIG_SND_EMU10K1_SEQ is not set
++CONFIG_SND_DRIVERS=y
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_ALOOP is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++CONFIG_SND_ARM=y
++CONFIG_SND_SPI=y
++CONFIG_SND_USB=y
++CONFIG_SND_USB_AUDIO=y
++# CONFIG_SND_USB_UA101 is not set
++# CONFIG_SND_USB_CAIAQ is not set
++# CONFIG_SND_USB_6FIRE is not set
++CONFIG_SND_SOC=y
++# CONFIG_SND_SOC_CACHE_LZO is not set
++CONFIG_SND_SOC_AC97_BUS=y
++CONFIG_SND_IMX_SOC=y
++CONFIG_SND_MXC_SOC_MX2=y
++CONFIG_SND_MXC_SOC_SPDIF_DAI=y
++CONFIG_SND_SOC_IMX_SGTL5000=y
++CONFIG_SND_SOC_IMX_WM8958=y
++CONFIG_SND_SOC_IMX_WM8962=y
++CONFIG_SND_SOC_IMX_SPDIF=y
++CONFIG_SND_SOC_IMX_HDMI=y
++CONFIG_SND_SOC_I2C_AND_SPI=y
++# CONFIG_SND_SOC_ALL_CODECS is not set
++CONFIG_SND_SOC_WM_HUBS=y
++CONFIG_SND_SOC_MXC_HDMI=y
++CONFIG_SND_SOC_MXC_SPDIF=y
++CONFIG_SND_SOC_SGTL5000=y
++CONFIG_SND_SOC_WM8962=y
++CONFIG_SND_SOC_WM8994=y
++# CONFIG_SOUND_PRIME is not set
++CONFIG_AC97_BUS=y
++CONFIG_HID_SUPPORT=y
++CONFIG_HID=y
++CONFIG_HIDRAW=y
++
++#
++# USB Input Devices
++#
++CONFIG_USB_HID=y
++# CONFIG_HID_PID is not set
++# CONFIG_USB_HIDDEV is not set
++
++#
++# Special HID drivers
++#
++CONFIG_HID_A4TECH=m
++# CONFIG_HID_ACRUX is not set
++CONFIG_HID_APPLE=m
++CONFIG_HID_BELKIN=m
++CONFIG_HID_CHERRY=m
++CONFIG_HID_CHICONY=m
++# CONFIG_HID_PRODIKEYS is not set
++CONFIG_HID_CYPRESS=m
++# CONFIG_HID_DRAGONRISE is not set
++# CONFIG_HID_EMS_FF is not set
++# CONFIG_HID_ELECOM is not set
++CONFIG_HID_EZKEY=m
++# CONFIG_HID_KEYTOUCH is not set
++# CONFIG_HID_KYE is not set
++# CONFIG_HID_UCLOGIC is not set
++# CONFIG_HID_WALTOP is not set
++CONFIG_HID_GYRATION=m
++# CONFIG_HID_TWINHAN is not set
++# CONFIG_HID_KENSINGTON is not set
++# CONFIG_HID_LCPOWER is not set
++CONFIG_HID_LOGITECH=m
++# CONFIG_LOGITECH_FF is not set
++# CONFIG_LOGIRUMBLEPAD2_FF is not set
++# CONFIG_LOGIG940_FF is not set
++# CONFIG_LOGIWII_FF is not set
++# CONFIG_HID_MAGICMOUSE is not set
++CONFIG_HID_MICROSOFT=m
++CONFIG_HID_MONTEREY=m
++# CONFIG_HID_MULTITOUCH is not set
++# CONFIG_HID_NTRIG is not set
++# CONFIG_HID_ORTEK is not set
++CONFIG_HID_PANTHERLORD=m
++# CONFIG_PANTHERLORD_FF is not set
++CONFIG_HID_PETALYNX=m
++# CONFIG_HID_PICOLCD is not set
++# CONFIG_HID_QUANTA is not set
++# CONFIG_HID_ROCCAT is not set
++# CONFIG_HID_ROCCAT_ARVO is not set
++# CONFIG_HID_ROCCAT_KONE is not set
++# CONFIG_HID_ROCCAT_KONEPLUS is not set
++# CONFIG_HID_ROCCAT_KOVAPLUS is not set
++# CONFIG_HID_ROCCAT_PYRA is not set
++CONFIG_HID_SAMSUNG=m
++CONFIG_HID_SONY=m
++CONFIG_HID_SUNPLUS=m
++# CONFIG_HID_GREENASIA is not set
++# CONFIG_HID_SMARTJOYPLUS is not set
++# CONFIG_HID_TOPSEED is not set
++# CONFIG_HID_THRUSTMASTER is not set
++# CONFIG_HID_WACOM is not set
++# CONFIG_HID_ZEROPLUS is not set
++# CONFIG_HID_ZYDACRON is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++CONFIG_USB_ARCH_HAS_EHCI=y
++CONFIG_USB=y
++# CONFIG_USB_DEBUG is not set
++# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
++
++#
++# Miscellaneous USB options
++#
++# CONFIG_USB_DEVICEFS is not set
++# CONFIG_USB_DEVICE_CLASS is not set
++# CONFIG_USB_DYNAMIC_MINORS is not set
++CONFIG_USB_SUSPEND=y
++CONFIG_USB_OTG=y
++# CONFIG_USB_OTG_WHITELIST is not set
++# CONFIG_USB_OTG_BLACKLIST_HUB is not set
++# CONFIG_USB_MON is not set
++# CONFIG_USB_WUSB is not set
++# CONFIG_USB_WUSB_CBAF is not set
++
++#
++# USB Host Controller Drivers
++#
++# CONFIG_USB_C67X00_HCD is not set
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_ARC=y
++CONFIG_USB_EHCI_ARC_OTG=y
++# CONFIG_USB_EHCI_ARC_HSIC is not set
++# CONFIG_USB_STATIC_IRAM is not set
++CONFIG_USB_EHCI_ROOT_HUB_TT=y
++# CONFIG_USB_EHCI_TT_NEWSCHED is not set
++# CONFIG_USB_EHCI_MXC is not set
++# CONFIG_USB_OXU210HP_HCD is not set
++# CONFIG_USB_ISP116X_HCD is not set
++# CONFIG_USB_ISP1760_HCD is not set
++# CONFIG_USB_ISP1362_HCD is not set
++# CONFIG_USB_SL811_HCD is not set
++# CONFIG_USB_R8A66597_HCD is not set
++# CONFIG_USB_HWA_HCD is not set
++# CONFIG_USB_MUSB_HDRC is not set
++
++#
++# USB Device Class drivers
++#
++# CONFIG_USB_ACM is not set
++# CONFIG_USB_PRINTER is not set
++# CONFIG_USB_WDM is not set
++# CONFIG_USB_TMC is not set
++
++#
++# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
++#
++
++#
++# also be needed; see USB_STORAGE Help for more info
++#
++CONFIG_USB_STORAGE=y
++# CONFIG_USB_STORAGE_DEBUG is not set
++# CONFIG_USB_STORAGE_REALTEK is not set
++# CONFIG_USB_STORAGE_DATAFAB is not set
++# CONFIG_USB_STORAGE_FREECOM is not set
++# CONFIG_USB_STORAGE_ISD200 is not set
++# CONFIG_USB_STORAGE_USBAT is not set
++# CONFIG_USB_STORAGE_SDDR09 is not set
++# CONFIG_USB_STORAGE_SDDR55 is not set
++# CONFIG_USB_STORAGE_JUMPSHOT is not set
++# CONFIG_USB_STORAGE_ALAUDA is not set
++# CONFIG_USB_STORAGE_ONETOUCH is not set
++# CONFIG_USB_STORAGE_KARMA is not set
++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
++# CONFIG_USB_STORAGE_ENE_UB6250 is not set
++# CONFIG_USB_UAS is not set
++# CONFIG_USB_LIBUSUAL is not set
++
++#
++# USB Imaging devices
++#
++# CONFIG_USB_MDC800 is not set
++# CONFIG_USB_MICROTEK is not set
++
++#
++# USB port drivers
++#
++# CONFIG_USB_SERIAL is not set
++
++#
++# USB Miscellaneous drivers
++#
++# CONFIG_USB_EMI62 is not set
++# CONFIG_USB_EMI26 is not set
++# CONFIG_USB_ADUTUX is not set
++# CONFIG_USB_SEVSEG is not set
++# CONFIG_USB_RIO500 is not set
++# CONFIG_USB_LEGOTOWER is not set
++# CONFIG_USB_LCD is not set
++# CONFIG_USB_LED is not set
++# CONFIG_USB_CYPRESS_CY7C63 is not set
++# CONFIG_USB_CYTHERM is not set
++# CONFIG_USB_IDMOUSE is not set
++# CONFIG_USB_FTDI_ELAN is not set
++# CONFIG_USB_APPLEDISPLAY is not set
++# CONFIG_USB_SISUSBVGA is not set
++# CONFIG_USB_LD is not set
++# CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_IOWARRIOR is not set
++# CONFIG_USB_TEST is not set
++# CONFIG_USB_ISIGHTFW is not set
++# CONFIG_USB_YUREX is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++# CONFIG_USB_GADGET_DEBUG_FS is not set
++CONFIG_USB_GADGET_VBUS_DRAW=2
++CONFIG_USB_GADGET_SELECTED=y
++CONFIG_USB_GADGET_ARC=y
++CONFIG_USB_ARC=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_FUSB300 is not set
++# CONFIG_USB_GADGET_R8A66597 is not set
++# CONFIG_USB_GADGET_PXA_U2O is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++# CONFIG_USB_ZERO is not set
++CONFIG_USB_AUDIO=m
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++# CONFIG_USB_ETH_EEM is not set
++# CONFIG_USB_G_NCM is not set
++# CONFIG_USB_GADGETFS is not set
++# CONFIG_USB_FUNCTIONFS is not set
++CONFIG_USB_FILE_STORAGE=m
++# CONFIG_FSL_UTP is not set
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++# CONFIG_USB_MASS_STORAGE is not set
++CONFIG_USB_G_SERIAL=m
++# CONFIG_USB_MIDI_GADGET is not set
++# CONFIG_USB_G_PRINTER is not set
++# CONFIG_USB_CDC_COMPOSITE is not set
++# CONFIG_USB_G_MULTI is not set
++# CONFIG_USB_G_HID is not set
++# CONFIG_USB_G_DBGP is not set
++# CONFIG_USB_G_WEBCAM is not set
++
++#
++# OTG and related infrastructure
++#
++CONFIG_USB_OTG_UTILS=y
++# CONFIG_USB_GPIO_VBUS is not set
++# CONFIG_USB_ULPI is not set
++# CONFIG_NOP_USB_XCEIV is not set
++CONFIG_MXC_OTG=y
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++CONFIG_MMC_UNSAFE_RESUME=y
++# CONFIG_MMC_CLKGATE is not set
++
++#
++# MMC/SD/SDIO Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++CONFIG_MMC_BLOCK_MINORS=8
++CONFIG_MMC_BLOCK_BOUNCE=y
++# CONFIG_SDIO_UART is not set
++# CONFIG_MMC_TEST is not set
++
++#
++# MMC/SD/SDIO Host Controller Drivers
++#
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_IO_ACCESSORS=y
++CONFIG_MMC_SDHCI_PLTFM=y
++CONFIG_MMC_SDHCI_ESDHC_IMX=y
++# CONFIG_MMC_DW is not set
++# CONFIG_MMC_VUB300 is not set
++# CONFIG_MMC_USHC is not set
++# CONFIG_MEMSTICK is not set
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++# CONFIG_LEDS_LM3530 is not set
++# CONFIG_LEDS_PCA9532 is not set
++# CONFIG_LEDS_GPIO is not set
++# CONFIG_LEDS_LP3944 is not set
++# CONFIG_LEDS_LP5521 is not set
++# CONFIG_LEDS_LP5523 is not set
++# CONFIG_LEDS_PCA955X is not set
++# CONFIG_LEDS_DAC124S085 is not set
++# CONFIG_LEDS_PWM is not set
++# CONFIG_LEDS_REGULATOR is not set
++# CONFIG_LEDS_BD2802 is not set
++# CONFIG_LEDS_LT3593 is not set
++# CONFIG_LEDS_TRIGGERS is not set
++
++#
++# LED Triggers
++#
++
++#
++# LED Triggers
++#
++# CONFIG_NFC_DEVICES is not set
++# CONFIG_ACCESSIBILITY is not set
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++CONFIG_RTC_INTF_DEV_UIE_EMUL=y
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_DS3232 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_ISL12022 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++# CONFIG_RTC_DRV_BQ32K is not set
++# CONFIG_RTC_DRV_S35390A is not set
++# CONFIG_RTC_DRV_FM3130 is not set
++# CONFIG_RTC_DRV_RX8581 is not set
++# CONFIG_RTC_DRV_RX8025 is not set
++# CONFIG_RTC_DRV_EM3027 is not set
++# CONFIG_RTC_DRV_RV3029C2 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_M41T93 is not set
++# CONFIG_RTC_DRV_M41T94 is not set
++# CONFIG_RTC_DRV_DS1305 is not set
++# CONFIG_RTC_DRV_DS1390 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++# CONFIG_RTC_DRV_R9701 is not set
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_DS3234 is not set
++# CONFIG_RTC_DRV_PCF2123 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_CMOS is not set
++# CONFIG_RTC_DRV_DS1286 is not set
++# CONFIG_RTC_DRV_DS1511 is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T35 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_MSM6242 is not set
++# CONFIG_RTC_MXC is not set
++# CONFIG_RTC_DRV_MXC_V2 is not set
++CONFIG_RTC_DRV_SNVS=y
++# CONFIG_RTC_DRV_BQ4802 is not set
++# CONFIG_RTC_DRV_RP5C01 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_DMADEVICES=y
++# CONFIG_DMADEVICES_DEBUG is not set
++
++#
++# DMA Devices
++#
++# CONFIG_DW_DMAC is not set
++CONFIG_MXC_PXP_V2=y
++CONFIG_MXC_PXP_CLIENT_DEVICE=y
++# CONFIG_TIMB_DMA is not set
++CONFIG_IMX_SDMA=y
++# CONFIG_MXS_DMA is not set
++CONFIG_DMA_ENGINE=y
++
++#
++# DMA Clients
++#
++# CONFIG_NET_DMA is not set
++# CONFIG_ASYNC_TX_DMA is not set
++# CONFIG_DMATEST is not set
++# CONFIG_AUXDISPLAY is not set
++# CONFIG_UIO is not set
++# CONFIG_STAGING is not set
++CONFIG_CLKDEV_LOOKUP=y
++CONFIG_CLKSRC_MMIO=y
++
++#
++# MXC support drivers
++#
++CONFIG_MXC_IPU=y
++CONFIG_MXC_IPU_V3=y
++CONFIG_MXC_IPU_V3H=y
++
++#
++# MXC SSI support
++#
++# CONFIG_MXC_SSI is not set
++
++#
++# MXC Digital Audio Multiplexer support
++#
++# CONFIG_MXC_DAM is not set
++
++#
++# MXC PMIC support
++#
++# CONFIG_MXC_PMIC_MC13783 is not set
++# CONFIG_MXC_PMIC_MC13892 is not set
++# CONFIG_MXC_PMIC_MC34704 is not set
++# CONFIG_MXC_PMIC_MC9SDZ60 is not set
++# CONFIG_MXC_PMIC_MC9S08DZ60 is not set
++
++#
++# MXC Security Drivers
++#
++# CONFIG_MXC_SECURITY_SCC is not set
++# CONFIG_MXC_SECURITY_RNG is not set
++
++#
++# MXC MPEG4 Encoder Kernel module support
++#
++# CONFIG_MXC_HMP4E is not set
++
++#
++# MXC HARDWARE EVENT
++#
++# CONFIG_MXC_HWEVENT is not set
++
++#
++# MXC VPU(Video Processing Unit) support
++#
++CONFIG_MXC_VPU=y
++# CONFIG_MXC_VPU_DEBUG is not set
++
++#
++# MXC Asynchronous Sample Rate Converter support
++#
++CONFIG_MXC_ASRC=y
++
++#
++# MXC Bluetooth support
++#
++
++#
++# Broadcom GPS ioctrl support
++#
++
++#
++# MXC Media Local Bus Driver
++#
++CONFIG_MXC_MLB=y
++CONFIG_MXC_MLB150=m
++
++#
++# i.MX ADC support
++#
++# CONFIG_IMX_ADC is not set
++
++#
++# MXC Vivante GPU support
++#
++CONFIG_MXC_GPU_VIV=m
++
++#
++# ANATOP_THERMAL
++#
++CONFIG_ANATOP_THERMAL=y
++
++#
++# MXC MIPI Support
++#
++CONFIG_MXC_MIPI_CSI2=y
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
++CONFIG_EXT3_FS_XATTR=y
++# CONFIG_EXT3_FS_POSIX_ACL is not set
++# CONFIG_EXT3_FS_SECURITY is not set
++CONFIG_EXT4_FS=y
++CONFIG_EXT4_FS_XATTR=y
++# CONFIG_EXT4_FS_POSIX_ACL is not set
++# CONFIG_EXT4_FS_SECURITY is not set
++# CONFIG_EXT4_DEBUG is not set
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
++CONFIG_JBD2=y
++# CONFIG_JBD2_DEBUG is not set
++CONFIG_FS_MBCACHE=y
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_BTRFS_FS is not set
++# CONFIG_NILFS2_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++CONFIG_FILE_LOCKING=y
++CONFIG_FSNOTIFY=y
++CONFIG_DNOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_FANOTIFY is not set
++# CONFIG_QUOTA is not set
++# CONFIG_QUOTACTL is not set
++CONFIG_AUTOFS4_FS=m
++# CONFIG_FUSE_FS is not set
++
++#
++# Caches
++#
++# CONFIG_FSCACHE is not set
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=y
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_PROC_PAGE_MONITOR=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_TMPFS_XATTR is not set
++# CONFIG_HUGETLB_PAGE is not set
++# CONFIG_CONFIGFS_FS is not set
++CONFIG_MISC_FILESYSTEMS=y
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++CONFIG_UBIFS_FS=y
++# CONFIG_UBIFS_FS_XATTR is not set
++# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
++CONFIG_UBIFS_FS_LZO=y
++CONFIG_UBIFS_FS_ZLIB=y
++# CONFIG_UBIFS_FS_DEBUG is not set
++# CONFIG_LOGFS is not set
++CONFIG_CRAMFS=y
++# CONFIG_SQUASHFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_OMFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_ROMFS_FS is not set
++# CONFIG_PSTORE is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++CONFIG_NFS_FS=y
++CONFIG_NFS_V3=y
++# CONFIG_NFS_V3_ACL is not set
++# CONFIG_NFS_V4 is not set
++CONFIG_ROOT_NFS=y
++# CONFIG_NFSD is not set
++CONFIG_LOCKD=y
++CONFIG_LOCKD_V4=y
++CONFIG_NFS_COMMON=y
++CONFIG_SUNRPC=y
++# CONFIG_CEPH_FS is not set
++# CONFIG_CIFS is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++
++#
++# Partition Types
++#
++CONFIG_PARTITION_ADVANCED=y
++# CONFIG_ACORN_PARTITION is not set
++# CONFIG_OSF_PARTITION is not set
++# CONFIG_AMIGA_PARTITION is not set
++# CONFIG_ATARI_PARTITION is not set
++# CONFIG_MAC_PARTITION is not set
++CONFIG_MSDOS_PARTITION=y
++# CONFIG_BSD_DISKLABEL is not set
++# CONFIG_MINIX_SUBPARTITION is not set
++# CONFIG_SOLARIS_X86_PARTITION is not set
++# CONFIG_UNIXWARE_DISKLABEL is not set
++# CONFIG_LDM_PARTITION is not set
++# CONFIG_SGI_PARTITION is not set
++# CONFIG_ULTRIX_PARTITION is not set
++# CONFIG_SUN_PARTITION is not set
++# CONFIG_KARMA_PARTITION is not set
++CONFIG_EFI_PARTITION=y
++# CONFIG_SYSV68_PARTITION is not set
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=y
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++# CONFIG_NLS_CODEPAGE_850 is not set
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++CONFIG_NLS_ASCII=m
++CONFIG_NLS_ISO8859_1=y
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=m
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_FRAME_WARN=1024
++# CONFIG_MAGIC_SYSRQ is not set
++# CONFIG_STRIP_ASM_SYMS is not set
++# CONFIG_UNUSED_SYMBOLS is not set
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++# CONFIG_DEBUG_SECTION_MISMATCH is not set
++# CONFIG_DEBUG_KERNEL is not set
++# CONFIG_HARDLOCKUP_DETECTOR is not set
++# CONFIG_SLUB_DEBUG_ON is not set
++# CONFIG_SLUB_STATS is not set
++# CONFIG_SPARSE_RCU_POINTER is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++# CONFIG_DEBUG_MEMORY_INIT is not set
++CONFIG_RCU_CPU_STALL_TIMEOUT=60
++CONFIG_RCU_CPU_STALL_VERBOSE=y
++# CONFIG_LKDTM is not set
++CONFIG_SYSCTL_SYSCALL_CHECK=y
++CONFIG_HAVE_FUNCTION_TRACER=y
++CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
++CONFIG_HAVE_DYNAMIC_FTRACE=y
++CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
++CONFIG_HAVE_C_RECORDMCOUNT=y
++CONFIG_TRACING_SUPPORT=y
++# CONFIG_FTRACE is not set
++# CONFIG_DYNAMIC_DEBUG is not set
++# CONFIG_DMA_API_DEBUG is not set
++# CONFIG_ATOMIC64_SELFTEST is not set
++# CONFIG_SAMPLES is not set
++CONFIG_HAVE_ARCH_KGDB=y
++# CONFIG_TEST_KSTRTOX is not set
++# CONFIG_STRICT_DEVMEM is not set
++CONFIG_ARM_UNWIND=y
++# CONFIG_DEBUG_USER is not set
++# CONFIG_OC_ETM is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY_DMESG_RESTRICT is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITYFS is not set
++CONFIG_DEFAULT_SECURITY_DAC=y
++CONFIG_DEFAULT_SECURITY=""
++CONFIG_CRYPTO=y
++
++#
++# Crypto core or helper
++#
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_ALGAPI2=y
++CONFIG_CRYPTO_AEAD2=y
++CONFIG_CRYPTO_BLKCIPHER=y
++CONFIG_CRYPTO_BLKCIPHER2=y
++CONFIG_CRYPTO_HASH=y
++CONFIG_CRYPTO_HASH2=y
++CONFIG_CRYPTO_RNG2=y
++CONFIG_CRYPTO_PCOMP2=y
++CONFIG_CRYPTO_MANAGER=y
++CONFIG_CRYPTO_MANAGER2=y
++CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
++# CONFIG_CRYPTO_GF128MUL is not set
++# CONFIG_CRYPTO_NULL is not set
++# CONFIG_CRYPTO_PCRYPT is not set
++CONFIG_CRYPTO_WORKQUEUE=y
++# CONFIG_CRYPTO_CRYPTD is not set
++# CONFIG_CRYPTO_AUTHENC is not set
++CONFIG_CRYPTO_TEST=m
++# CONFIG_CRYPTO_CRYPTODEV is not set
++
++#
++# Authenticated Encryption with Associated Data
++#
++# CONFIG_CRYPTO_CCM is not set
++# CONFIG_CRYPTO_GCM is not set
++# CONFIG_CRYPTO_SEQIV is not set
++
++#
++# Block modes
++#
++CONFIG_CRYPTO_CBC=y
++# CONFIG_CRYPTO_CTR is not set
++# CONFIG_CRYPTO_CTS is not set
++CONFIG_CRYPTO_ECB=y
++# CONFIG_CRYPTO_LRW is not set
++# CONFIG_CRYPTO_PCBC is not set
++# CONFIG_CRYPTO_XTS is not set
++
++#
++# Hash modes
++#
++# CONFIG_CRYPTO_HMAC is not set
++# CONFIG_CRYPTO_XCBC is not set
++# CONFIG_CRYPTO_VMAC is not set
++
++#
++# Digest
++#
++# CONFIG_CRYPTO_CRC32C is not set
++# CONFIG_CRYPTO_GHASH is not set
++# CONFIG_CRYPTO_MD4 is not set
++# CONFIG_CRYPTO_MD5 is not set
++CONFIG_CRYPTO_MICHAEL_MIC=y
++# CONFIG_CRYPTO_RMD128 is not set
++# CONFIG_CRYPTO_RMD160 is not set
++# CONFIG_CRYPTO_RMD256 is not set
++# CONFIG_CRYPTO_RMD320 is not set
++# CONFIG_CRYPTO_SHA1 is not set
++# CONFIG_CRYPTO_SHA256 is not set
++# CONFIG_CRYPTO_SHA512 is not set
++# CONFIG_CRYPTO_TGR192 is not set
++# CONFIG_CRYPTO_WP512 is not set
++
++#
++# Ciphers
++#
++CONFIG_CRYPTO_AES=y
++# CONFIG_CRYPTO_ANUBIS is not set
++CONFIG_CRYPTO_ARC4=y
++# CONFIG_CRYPTO_BLOWFISH is not set
++# CONFIG_CRYPTO_CAMELLIA is not set
++# CONFIG_CRYPTO_CAST5 is not set
++# CONFIG_CRYPTO_CAST6 is not set
++# CONFIG_CRYPTO_DES is not set
++# CONFIG_CRYPTO_FCRYPT is not set
++# CONFIG_CRYPTO_KHAZAD is not set
++# CONFIG_CRYPTO_SALSA20 is not set
++# CONFIG_CRYPTO_SEED is not set
++# CONFIG_CRYPTO_SERPENT is not set
++# CONFIG_CRYPTO_TEA is not set
++# CONFIG_CRYPTO_TWOFISH is not set
++
++#
++# Compression
++#
++CONFIG_CRYPTO_DEFLATE=y
++# CONFIG_CRYPTO_ZLIB is not set
++CONFIG_CRYPTO_LZO=y
++
++#
++# Random Number Generation
++#
++# CONFIG_CRYPTO_ANSI_CPRNG is not set
++# CONFIG_CRYPTO_USER_API_HASH is not set
++# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
++CONFIG_CRYPTO_HW=y
++# CONFIG_BINARY_PRINTF is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_RATIONAL=y
++CONFIG_CRC_CCITT=m
++CONFIG_CRC16=y
++# CONFIG_CRC_T10DIF is not set
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++# CONFIG_LIBCRC32C is not set
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_LZO_COMPRESS=y
++CONFIG_LZO_DECOMPRESS=y
++# CONFIG_XZ_DEC is not set
++# CONFIG_XZ_DEC_BCJ is not set
++CONFIG_DECOMPRESS_GZIP=y
++CONFIG_GENERIC_ALLOCATOR=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
++CONFIG_CPU_RMAP=y
++CONFIG_NLATTR=y
++# CONFIG_AVERAGE is not set
+diff --git a/arch/arm/configs/qmx6_updater_defconfig b/arch/arm/configs/qmx6_updater_defconfig
+new file mode 100644
+index 0000000..0b0c165
+--- /dev/null
++++ b/arch/arm/configs/qmx6_updater_defconfig
+@@ -0,0 +1,2367 @@
++#
++# Automatically generated make config: don't edit
++# Linux/arm 3.0.15 Kernel Configuration
++#
++CONFIG_ARM=y
++CONFIG_HAVE_PWM=y
++CONFIG_SYS_SUPPORTS_APM_EMULATION=y
++CONFIG_HAVE_SCHED_CLOCK=y
++CONFIG_GENERIC_GPIO=y
++# CONFIG_ARCH_USES_GETTIMEOFFSET is not set
++CONFIG_GENERIC_CLOCKEVENTS=y
++CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
++CONFIG_KTIME_SCALAR=y
++CONFIG_HAVE_PROC_CPU=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_GENERIC_LOCKBREAK=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_ARCH_HAS_CPUFREQ=y
++CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_ZONE_DMA=y
++CONFIG_NEED_DMA_MAP_STATE=y
++CONFIG_FIQ=y
++CONFIG_VECTORS_BASE=0xffff0000
++# CONFIG_ARM_PATCH_PHYS_VIRT is not set
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++CONFIG_HAVE_IRQ_WORK=y
++CONFIG_IRQ_WORK=y
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_CROSS_COMPILE=""
++CONFIG_LOCALVERSION=""
++CONFIG_LOCALVERSION_AUTO=y
++CONFIG_HAVE_KERNEL_GZIP=y
++CONFIG_HAVE_KERNEL_LZMA=y
++CONFIG_HAVE_KERNEL_LZO=y
++CONFIG_KERNEL_GZIP=y
++# CONFIG_KERNEL_LZMA is not set
++# CONFIG_KERNEL_LZO is not set
++CONFIG_DEFAULT_HOSTNAME="(none)"
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_FHANDLE is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_AUDIT is not set
++CONFIG_HAVE_GENERIC_HARDIRQS=y
++
++#
++# IRQ subsystem
++#
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_HAVE_SPARSE_IRQ=y
++CONFIG_GENERIC_IRQ_SHOW=y
++# CONFIG_SPARSE_IRQ is not set
++
++#
++# RCU Subsystem
++#
++CONFIG_TREE_PREEMPT_RCU=y
++CONFIG_PREEMPT_RCU=y
++# CONFIG_RCU_TRACE is not set
++CONFIG_RCU_FANOUT=32
++# CONFIG_RCU_FANOUT_EXACT is not set
++# CONFIG_TREE_RCU_TRACE is not set
++# CONFIG_RCU_BOOST is not set
++CONFIG_IKCONFIG=y
++CONFIG_IKCONFIG_PROC=y
++CONFIG_LOG_BUF_SHIFT=14
++# CONFIG_CGROUPS is not set
++# CONFIG_NAMESPACES is not set
++# CONFIG_SCHED_AUTOGROUP is not set
++# CONFIG_SYSFS_DEPRECATED is not set
++# CONFIG_RELAY is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_RD_GZIP=y
++# CONFIG_RD_BZIP2 is not set
++# CONFIG_RD_LZMA is not set
++# CONFIG_RD_XZ is not set
++# CONFIG_RD_LZO is not set
++# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
++CONFIG_SYSCTL=y
++CONFIG_ANON_INODES=y
++CONFIG_EXPERT=y
++CONFIG_UID16=y
++CONFIG_SYSCTL_SYSCALL=y
++CONFIG_KALLSYMS=y
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_TIMERFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_AIO=y
++CONFIG_EMBEDDED=y
++CONFIG_HAVE_PERF_EVENTS=y
++CONFIG_PERF_USE_VMALLOC=y
++
++#
++# Kernel Performance Events And Counters
++#
++CONFIG_PERF_EVENTS=y
++# CONFIG_PERF_COUNTERS is not set
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_SLUB_DEBUG=y
++CONFIG_COMPAT_BRK=y
++# CONFIG_SLAB is not set
++CONFIG_SLUB=y
++# CONFIG_SLOB is not set
++# CONFIG_PROFILING is not set
++CONFIG_HAVE_OPROFILE=y
++# CONFIG_KPROBES is not set
++CONFIG_HAVE_KPROBES=y
++CONFIG_HAVE_KRETPROBES=y
++CONFIG_USE_GENERIC_SMP_HELPERS=y
++CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
++CONFIG_HAVE_CLK=y
++CONFIG_HAVE_DMA_API_DEBUG=y
++CONFIG_HAVE_HW_BREAKPOINT=y
++
++#
++# GCOV-based kernel profiling
++#
++# CONFIG_GCOV_KERNEL is not set
++CONFIG_HAVE_GENERIC_DMA_COHERENT=y
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++CONFIG_BASE_SMALL=0
++CONFIG_MODULES=y
++# CONFIG_MODULE_FORCE_LOAD is not set
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODULE_FORCE_UNLOAD=y
++CONFIG_MODVERSIONS=y
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++CONFIG_STOP_MACHINE=y
++CONFIG_BLOCK=y
++CONFIG_LBDAF=y
++# CONFIG_BLK_DEV_BSG is not set
++# CONFIG_BLK_DEV_INTEGRITY is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_DEADLINE=y
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++# CONFIG_INLINE_SPIN_TRYLOCK is not set
++# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
++# CONFIG_INLINE_SPIN_LOCK is not set
++# CONFIG_INLINE_SPIN_LOCK_BH is not set
++# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
++# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
++# CONFIG_INLINE_SPIN_UNLOCK is not set
++# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
++# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
++# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
++# CONFIG_INLINE_READ_TRYLOCK is not set
++# CONFIG_INLINE_READ_LOCK is not set
++# CONFIG_INLINE_READ_LOCK_BH is not set
++# CONFIG_INLINE_READ_LOCK_IRQ is not set
++# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
++# CONFIG_INLINE_READ_UNLOCK is not set
++# CONFIG_INLINE_READ_UNLOCK_BH is not set
++# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
++# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
++# CONFIG_INLINE_WRITE_TRYLOCK is not set
++# CONFIG_INLINE_WRITE_LOCK is not set
++# CONFIG_INLINE_WRITE_LOCK_BH is not set
++# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
++# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
++# CONFIG_INLINE_WRITE_UNLOCK is not set
++# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
++# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
++# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
++CONFIG_MUTEX_SPIN_ON_OWNER=y
++CONFIG_FREEZER=y
++
++#
++# System Type
++#
++CONFIG_MMU=y
++# CONFIG_ARCH_INTEGRATOR is not set
++# CONFIG_ARCH_REALVIEW is not set
++# CONFIG_ARCH_VERSATILE is not set
++# CONFIG_ARCH_VEXPRESS is not set
++# CONFIG_ARCH_AT91 is not set
++# CONFIG_ARCH_BCMRING is not set
++# CONFIG_ARCH_CLPS711X is not set
++# CONFIG_ARCH_CNS3XXX is not set
++# CONFIG_ARCH_GEMINI is not set
++# CONFIG_ARCH_EBSA110 is not set
++# CONFIG_ARCH_EP93XX is not set
++# CONFIG_ARCH_FOOTBRIDGE is not set
++CONFIG_ARCH_MXC=y
++# CONFIG_ARCH_MXS is not set
++# CONFIG_ARCH_NETX is not set
++# CONFIG_ARCH_H720X is not set
++# CONFIG_ARCH_IOP13XX is not set
++# CONFIG_ARCH_IOP32X is not set
++# CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IXP23XX is not set
++# CONFIG_ARCH_IXP2000 is not set
++# CONFIG_ARCH_IXP4XX is not set
++# CONFIG_ARCH_DOVE is not set
++# CONFIG_ARCH_KIRKWOOD is not set
++# CONFIG_ARCH_LOKI is not set
++# CONFIG_ARCH_LPC32XX is not set
++# CONFIG_ARCH_MV78XX0 is not set
++# CONFIG_ARCH_ORION5X is not set
++# CONFIG_ARCH_MMP is not set
++# CONFIG_ARCH_KS8695 is not set
++# CONFIG_ARCH_W90X900 is not set
++# CONFIG_ARCH_NUC93X is not set
++# CONFIG_ARCH_TEGRA is not set
++# CONFIG_ARCH_PNX4008 is not set
++# CONFIG_ARCH_PXA is not set
++# CONFIG_ARCH_MSM is not set
++# CONFIG_ARCH_SHMOBILE is not set
++# CONFIG_ARCH_RPC is not set
++# CONFIG_ARCH_SA1100 is not set
++# CONFIG_ARCH_S3C2410 is not set
++# CONFIG_ARCH_S3C64XX is not set
++# CONFIG_ARCH_S5P64X0 is not set
++# CONFIG_ARCH_S5PC100 is not set
++# CONFIG_ARCH_S5PV210 is not set
++# CONFIG_ARCH_EXYNOS4 is not set
++# CONFIG_ARCH_SHARK is not set
++# CONFIG_ARCH_TCC_926 is not set
++# CONFIG_ARCH_U300 is not set
++# CONFIG_ARCH_U8500 is not set
++# CONFIG_ARCH_NOMADIK is not set
++# CONFIG_ARCH_DAVINCI is not set
++# CONFIG_ARCH_OMAP is not set
++# CONFIG_PLAT_SPEAR is not set
++# CONFIG_ARCH_VT8500 is not set
++CONFIG_GPIO_PCA953X=y
++CONFIG_IMX_HAVE_PLATFORM_DMA=y
++CONFIG_IMX_HAVE_PLATFORM_MXC_MLB=y
++CONFIG_IMX_HAVE_PLATFORM_FEC=y
++CONFIG_IMX_HAVE_PLATFORM_FLEXCAN=y
++CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC=y
++CONFIG_IMX_HAVE_PLATFORM_GPMI_NFC=y
++CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_SNVS_RTC=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_I2C=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_SSI=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_ESAI=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_UART=y
++CONFIG_IMX_HAVE_PLATFORM_MXC_EHCI=y
++CONFIG_IMX_HAVE_PLATFORM_MXC_PWM=y
++CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX=y
++CONFIG_IMX_HAVE_PLATFORM_SPI_IMX=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_IPUV3=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_VPU=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_DVFS=y
++CONFIG_IMX_HAVE_PLATFORM_AHCI=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_OCOTP=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_VIIM=y
++CONFIG_IMX_HAVE_PLATFORM_PERFMON=y
++CONFIG_IMX_HAVE_PLATFORM_LDB=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_PXP=y
++# CONFIG_IMX_HAVE_PLATFORM_IMX_EPDC is not set
++CONFIG_IMX_HAVE_PLATFORM_IMX_SPDIF=y
++CONFIG_IMX_HAVE_PLATFORM_VIV_GPU=y
++CONFIG_IMX_HAVE_PLATFORM_MXC_HDMI=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_ANATOP_THERMAL=y
++CONFIG_IMX_HAVE_PLATFORM_FSL_OTG=y
++CONFIG_IMX_HAVE_PLATFORM_FSL_USB_WAKEUP=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_PM=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_ASRC=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_DSI=y
++CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_CSI2=y
++
++#
++# Freescale MXC Implementations
++#
++# CONFIG_ARCH_MX1 is not set
++# CONFIG_ARCH_MX2 is not set
++# CONFIG_ARCH_MX25 is not set
++# CONFIG_ARCH_MX3 is not set
++# CONFIG_ARCH_MX503 is not set
++# CONFIG_ARCH_MX51 is not set
++CONFIG_ARCH_MX6=y
++CONFIG_ARCH_MX6Q=y
++CONFIG_FORCE_MAX_ZONEORDER=13
++CONFIG_SOC_IMX6Q=y
++# CONFIG_MACH_MX6Q_ARM2 is not set
++# CONFIG_MACH_MX6Q_SABRELITE is not set
++# CONFIG_MACH_MX6Q_SABRESD is not set
++# CONFIG_MACH_MX6Q_SABREAUTO is not set
++CONFIG_MACH_MX6Q_QMX6=y
++
++#
++# MX6 Options:
++#
++# CONFIG_IMX_PCIE is not set
++CONFIG_ISP1504_MXC=y
++# CONFIG_MXC_IRQ_PRIOR is not set
++CONFIG_MXC_PWM=y
++# CONFIG_MXC_DEBUG_BOARD is not set
++CONFIG_ARCH_MXC_IOMUX_V3=y
++CONFIG_ARCH_MXC_AUDMUX_V2=y
++CONFIG_IRAM_ALLOC=y
++CONFIG_CLK_DEBUG=y
++CONFIG_DMA_ZONE_SIZE=184
++
++#
++# System MMU
++#
++
++#
++# Processor Type
++#
++CONFIG_CPU_V7=y
++CONFIG_CPU_32v6K=y
++CONFIG_CPU_32v7=y
++CONFIG_CPU_ABRT_EV7=y
++CONFIG_CPU_PABRT_V7=y
++CONFIG_CPU_CACHE_V7=y
++CONFIG_CPU_CACHE_VIPT=y
++CONFIG_CPU_COPY_V6=y
++CONFIG_CPU_TLB_V7=y
++CONFIG_CPU_HAS_ASID=y
++CONFIG_CPU_CP15=y
++CONFIG_CPU_CP15_MMU=y
++
++#
++# Processor Features
++#
++CONFIG_ARM_THUMB=y
++# CONFIG_ARM_THUMBEE is not set
++# CONFIG_SWP_EMULATE is not set
++# CONFIG_CPU_ICACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_DISABLE is not set
++# CONFIG_CPU_BPREDICT_DISABLE is not set
++CONFIG_OUTER_CACHE=y
++CONFIG_OUTER_CACHE_SYNC=y
++CONFIG_CACHE_L2X0=y
++CONFIG_CACHE_PL310=y
++CONFIG_ARM_L1_CACHE_SHIFT=5
++CONFIG_ARM_DMA_MEM_BUFFERABLE=y
++CONFIG_CPU_HAS_PMU=y
++# CONFIG_ARM_ERRATA_430973 is not set
++# CONFIG_ARM_ERRATA_458693 is not set
++# CONFIG_ARM_ERRATA_460075 is not set
++# CONFIG_ARM_ERRATA_742230 is not set
++# CONFIG_ARM_ERRATA_742231 is not set
++# CONFIG_PL310_ERRATA_588369 is not set
++# CONFIG_ARM_ERRATA_720789 is not set
++# CONFIG_PL310_ERRATA_727915 is not set
++CONFIG_ARM_ERRATA_743622=y
++CONFIG_ARM_ERRATA_751472=y
++# CONFIG_ARM_ERRATA_753970 is not set
++CONFIG_ARM_ERRATA_754322=y
++# CONFIG_ARM_ERRATA_754327 is not set
++CONFIG_ARM_GIC=y
++
++#
++# Bus support
++#
++# CONFIG_PCI_SYSCALL is not set
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCCARD is not set
++# CONFIG_ARM_ERRATA_764369 is not set
++# CONFIG_PL310_ERRATA_769419 is not set
++
++#
++# Kernel Features
++#
++CONFIG_TICK_ONESHOT=y
++CONFIG_NO_HZ=y
++CONFIG_HIGH_RES_TIMERS=y
++CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
++CONFIG_SMP=y
++CONFIG_SMP_ON_UP=y
++CONFIG_HAVE_ARM_SCU=y
++CONFIG_HAVE_ARM_TWD=y
++# CONFIG_VMSPLIT_3G is not set
++CONFIG_VMSPLIT_2G=y
++# CONFIG_VMSPLIT_1G is not set
++CONFIG_PAGE_OFFSET=0x80000000
++CONFIG_NR_CPUS=4
++CONFIG_HOTPLUG_CPU=y
++CONFIG_LOCAL_TIMERS=y
++# CONFIG_PREEMPT_NONE is not set
++# CONFIG_PREEMPT_VOLUNTARY is not set
++CONFIG_PREEMPT=y
++CONFIG_HZ=100
++# CONFIG_THUMB2_KERNEL is not set
++CONFIG_AEABI=y
++# CONFIG_OABI_COMPAT is not set
++# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
++# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
++CONFIG_HAVE_ARCH_PFN_VALID=y
++CONFIG_HIGHMEM=y
++# CONFIG_HIGHPTE is not set
++CONFIG_HW_PERF_EVENTS=y
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++CONFIG_HAVE_MEMBLOCK=y
++CONFIG_PAGEFLAGS_EXTENDED=y
++CONFIG_SPLIT_PTLOCK_CPUS=4
++# CONFIG_COMPACTION is not set
++# CONFIG_PHYS_ADDR_T_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=1
++CONFIG_BOUNCE=y
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_KSM is not set
++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
++# CONFIG_CLEANCACHE is not set
++CONFIG_ALIGNMENT_TRAP=y
++# CONFIG_UACCESS_WITH_MEMCPY is not set
++# CONFIG_SECCOMP is not set
++# CONFIG_CC_STACKPROTECTOR is not set
++# CONFIG_DEPRECATED_PARAM_STRUCT is not set
++
++#
++# Boot options
++#
++# CONFIG_USE_OF is not set
++CONFIG_ZBOOT_ROM_TEXT=0x0
++CONFIG_ZBOOT_ROM_BSS=0x0
++CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off"
++CONFIG_CMDLINE_FROM_BOOTLOADER=y
++# CONFIG_CMDLINE_EXTEND is not set
++# CONFIG_CMDLINE_FORCE is not set
++# CONFIG_XIP_KERNEL is not set
++# CONFIG_KEXEC is not set
++# CONFIG_CRASH_DUMP is not set
++# CONFIG_AUTO_ZRELADDR is not set
++
++#
++# CPU Power Management
++#
++
++#
++# CPU Frequency scaling
++#
++CONFIG_CPU_FREQ=y
++CONFIG_CPU_FREQ_TABLE=y
++CONFIG_CPU_FREQ_STAT=y
++# CONFIG_CPU_FREQ_STAT_DETAILS is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
++CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
++# CONFIG_CPU_FREQ_GOV_PERFORMANCE is not set
++CONFIG_CPU_FREQ_GOV_POWERSAVE=y
++CONFIG_CPU_FREQ_GOV_USERSPACE=y
++# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
++CONFIG_CPU_FREQ_IMX=y
++# CONFIG_CPU_IDLE is not set
++
++#
++# Floating point emulation
++#
++
++#
++# At least one emulation must be selected
++#
++CONFIG_VFP=y
++CONFIG_VFPv3=y
++CONFIG_NEON=y
++
++#
++# Userspace binary formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
++CONFIG_HAVE_AOUT=y
++# CONFIG_BINFMT_AOUT is not set
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Power management options
++#
++CONFIG_SUSPEND=y
++# CONFIG_PM_TEST_SUSPEND is not set
++CONFIG_SUSPEND_DEVICE_TIME_DEBUG=y
++CONFIG_SUSPEND_FREEZER=y
++CONFIG_PM_SLEEP=y
++CONFIG_PM_SLEEP_SMP=y
++CONFIG_PM_RUNTIME=y
++CONFIG_PM=y
++CONFIG_PM_DEBUG=y
++# CONFIG_PM_ADVANCED_DEBUG is not set
++CONFIG_CAN_PM_TRACE=y
++CONFIG_APM_EMULATION=y
++CONFIG_PM_RUNTIME_CLK=y
++CONFIG_ARCH_SUSPEND_POSSIBLE=y
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_UNIX=y
++CONFIG_XFRM=y
++# CONFIG_XFRM_USER is not set
++# CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_XFRM_MIGRATE is not set
++# CONFIG_XFRM_STATISTICS is not set
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_PNP=y
++CONFIG_IP_PNP_DHCP=y
++CONFIG_IP_PNP_BOOTP=y
++# CONFIG_IP_PNP_RARP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE_DEMUX is not set
++# CONFIG_IP_MROUTE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++CONFIG_INET_XFRM_MODE_TRANSPORT=y
++CONFIG_INET_XFRM_MODE_TUNNEL=y
++CONFIG_INET_XFRM_MODE_BEET=y
++# CONFIG_INET_LRO is not set
++CONFIG_INET_DIAG=y
++CONFIG_INET_TCP_DIAG=y
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_RDS is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_L2TP is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_NET_DSA is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_PHONET is not set
++# CONFIG_IEEE802154 is not set
++# CONFIG_NET_SCHED is not set
++# CONFIG_DCB is not set
++# CONFIG_BATMAN_ADV is not set
++CONFIG_RPS=y
++CONFIG_RFS_ACCEL=y
++CONFIG_XPS=y
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++CONFIG_CAN=y
++CONFIG_CAN_RAW=y
++CONFIG_CAN_BCM=y
++
++#
++# CAN Device Drivers
++#
++CONFIG_CAN_VCAN=y
++# CONFIG_CAN_SLCAN is not set
++# CONFIG_CAN_DEV is not set
++CONFIG_HAVE_CAN_FLEXCAN=y
++CONFIG_CAN_DEBUG_DEVICES=y
++# CONFIG_IRDA is not set
++CONFIG_BT=y
++CONFIG_BT_L2CAP=y
++CONFIG_BT_SCO=y
++CONFIG_BT_RFCOMM=y
++CONFIG_BT_RFCOMM_TTY=y
++CONFIG_BT_BNEP=y
++CONFIG_BT_BNEP_MC_FILTER=y
++CONFIG_BT_BNEP_PROTO_FILTER=y
++CONFIG_BT_HIDP=y
++
++#
++# Bluetooth device drivers
++#
++CONFIG_BT_HCIBTUSB=y
++# CONFIG_BT_HCIBTSDIO is not set
++# CONFIG_BT_HCIUART is not set
++# CONFIG_BT_HCIBCM203X is not set
++# CONFIG_BT_HCIBPA10X is not set
++# CONFIG_BT_HCIBFUSB is not set
++CONFIG_BT_HCIVHCI=y
++# CONFIG_BT_MRVL is not set
++# CONFIG_BT_ATH3K is not set
++# CONFIG_AF_RXRPC is not set
++CONFIG_WIRELESS=y
++# CONFIG_CFG80211 is not set
++# CONFIG_LIB80211 is not set
++
++#
++# CFG80211 needs to be enabled for MAC80211
++#
++# CONFIG_WIMAX is not set
++CONFIG_RFKILL=y
++CONFIG_RFKILL_INPUT=y
++# CONFIG_RFKILL_REGULATOR is not set
++# CONFIG_RFKILL_GPIO is not set
++# CONFIG_NET_9P is not set
++# CONFIG_CAIF is not set
++# CONFIG_CEPH_LIB is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++# CONFIG_DEVTMPFS is not set
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++CONFIG_FW_LOADER=y
++CONFIG_FIRMWARE_IN_KERNEL=y
++CONFIG_EXTRA_FIRMWARE=""
++# CONFIG_SYS_HYPERVISOR is not set
++CONFIG_CONNECTOR=y
++CONFIG_PROC_EVENTS=y
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_TESTS is not set
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++# CONFIG_MTD_AFS_PARTS is not set
++# CONFIG_MTD_AR7_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_SM_FTL is not set
++# CONFIG_MTD_OOPS is not set
++# CONFIG_MTD_SWAP is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++# CONFIG_MTD_CFI is not set
++# CONFIG_MTD_JEDECPROBE is not set
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_DATAFLASH is not set
++CONFIG_MTD_M25P80=y
++CONFIG_M25PXX_USE_FAST_READ=y
++# CONFIG_MTD_SST25L is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++CONFIG_MTD_NAND_ECC=y
++# CONFIG_MTD_NAND_ECC_SMC is not set
++CONFIG_MTD_NAND=y
++# CONFIG_MTD_NAND_VERIFY_WRITE is not set
++# CONFIG_MTD_NAND_ECC_BCH is not set
++# CONFIG_MTD_SM_COMMON is not set
++# CONFIG_MTD_NAND_MUSEUM_IDS is not set
++# CONFIG_MTD_NAND_GPIO is not set
++CONFIG_MTD_NAND_IDS=y
++# CONFIG_MTD_NAND_DISKONCHIP is not set
++# CONFIG_MTD_NAND_NANDSIM is not set
++# CONFIG_MTD_NAND_GPMI_NAND is not set
++# CONFIG_MTD_NAND_PLATFORM is not set
++# CONFIG_MTD_ALAUDA is not set
++# CONFIG_MTD_ONENAND is not set
++
++#
++# LPDDR flash memory drivers
++#
++# CONFIG_MTD_LPDDR is not set
++CONFIG_MTD_UBI=y
++CONFIG_MTD_UBI_WL_THRESHOLD=4096
++CONFIG_MTD_UBI_BEB_RESERVE=1
++# CONFIG_MTD_UBI_GLUEBI is not set
++# CONFIG_MTD_UBI_DEBUG is not set
++# CONFIG_PARPORT is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=y
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++# CONFIG_BLK_DEV_DRBD is not set
++# CONFIG_BLK_DEV_NBD is not set
++# CONFIG_BLK_DEV_UB is not set
++# CONFIG_BLK_DEV_RAM is not set
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++# CONFIG_MG_DISK is not set
++# CONFIG_BLK_DEV_RBD is not set
++# CONFIG_SENSORS_LIS3LV02D is not set
++# CONFIG_MISC_DEVICES is not set
++CONFIG_HAVE_IDE=y
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++CONFIG_SCSI_MOD=y
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=y
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=y
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++# CONFIG_BLK_DEV_SR is not set
++# CONFIG_CHR_DEV_SG is not set
++# CONFIG_CHR_DEV_SCH is not set
++CONFIG_SCSI_MULTI_LUN=y
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_ISCSI_BOOT_SYSFS is not set
++# CONFIG_LIBFC is not set
++# CONFIG_LIBFCOE is not set
++# CONFIG_SCSI_DEBUG is not set
++# CONFIG_SCSI_DH is not set
++# CONFIG_SCSI_OSD_INITIATOR is not set
++CONFIG_ATA=m
++# CONFIG_ATA_NONSTANDARD is not set
++CONFIG_ATA_VERBOSE_ERROR=y
++# CONFIG_SATA_PMP is not set
++
++#
++# Controllers with non-SFF native interface
++#
++CONFIG_SATA_AHCI_PLATFORM=m
++CONFIG_ATA_SFF=y
++
++#
++# SFF controllers with custom DMA interface
++#
++CONFIG_ATA_BMDMA=y
++
++#
++# SATA SFF controllers with BMDMA
++#
++# CONFIG_SATA_MV is not set
++
++#
++# PATA SFF controllers with BMDMA
++#
++# CONFIG_PATA_ARASAN_CF is not set
++
++#
++# PIO-only SFF controllers
++#
++# CONFIG_PATA_PLATFORM is not set
++
++#
++# Generic fallback / legacy drivers
++#
++# CONFIG_MD is not set
++# CONFIG_TARGET_CORE is not set
++CONFIG_NETDEVICES=y
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++# CONFIG_TUN is not set
++# CONFIG_VETH is not set
++CONFIG_MII=y
++CONFIG_PHYLIB=y
++
++#
++# MII PHY device drivers
++#
++# CONFIG_MARVELL_PHY is not set
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_REALTEK_PHY is not set
++# CONFIG_NATIONAL_PHY is not set
++# CONFIG_STE10XP is not set
++# CONFIG_LSI_ET1011C_PHY is not set
++CONFIG_MICREL_PHY=y
++# CONFIG_FIXED_PHY is not set
++# CONFIG_MDIO_BITBANG is not set
++CONFIG_NET_ETHERNET=y
++# CONFIG_AX88796 is not set
++# CONFIG_SMC91X is not set
++# CONFIG_DM9000 is not set
++# CONFIG_ENC28J60 is not set
++# CONFIG_ETHOC is not set
++# CONFIG_SMC911X is not set
++CONFIG_SMSC911X=y
++# CONFIG_SMSC911X_ARCH_HOOKS is not set
++# CONFIG_DNET is not set
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
++# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
++# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
++# CONFIG_B44 is not set
++# CONFIG_KS8842 is not set
++# CONFIG_KS8851 is not set
++# CONFIG_KS8851_MLL is not set
++CONFIG_FEC=y
++# CONFIG_FEC_1588 is not set
++# CONFIG_FTMAC100 is not set
++# CONFIG_NETDEV_1000 is not set
++# CONFIG_NETDEV_10000 is not set
++CONFIG_WLAN=y
++# CONFIG_USB_ZD1201 is not set
++# CONFIG_HOSTAP is not set
++
++#
++# Enable WiMAX (Networking options) to see the WiMAX drivers
++#
++
++#
++# USB Network Adapters
++#
++# CONFIG_USB_CATC is not set
++# CONFIG_USB_KAWETH is not set
++# CONFIG_USB_PEGASUS is not set
++# CONFIG_USB_RTL8150 is not set
++# CONFIG_USB_USBNET is not set
++# CONFIG_USB_HSO is not set
++# CONFIG_USB_IPHETH is not set
++# CONFIG_WAN is not set
++
++#
++# CAIF transport drivers
++#
++# CONFIG_PPP is not set
++# CONFIG_SLIP is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++CONFIG_INPUT_POLLDEV=y
++# CONFIG_INPUT_SPARSEKMAP is not set
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=y
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++CONFIG_INPUT_EVDEV=y
++# CONFIG_INPUT_EVBUG is not set
++# CONFIG_INPUT_APMPOWER is not set
++
++#
++# Input Device Drivers
++#
++# CONFIG_INPUT_KEYBOARD is not set
++# CONFIG_INPUT_MOUSE is not set
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++CONFIG_INPUT_TOUCHSCREEN=y
++# CONFIG_TOUCHSCREEN_ADS7846 is not set
++# CONFIG_TOUCHSCREEN_AD7877 is not set
++# CONFIG_TOUCHSCREEN_AD7879 is not set
++# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
++# CONFIG_TOUCHSCREEN_BU21013 is not set
++# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
++# CONFIG_TOUCHSCREEN_DYNAPRO is not set
++# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
++# CONFIG_TOUCHSCREEN_EETI is not set
++CONFIG_TOUCHSCREEN_EGALAX=y
++# CONFIG_TOUCHSCREEN_FUJITSU is not set
++# CONFIG_TOUCHSCREEN_GUNZE is not set
++# CONFIG_TOUCHSCREEN_ELO is not set
++# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
++# CONFIG_TOUCHSCREEN_MAX11801 is not set
++# CONFIG_TOUCHSCREEN_MCS5000 is not set
++# CONFIG_TOUCHSCREEN_MTOUCH is not set
++# CONFIG_TOUCHSCREEN_INEXIO is not set
++# CONFIG_TOUCHSCREEN_MK712 is not set
++# CONFIG_TOUCHSCREEN_PENMOUNT is not set
++# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
++# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
++# CONFIG_TOUCHSCREEN_WM97XX is not set
++# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
++# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
++# CONFIG_TOUCHSCREEN_TSC2005 is not set
++# CONFIG_TOUCHSCREEN_TSC2007 is not set
++# CONFIG_TOUCHSCREEN_W90X900 is not set
++# CONFIG_TOUCHSCREEN_ST1232 is not set
++# CONFIG_TOUCHSCREEN_P1003 is not set
++# CONFIG_TOUCHSCREEN_TPS6507X is not set
++CONFIG_INPUT_MISC=y
++# CONFIG_INPUT_AD714X is not set
++# CONFIG_INPUT_ATI_REMOTE is not set
++# CONFIG_INPUT_ATI_REMOTE2 is not set
++# CONFIG_INPUT_KEYSPAN_REMOTE is not set
++# CONFIG_INPUT_POWERMATE is not set
++# CONFIG_INPUT_YEALINK is not set
++# CONFIG_INPUT_CM109 is not set
++CONFIG_INPUT_UINPUT=y
++# CONFIG_INPUT_PCF8574 is not set
++# CONFIG_INPUT_PWM_BEEPER is not set
++# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
++# CONFIG_INPUT_ADXL34X is not set
++# CONFIG_INPUT_CMA3000 is not set
++# CONFIG_INPUT_ISL29023 is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_CONSOLE_TRANSLATIONS=y
++CONFIG_VT_CONSOLE=y
++CONFIG_HW_CONSOLE=y
++# CONFIG_VT_HW_CONSOLE_BINDING is not set
++CONFIG_UNIX98_PTYS=y
++# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
++CONFIG_LEGACY_PTYS=y
++CONFIG_LEGACY_PTY_COUNT=256
++# CONFIG_SERIAL_NONSTANDARD is not set
++# CONFIG_N_GSM is not set
++# CONFIG_TRACE_SINK is not set
++CONFIG_DEVKMEM=y
++
++#
++# Serial drivers
++#
++# CONFIG_SERIAL_8250 is not set
++
++#
++# Non-8250 serial port support
++#
++# CONFIG_SERIAL_MAX3100 is not set
++# CONFIG_SERIAL_MAX3107 is not set
++CONFIG_SERIAL_IMX=y
++CONFIG_SERIAL_IMX_CONSOLE=y
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_TIMBERDALE is not set
++# CONFIG_SERIAL_ALTERA_JTAGUART is not set
++# CONFIG_SERIAL_ALTERA_UART is not set
++# CONFIG_SERIAL_IFX6X60 is not set
++# CONFIG_SERIAL_XILINX_PS_UART is not set
++# CONFIG_TTY_PRINTK is not set
++CONFIG_FSL_OTP=y
++# CONFIG_HVC_DCC is not set
++# CONFIG_IPMI_HANDLER is not set
++CONFIG_HW_RANDOM=y
++# CONFIG_HW_RANDOM_TIMERIOMEM is not set
++# CONFIG_R3964 is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++# CONFIG_RAMOOPS is not set
++CONFIG_MXS_VIIM=y
++CONFIG_I2C=y
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_COMPAT=y
++CONFIG_I2C_CHARDEV=y
++# CONFIG_I2C_MUX is not set
++CONFIG_I2C_HELPER_AUTO=y
++
++#
++# I2C Hardware Bus support
++#
++
++#
++# I2C system bus drivers (mostly embedded / system-on-chip)
++#
++# CONFIG_I2C_DESIGNWARE is not set
++# CONFIG_I2C_GPIO is not set
++CONFIG_I2C_IMX=y
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_PCA_PLATFORM is not set
++# CONFIG_I2C_PXA_PCI is not set
++# CONFIG_I2C_SIMTEC is not set
++# CONFIG_I2C_XILINX is not set
++
++#
++# External I2C/SMBus adapter drivers
++#
++# CONFIG_I2C_DIOLAN_U2C is not set
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_TINY_USB is not set
++
++#
++# Other I2C/SMBus bus drivers
++#
++# CONFIG_I2C_STUB is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++CONFIG_SPI=y
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++# CONFIG_SPI_ALTERA is not set
++CONFIG_SPI_BITBANG=y
++# CONFIG_SPI_GPIO is not set
++CONFIG_SPI_IMX_VER_2_3=y
++CONFIG_SPI_IMX=y
++# CONFIG_SPI_OC_TINY is not set
++# CONFIG_SPI_PXA2XX_PCI is not set
++# CONFIG_SPI_XILINX is not set
++# CONFIG_SPI_DESIGNWARE is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++
++#
++# PPS support
++#
++# CONFIG_PPS is not set
++
++#
++# PPS generators support
++#
++
++#
++# PTP clock support
++#
++
++#
++# Enable Device Drivers -> PPS to see the PTP clock options.
++#
++CONFIG_ARCH_REQUIRE_GPIOLIB=y
++CONFIG_GPIOLIB=y
++# CONFIG_GPIO_SYSFS is not set
++
++#
++# Memory mapped GPIO drivers:
++#
++# CONFIG_GPIO_BASIC_MMIO is not set
++# CONFIG_GPIO_IT8761E is not set
++
++#
++# I2C GPIO expanders:
++#
++# CONFIG_GPIO_MAX7300 is not set
++# CONFIG_GPIO_MAX732X is not set
++# CONFIG_GPIO_PCA953X_IRQ is not set
++# CONFIG_GPIO_PCF857X is not set
++# CONFIG_GPIO_SX150X is not set
++# CONFIG_GPIO_ADP5588 is not set
++
++#
++# PCI GPIO expanders:
++#
++
++#
++# SPI GPIO expanders:
++#
++# CONFIG_GPIO_MAX7301 is not set
++# CONFIG_GPIO_MCP23S08 is not set
++# CONFIG_GPIO_MC33880 is not set
++# CONFIG_GPIO_74X164 is not set
++
++#
++# AC97 GPIO expanders:
++#
++
++#
++# MODULbus GPIO expanders:
++#
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++CONFIG_THERMAL=y
++CONFIG_WATCHDOG=y
++CONFIG_WATCHDOG_NOWAYOUT=y
++
++#
++# Watchdog Device Drivers
++#
++# CONFIG_SOFT_WATCHDOG is not set
++# CONFIG_MAX63XX_WATCHDOG is not set
++CONFIG_IMX2_WDT=y
++
++#
++# USB-based Watchdog Cards
++#
++# CONFIG_USBPCWATCHDOG is not set
++CONFIG_SSB_POSSIBLE=y
++
++#
++# Sonics Silicon Backplane
++#
++# CONFIG_SSB is not set
++CONFIG_BCMA_POSSIBLE=y
++
++#
++# Broadcom specific AMBA
++#
++# CONFIG_BCMA is not set
++CONFIG_MFD_SUPPORT=y
++CONFIG_MFD_CORE=y
++# CONFIG_MFD_88PM860X is not set
++# CONFIG_MFD_SM501 is not set
++# CONFIG_MFD_ASIC3 is not set
++# CONFIG_HTC_EGPIO is not set
++# CONFIG_HTC_PASIC3 is not set
++# CONFIG_HTC_I2CPLD is not set
++# CONFIG_UCB1400_CORE is not set
++# CONFIG_TPS6105X is not set
++# CONFIG_TPS65010 is not set
++# CONFIG_TPS6507X is not set
++# CONFIG_MFD_TPS6586X is not set
++# CONFIG_TWL4030_CORE is not set
++# CONFIG_MFD_STMPE is not set
++# CONFIG_MFD_TC3589X is not set
++# CONFIG_MFD_TMIO is not set
++# CONFIG_MFD_T7L66XB is not set
++# CONFIG_MFD_TC6387XB is not set
++# CONFIG_MFD_TC6393XB is not set
++# CONFIG_PMIC_DA903X is not set
++# CONFIG_PMIC_ADP5520 is not set
++# CONFIG_MFD_MAX8925 is not set
++# CONFIG_MFD_MAX8997 is not set
++# CONFIG_MFD_MAX8998 is not set
++# CONFIG_MFD_WM8400 is not set
++# CONFIG_MFD_WM831X_I2C is not set
++# CONFIG_MFD_WM831X_SPI is not set
++# CONFIG_MFD_WM8350_I2C is not set
++# CONFIG_MFD_WM8994 is not set
++# CONFIG_MFD_PCF50633 is not set
++# CONFIG_PMIC_DIALOG is not set
++# CONFIG_MFD_MC_PMIC is not set
++# CONFIG_MFD_MC34708 is not set
++CONFIG_MFD_PFUZE=y
++# CONFIG_MFD_MC13XXX is not set
++# CONFIG_ABX500_CORE is not set
++# CONFIG_EZX_PCAP is not set
++# CONFIG_MFD_WL1273_CORE is not set
++# CONFIG_MFD_TPS65910 is not set
++# CONFIG_MFD_MAX17135 is not set
++CONFIG_MFD_MXC_HDMI=y
++CONFIG_REGULATOR=y
++# CONFIG_REGULATOR_DEBUG is not set
++# CONFIG_REGULATOR_DUMMY is not set
++CONFIG_REGULATOR_FIXED_VOLTAGE=y
++# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
++# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
++# CONFIG_REGULATOR_BQ24022 is not set
++# CONFIG_REGULATOR_MAX1586 is not set
++# CONFIG_REGULATOR_MAX8649 is not set
++# CONFIG_REGULATOR_MAX8660 is not set
++# CONFIG_REGULATOR_MAX8952 is not set
++# CONFIG_REGULATOR_LP3971 is not set
++# CONFIG_REGULATOR_LP3972 is not set
++# CONFIG_REGULATOR_MC34708 is not set
++CONFIG_REGULATOR_PFUZE100=y
++# CONFIG_REGULATOR_TPS65023 is not set
++# CONFIG_REGULATOR_TPS6507X is not set
++# CONFIG_REGULATOR_ISL6271A is not set
++# CONFIG_REGULATOR_AD5398 is not set
++CONFIG_REGULATOR_ANATOP=y
++# CONFIG_REGULATOR_TPS6524X is not set
++# CONFIG_REGULATOR_MAX17135 is not set
++CONFIG_MEDIA_SUPPORT=y
++
++#
++# Multimedia core support
++#
++# CONFIG_MEDIA_CONTROLLER is not set
++CONFIG_VIDEO_DEV=y
++CONFIG_VIDEO_V4L2_COMMON=y
++# CONFIG_DVB_CORE is not set
++CONFIG_VIDEO_MEDIA=y
++
++#
++# Multimedia drivers
++#
++# CONFIG_RC_CORE is not set
++# CONFIG_MEDIA_ATTACH is not set
++CONFIG_MEDIA_TUNER=y
++# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
++CONFIG_MEDIA_TUNER_SIMPLE=y
++CONFIG_MEDIA_TUNER_TDA8290=y
++CONFIG_MEDIA_TUNER_TDA827X=y
++CONFIG_MEDIA_TUNER_TDA18271=y
++CONFIG_MEDIA_TUNER_TDA9887=y
++CONFIG_MEDIA_TUNER_TEA5761=y
++CONFIG_MEDIA_TUNER_TEA5767=y
++CONFIG_MEDIA_TUNER_MT20XX=y
++CONFIG_MEDIA_TUNER_XC2028=y
++CONFIG_MEDIA_TUNER_XC5000=y
++CONFIG_MEDIA_TUNER_MC44S803=y
++CONFIG_VIDEO_V4L2=y
++CONFIG_VIDEOBUF_GEN=y
++CONFIG_VIDEOBUF_DMA_CONTIG=y
++CONFIG_VIDEO_CAPTURE_DRIVERS=y
++# CONFIG_VIDEO_ADV_DEBUG is not set
++# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
++# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
++
++#
++# Encoders, decoders, sensors and other helper chips
++#
++
++#
++# Audio decoders, processors and mixers
++#
++# CONFIG_VIDEO_TVAUDIO is not set
++# CONFIG_VIDEO_TDA7432 is not set
++# CONFIG_VIDEO_TDA9840 is not set
++# CONFIG_VIDEO_TEA6415C is not set
++# CONFIG_VIDEO_TEA6420 is not set
++# CONFIG_VIDEO_MSP3400 is not set
++# CONFIG_VIDEO_CS5345 is not set
++# CONFIG_VIDEO_CS53L32A is not set
++# CONFIG_VIDEO_TLV320AIC23B is not set
++# CONFIG_VIDEO_WM8775 is not set
++# CONFIG_VIDEO_WM8739 is not set
++# CONFIG_VIDEO_VP27SMPX is not set
++
++#
++# RDS decoders
++#
++# CONFIG_VIDEO_SAA6588 is not set
++
++#
++# Video decoders
++#
++# CONFIG_VIDEO_ADV7180 is not set
++# CONFIG_VIDEO_BT819 is not set
++# CONFIG_VIDEO_BT856 is not set
++# CONFIG_VIDEO_BT866 is not set
++# CONFIG_VIDEO_KS0127 is not set
++# CONFIG_VIDEO_SAA7110 is not set
++# CONFIG_VIDEO_SAA711X is not set
++# CONFIG_VIDEO_SAA7191 is not set
++# CONFIG_VIDEO_TVP514X is not set
++# CONFIG_VIDEO_TVP5150 is not set
++# CONFIG_VIDEO_TVP7002 is not set
++# CONFIG_VIDEO_VPX3220 is not set
++
++#
++# Video and audio decoders
++#
++# CONFIG_VIDEO_SAA717X is not set
++# CONFIG_VIDEO_CX25840 is not set
++
++#
++# MPEG video encoders
++#
++# CONFIG_VIDEO_CX2341X is not set
++
++#
++# Video encoders
++#
++# CONFIG_VIDEO_SAA7127 is not set
++# CONFIG_VIDEO_SAA7185 is not set
++# CONFIG_VIDEO_ADV7170 is not set
++# CONFIG_VIDEO_ADV7175 is not set
++# CONFIG_VIDEO_ADV7343 is not set
++# CONFIG_VIDEO_AK881X is not set
++
++#
++# Camera sensor devices
++#
++# CONFIG_VIDEO_OV7670 is not set
++# CONFIG_VIDEO_MT9V011 is not set
++# CONFIG_VIDEO_TCM825X is not set
++
++#
++# Video improvement chips
++#
++# CONFIG_VIDEO_UPD64031A is not set
++# CONFIG_VIDEO_UPD64083 is not set
++
++#
++# Miscelaneous helper chips
++#
++# CONFIG_VIDEO_THS7303 is not set
++# CONFIG_VIDEO_M52790 is not set
++# CONFIG_VIDEO_VIVI is not set
++CONFIG_VIDEO_MXC_CAMERA=m
++
++#
++# MXC Camera/V4L2 PRP Features support
++#
++CONFIG_VIDEO_MXC_IPU_CAMERA=y
++# CONFIG_VIDEO_MXC_CSI_CAMERA is not set
++# CONFIG_MXC_CAMERA_MICRON111 is not set
++# CONFIG_MXC_CAMERA_OV2640 is not set
++CONFIG_MXC_CAMERA_OV3640=m
++CONFIG_MXC_CAMERA_OV5640=m
++# CONFIG_MXC_CAMERA_OV5640_MIPI is not set
++# CONFIG_MXC_CAMERA_OV8820_MIPI is not set
++CONFIG_MXC_CAMERA_OV5642=m
++# CONFIG_MXC_TVIN_ADV7180 is not set
++CONFIG_MXC_CAMERA_SENSOR_CLK=m
++CONFIG_MXC_IPU_PRP_VF_SDC=m
++CONFIG_MXC_IPU_PRP_ENC=m
++CONFIG_MXC_IPU_CSI_ENC=m
++CONFIG_VIDEO_MXC_OUTPUT=y
++CONFIG_VIDEO_MXC_IPU_OUTPUT=y
++# CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT is not set
++# CONFIG_VIDEO_MXC_OPL is not set
++# CONFIG_VIDEO_CPIA2 is not set
++# CONFIG_VIDEO_TIMBERDALE is not set
++# CONFIG_VIDEO_SR030PC30 is not set
++# CONFIG_VIDEO_NOON010PC30 is not set
++# CONFIG_SOC_CAMERA is not set
++# CONFIG_V4L_USB_DRIVERS is not set
++# CONFIG_V4L_MEM2MEM_DRIVERS is not set
++# CONFIG_RADIO_ADAPTERS is not set
++
++#
++# Graphics support
++#
++# CONFIG_DRM is not set
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++# CONFIG_FB_BOOT_VESA_SUPPORT is not set
++CONFIG_FB_CFB_FILLRECT=y
++CONFIG_FB_CFB_COPYAREA=y
++CONFIG_FB_CFB_IMAGEBLIT=y
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_FOREIGN_ENDIAN is not set
++# CONFIG_FB_SYS_FOPS is not set
++# CONFIG_FB_WMT_GE_ROPS is not set
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++CONFIG_FB_MODE_HELPERS=y
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_UVESA is not set
++# CONFIG_FB_S1D13XXX is not set
++# CONFIG_FB_TMIO is not set
++# CONFIG_FB_UDL is not set
++# CONFIG_FB_VIRTUAL is not set
++# CONFIG_FB_METRONOME is not set
++# CONFIG_FB_BROADSHEET is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++CONFIG_FB_MXC=y
++CONFIG_FB_MXC_EDID=y
++CONFIG_FB_MXC_SYNC_PANEL=y
++# CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL is not set
++CONFIG_FB_MXC_LDB=y
++# CONFIG_FB_MXC_MIPI_DSI is not set
++# CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set
++# CONFIG_FB_MXC_SEIKO_WVGA_SYNC_PANEL is not set
++# CONFIG_FB_MXC_SII902X is not set
++# CONFIG_FB_MXC_CH7026 is not set
++# CONFIG_FB_MXC_TVOUT_CH7024 is not set
++# CONFIG_FB_MXC_ASYNC_PANEL is not set
++# CONFIG_FB_MXC_EINK_PANEL is not set
++# CONFIG_FB_MXC_ELCDIF_FB is not set
++CONFIG_FB_MXC_HDMI=y
++
++#
++# Console display driver support
++#
++CONFIG_DUMMY_CONSOLE=y
++CONFIG_FRAMEBUFFER_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
++# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
++CONFIG_FONTS=y
++# CONFIG_FONT_8x8 is not set
++CONFIG_FONT_8x16=y
++# CONFIG_FONT_6x11 is not set
++# CONFIG_FONT_7x14 is not set
++# CONFIG_FONT_PEARL_8x8 is not set
++# CONFIG_FONT_ACORN_8x8 is not set
++# CONFIG_FONT_MINI_4x6 is not set
++# CONFIG_FONT_SUN8x16 is not set
++# CONFIG_FONT_SUN12x22 is not set
++# CONFIG_FONT_10x18 is not set
++CONFIG_LOGO=y
++CONFIG_LOGO_LINUX_MONO=y
++CONFIG_LOGO_LINUX_VGA16=y
++CONFIG_LOGO_LINUX_CLUT224=y
++CONFIG_SOUND=y
++# CONFIG_SOUND_OSS_CORE is not set
++CONFIG_SND=y
++CONFIG_SND_TIMER=y
++CONFIG_SND_PCM=y
++CONFIG_SND_JACK=y
++# CONFIG_SND_SEQUENCER is not set
++# CONFIG_SND_MIXER_OSS is not set
++# CONFIG_SND_PCM_OSS is not set
++# CONFIG_SND_HRTIMER is not set
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++# CONFIG_SND_RAWMIDI_SEQ is not set
++# CONFIG_SND_OPL3_LIB_SEQ is not set
++# CONFIG_SND_OPL4_LIB_SEQ is not set
++# CONFIG_SND_SBAWE_SEQ is not set
++# CONFIG_SND_EMU10K1_SEQ is not set
++CONFIG_SND_DRIVERS=y
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_ALOOP is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++CONFIG_SND_ARM=y
++CONFIG_SND_SPI=y
++CONFIG_SND_USB=y
++# CONFIG_SND_USB_AUDIO is not set
++# CONFIG_SND_USB_UA101 is not set
++# CONFIG_SND_USB_CAIAQ is not set
++# CONFIG_SND_USB_6FIRE is not set
++CONFIG_SND_SOC=y
++# CONFIG_SND_SOC_CACHE_LZO is not set
++CONFIG_SND_SOC_AC97_BUS=y
++CONFIG_SND_IMX_SOC=y
++CONFIG_SND_MXC_SOC_MX2=y
++# CONFIG_SND_SOC_IMX_SGTL5000 is not set
++CONFIG_SND_SOC_IMX_CS42888=y
++# CONFIG_SND_SOC_IMX_SPDIF is not set
++# CONFIG_SND_SOC_IMX_HDMI is not set
++CONFIG_SND_SOC_I2C_AND_SPI=y
++# CONFIG_SND_SOC_ALL_CODECS is not set
++CONFIG_SND_SOC_CS42888=y
++# CONFIG_SOUND_PRIME is not set
++CONFIG_AC97_BUS=y
++CONFIG_HID_SUPPORT=y
++CONFIG_HID=y
++# CONFIG_HIDRAW is not set
++
++#
++# USB Input Devices
++#
++CONFIG_USB_HID=y
++# CONFIG_HID_PID is not set
++# CONFIG_USB_HIDDEV is not set
++
++#
++# Special HID drivers
++#
++CONFIG_HID_A4TECH=m
++# CONFIG_HID_ACRUX is not set
++CONFIG_HID_APPLE=m
++CONFIG_HID_BELKIN=m
++CONFIG_HID_CHERRY=m
++CONFIG_HID_CHICONY=m
++# CONFIG_HID_PRODIKEYS is not set
++CONFIG_HID_CYPRESS=m
++# CONFIG_HID_DRAGONRISE is not set
++# CONFIG_HID_EMS_FF is not set
++# CONFIG_HID_ELECOM is not set
++CONFIG_HID_EZKEY=m
++# CONFIG_HID_KEYTOUCH is not set
++# CONFIG_HID_KYE is not set
++# CONFIG_HID_UCLOGIC is not set
++# CONFIG_HID_WALTOP is not set
++CONFIG_HID_GYRATION=m
++# CONFIG_HID_TWINHAN is not set
++# CONFIG_HID_KENSINGTON is not set
++# CONFIG_HID_LCPOWER is not set
++CONFIG_HID_LOGITECH=m
++# CONFIG_LOGITECH_FF is not set
++# CONFIG_LOGIRUMBLEPAD2_FF is not set
++# CONFIG_LOGIG940_FF is not set
++# CONFIG_LOGIWII_FF is not set
++# CONFIG_HID_MAGICMOUSE is not set
++CONFIG_HID_MICROSOFT=m
++CONFIG_HID_MONTEREY=m
++# CONFIG_HID_MULTITOUCH is not set
++# CONFIG_HID_NTRIG is not set
++# CONFIG_HID_ORTEK is not set
++CONFIG_HID_PANTHERLORD=m
++# CONFIG_PANTHERLORD_FF is not set
++CONFIG_HID_PETALYNX=m
++# CONFIG_HID_PICOLCD is not set
++# CONFIG_HID_QUANTA is not set
++# CONFIG_HID_ROCCAT is not set
++# CONFIG_HID_ROCCAT_ARVO is not set
++# CONFIG_HID_ROCCAT_KONE is not set
++# CONFIG_HID_ROCCAT_KONEPLUS is not set
++# CONFIG_HID_ROCCAT_KOVAPLUS is not set
++# CONFIG_HID_ROCCAT_PYRA is not set
++CONFIG_HID_SAMSUNG=m
++CONFIG_HID_SONY=m
++CONFIG_HID_SUNPLUS=m
++# CONFIG_HID_GREENASIA is not set
++# CONFIG_HID_SMARTJOYPLUS is not set
++# CONFIG_HID_TOPSEED is not set
++# CONFIG_HID_THRUSTMASTER is not set
++# CONFIG_HID_WACOM is not set
++# CONFIG_HID_ZEROPLUS is not set
++# CONFIG_HID_ZYDACRON is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++# CONFIG_USB_ARCH_HAS_OHCI is not set
++CONFIG_USB_ARCH_HAS_EHCI=y
++CONFIG_USB=y
++# CONFIG_USB_DEBUG is not set
++# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
++
++#
++# Miscellaneous USB options
++#
++# CONFIG_USB_DEVICEFS is not set
++# CONFIG_USB_DEVICE_CLASS is not set
++# CONFIG_USB_DYNAMIC_MINORS is not set
++CONFIG_USB_SUSPEND=y
++# CONFIG_USB_OTG is not set
++# CONFIG_USB_OTG_WHITELIST is not set
++# CONFIG_USB_OTG_BLACKLIST_HUB is not set
++# CONFIG_USB_MON is not set
++# CONFIG_USB_WUSB is not set
++# CONFIG_USB_WUSB_CBAF is not set
++
++#
++# USB Host Controller Drivers
++#
++# CONFIG_USB_C67X00_HCD is not set
++# CONFIG_USB_EHCI_HCD is not set
++# CONFIG_USB_OXU210HP_HCD is not set
++# CONFIG_USB_ISP116X_HCD is not set
++# CONFIG_USB_ISP1760_HCD is not set
++# CONFIG_USB_ISP1362_HCD is not set
++# CONFIG_USB_SL811_HCD is not set
++# CONFIG_USB_R8A66597_HCD is not set
++# CONFIG_USB_HWA_HCD is not set
++# CONFIG_USB_MUSB_HDRC is not set
++
++#
++# USB Device Class drivers
++#
++# CONFIG_USB_ACM is not set
++# CONFIG_USB_PRINTER is not set
++# CONFIG_USB_WDM is not set
++# CONFIG_USB_TMC is not set
++
++#
++# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
++#
++
++#
++# also be needed; see USB_STORAGE Help for more info
++#
++CONFIG_USB_STORAGE=y
++# CONFIG_USB_STORAGE_DEBUG is not set
++# CONFIG_USB_STORAGE_REALTEK is not set
++# CONFIG_USB_STORAGE_DATAFAB is not set
++# CONFIG_USB_STORAGE_FREECOM is not set
++# CONFIG_USB_STORAGE_ISD200 is not set
++# CONFIG_USB_STORAGE_USBAT is not set
++# CONFIG_USB_STORAGE_SDDR09 is not set
++# CONFIG_USB_STORAGE_SDDR55 is not set
++# CONFIG_USB_STORAGE_JUMPSHOT is not set
++# CONFIG_USB_STORAGE_ALAUDA is not set
++# CONFIG_USB_STORAGE_ONETOUCH is not set
++# CONFIG_USB_STORAGE_KARMA is not set
++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
++# CONFIG_USB_STORAGE_ENE_UB6250 is not set
++# CONFIG_USB_UAS is not set
++# CONFIG_USB_LIBUSUAL is not set
++
++#
++# USB Imaging devices
++#
++# CONFIG_USB_MDC800 is not set
++# CONFIG_USB_MICROTEK is not set
++
++#
++# USB port drivers
++#
++# CONFIG_USB_SERIAL is not set
++
++#
++# USB Miscellaneous drivers
++#
++# CONFIG_USB_EMI62 is not set
++# CONFIG_USB_EMI26 is not set
++# CONFIG_USB_ADUTUX is not set
++# CONFIG_USB_SEVSEG is not set
++# CONFIG_USB_RIO500 is not set
++# CONFIG_USB_LEGOTOWER is not set
++# CONFIG_USB_LCD is not set
++# CONFIG_USB_LED is not set
++# CONFIG_USB_CYPRESS_CY7C63 is not set
++# CONFIG_USB_CYTHERM is not set
++# CONFIG_USB_IDMOUSE is not set
++# CONFIG_USB_FTDI_ELAN is not set
++# CONFIG_USB_APPLEDISPLAY is not set
++# CONFIG_USB_LD is not set
++# CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_IOWARRIOR is not set
++# CONFIG_USB_TEST is not set
++# CONFIG_USB_ISIGHTFW is not set
++# CONFIG_USB_YUREX is not set
++CONFIG_USB_GADGET=y
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++# CONFIG_USB_GADGET_DEBUG_FS is not set
++CONFIG_USB_GADGET_VBUS_DRAW=2
++CONFIG_USB_GADGET_SELECTED=y
++CONFIG_USB_GADGET_ARC=y
++CONFIG_USB_ARC=y
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_FUSB300 is not set
++# CONFIG_USB_GADGET_R8A66597 is not set
++# CONFIG_USB_GADGET_PXA_U2O is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++# CONFIG_USB_ZERO is not set
++# CONFIG_USB_AUDIO is not set
++# CONFIG_USB_ETH is not set
++# CONFIG_USB_G_NCM is not set
++# CONFIG_USB_GADGETFS is not set
++# CONFIG_USB_FUNCTIONFS is not set
++CONFIG_USB_FILE_STORAGE=y
++CONFIG_FSL_UTP=y
++# CONFIG_USB_FILE_STORAGE_TEST is not set
++# CONFIG_USB_MASS_STORAGE is not set
++# CONFIG_USB_G_SERIAL is not set
++# CONFIG_USB_MIDI_GADGET is not set
++# CONFIG_USB_G_PRINTER is not set
++# CONFIG_USB_CDC_COMPOSITE is not set
++# CONFIG_USB_G_MULTI is not set
++# CONFIG_USB_G_HID is not set
++# CONFIG_USB_G_DBGP is not set
++# CONFIG_USB_G_WEBCAM is not set
++
++#
++# OTG and related infrastructure
++#
++CONFIG_USB_OTG_UTILS=y
++# CONFIG_USB_GPIO_VBUS is not set
++# CONFIG_USB_ULPI is not set
++# CONFIG_NOP_USB_XCEIV is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++CONFIG_MMC_UNSAFE_RESUME=y
++# CONFIG_MMC_CLKGATE is not set
++
++#
++# MMC/SD/SDIO Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++CONFIG_MMC_BLOCK_MINORS=8
++CONFIG_MMC_BLOCK_BOUNCE=y
++# CONFIG_SDIO_UART is not set
++# CONFIG_MMC_TEST is not set
++
++#
++# MMC/SD/SDIO Host Controller Drivers
++#
++CONFIG_MMC_SDHCI=y
++CONFIG_MMC_SDHCI_IO_ACCESSORS=y
++CONFIG_MMC_SDHCI_PLTFM=y
++CONFIG_MMC_SDHCI_ESDHC_IMX=y
++# CONFIG_MMC_DW is not set
++# CONFIG_MMC_VUB300 is not set
++# CONFIG_MMC_USHC is not set
++# CONFIG_MEMSTICK is not set
++# CONFIG_NEW_LEDS is not set
++# CONFIG_NFC_DEVICES is not set
++# CONFIG_ACCESSIBILITY is not set
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++CONFIG_RTC_INTF_DEV_UIE_EMUL=y
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_DS3232 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_ISL12022 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++# CONFIG_RTC_DRV_BQ32K is not set
++# CONFIG_RTC_DRV_S35390A is not set
++# CONFIG_RTC_DRV_FM3130 is not set
++# CONFIG_RTC_DRV_RX8581 is not set
++# CONFIG_RTC_DRV_RX8025 is not set
++# CONFIG_RTC_DRV_EM3027 is not set
++# CONFIG_RTC_DRV_RV3029C2 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_M41T93 is not set
++# CONFIG_RTC_DRV_M41T94 is not set
++# CONFIG_RTC_DRV_DS1305 is not set
++# CONFIG_RTC_DRV_DS1390 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++# CONFIG_RTC_DRV_R9701 is not set
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_DS3234 is not set
++# CONFIG_RTC_DRV_PCF2123 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_CMOS is not set
++# CONFIG_RTC_DRV_DS1286 is not set
++# CONFIG_RTC_DRV_DS1511 is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T35 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_MSM6242 is not set
++# CONFIG_RTC_MXC is not set
++# CONFIG_RTC_DRV_MXC_V2 is not set
++CONFIG_RTC_DRV_SNVS=y
++# CONFIG_RTC_DRV_BQ4802 is not set
++# CONFIG_RTC_DRV_RP5C01 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_DMADEVICES=y
++# CONFIG_DMADEVICES_DEBUG is not set
++
++#
++# DMA Devices
++#
++# CONFIG_DW_DMAC is not set
++# CONFIG_MXC_PXP is not set
++# CONFIG_MXC_PXP_V2 is not set
++# CONFIG_TIMB_DMA is not set
++CONFIG_IMX_SDMA=y
++# CONFIG_MXS_DMA is not set
++CONFIG_DMA_ENGINE=y
++
++#
++# DMA Clients
++#
++# CONFIG_NET_DMA is not set
++# CONFIG_ASYNC_TX_DMA is not set
++# CONFIG_DMATEST is not set
++# CONFIG_AUXDISPLAY is not set
++# CONFIG_UIO is not set
++CONFIG_STAGING=y
++# CONFIG_USBIP_CORE is not set
++# CONFIG_ECHO is not set
++# CONFIG_BRCMUTIL is not set
++# CONFIG_ASUS_OLED is not set
++# CONFIG_R8712U is not set
++# CONFIG_TRANZPORT is not set
++# CONFIG_POHMELFS is not set
++# CONFIG_LINE6_USB is not set
++# CONFIG_VT6656 is not set
++# CONFIG_IIO is not set
++# CONFIG_XVMALLOC is not set
++# CONFIG_ZRAM is not set
++# CONFIG_FB_SM7XX is not set
++# CONFIG_EASYCAP is not set
++CONFIG_MACH_NO_WESTBRIDGE=y
++# CONFIG_USB_ENESTORAGE is not set
++# CONFIG_BCM_WIMAX is not set
++# CONFIG_FT1000 is not set
++
++#
++# Speakup console speech
++#
++# CONFIG_SPEAKUP is not set
++# CONFIG_TOUCHSCREEN_CLEARPAD_TM1217 is not set
++# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set
++
++#
++# Altera FPGA firmware download module
++#
++# CONFIG_ALTERA_STAPL is not set
++CONFIG_CLKDEV_LOOKUP=y
++CONFIG_CLKSRC_MMIO=y
++
++#
++# MXC support drivers
++#
++CONFIG_MXC_IPU=y
++CONFIG_MXC_IPU_V3=y
++CONFIG_MXC_IPU_V3H=y
++
++#
++# MXC SSI support
++#
++# CONFIG_MXC_SSI is not set
++
++#
++# MXC Digital Audio Multiplexer support
++#
++# CONFIG_MXC_DAM is not set
++
++#
++# MXC PMIC support
++#
++# CONFIG_MXC_PMIC_MC13783 is not set
++# CONFIG_MXC_PMIC_MC13892 is not set
++# CONFIG_MXC_PMIC_MC34704 is not set
++# CONFIG_MXC_PMIC_MC9SDZ60 is not set
++# CONFIG_MXC_PMIC_MC9S08DZ60 is not set
++
++#
++# MXC Security Drivers
++#
++# CONFIG_MXC_SECURITY_SCC is not set
++# CONFIG_MXC_SECURITY_RNG is not set
++
++#
++# MXC MPEG4 Encoder Kernel module support
++#
++# CONFIG_MXC_HMP4E is not set
++
++#
++# MXC HARDWARE EVENT
++#
++# CONFIG_MXC_HWEVENT is not set
++
++#
++# MXC VPU(Video Processing Unit) support
++#
++CONFIG_MXC_VPU=y
++# CONFIG_MXC_VPU_DEBUG is not set
++
++#
++# MXC Asynchronous Sample Rate Converter support
++#
++CONFIG_MXC_ASRC=y
++
++#
++# MXC Bluetooth support
++#
++
++#
++# Broadcom GPS ioctrl support
++#
++
++#
++# MXC Media Local Bus Driver
++#
++# CONFIG_MXC_MLB150 is not set
++
++#
++# i.MX ADC support
++#
++# CONFIG_IMX_ADC is not set
++
++#
++# MXC Vivante GPU support
++#
++# CONFIG_MXC_GPU_VIV is not set
++
++#
++# ANATOP_THERMAL
++#
++# CONFIG_ANATOP_THERMAL is not set
++
++#
++# MXC MIPI Support
++#
++# CONFIG_MXC_MIPI_CSI2 is not set
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
++CONFIG_EXT3_FS_XATTR=y
++# CONFIG_EXT3_FS_POSIX_ACL is not set
++# CONFIG_EXT3_FS_SECURITY is not set
++CONFIG_EXT4_FS=y
++CONFIG_EXT4_FS_XATTR=y
++# CONFIG_EXT4_FS_POSIX_ACL is not set
++# CONFIG_EXT4_FS_SECURITY is not set
++# CONFIG_EXT4_DEBUG is not set
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
++CONFIG_JBD2=y
++# CONFIG_JBD2_DEBUG is not set
++CONFIG_FS_MBCACHE=y
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_BTRFS_FS is not set
++# CONFIG_NILFS2_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++CONFIG_FILE_LOCKING=y
++CONFIG_FSNOTIFY=y
++CONFIG_DNOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_FANOTIFY is not set
++# CONFIG_QUOTA is not set
++# CONFIG_QUOTACTL is not set
++CONFIG_AUTOFS4_FS=m
++# CONFIG_FUSE_FS is not set
++
++#
++# Caches
++#
++# CONFIG_FSCACHE is not set
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=y
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_PROC_PAGE_MONITOR=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_TMPFS_XATTR is not set
++# CONFIG_HUGETLB_PAGE is not set
++# CONFIG_CONFIGFS_FS is not set
++CONFIG_MISC_FILESYSTEMS=y
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++CONFIG_UBIFS_FS=y
++# CONFIG_UBIFS_FS_XATTR is not set
++# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
++CONFIG_UBIFS_FS_LZO=y
++CONFIG_UBIFS_FS_ZLIB=y
++# CONFIG_UBIFS_FS_DEBUG is not set
++# CONFIG_LOGFS is not set
++CONFIG_CRAMFS=y
++# CONFIG_SQUASHFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_OMFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_ROMFS_FS is not set
++# CONFIG_PSTORE is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++CONFIG_NFS_FS=y
++CONFIG_NFS_V3=y
++# CONFIG_NFS_V3_ACL is not set
++# CONFIG_NFS_V4 is not set
++CONFIG_ROOT_NFS=y
++# CONFIG_NFSD is not set
++CONFIG_LOCKD=y
++CONFIG_LOCKD_V4=y
++CONFIG_NFS_COMMON=y
++CONFIG_SUNRPC=y
++# CONFIG_CEPH_FS is not set
++# CONFIG_CIFS is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++
++#
++# Partition Types
++#
++CONFIG_PARTITION_ADVANCED=y
++# CONFIG_ACORN_PARTITION is not set
++# CONFIG_OSF_PARTITION is not set
++# CONFIG_AMIGA_PARTITION is not set
++# CONFIG_ATARI_PARTITION is not set
++# CONFIG_MAC_PARTITION is not set
++CONFIG_MSDOS_PARTITION=y
++# CONFIG_BSD_DISKLABEL is not set
++# CONFIG_MINIX_SUBPARTITION is not set
++# CONFIG_SOLARIS_X86_PARTITION is not set
++# CONFIG_UNIXWARE_DISKLABEL is not set
++# CONFIG_LDM_PARTITION is not set
++# CONFIG_SGI_PARTITION is not set
++# CONFIG_ULTRIX_PARTITION is not set
++# CONFIG_SUN_PARTITION is not set
++# CONFIG_KARMA_PARTITION is not set
++CONFIG_EFI_PARTITION=y
++# CONFIG_SYSV68_PARTITION is not set
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=y
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++# CONFIG_NLS_CODEPAGE_850 is not set
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++CONFIG_NLS_ASCII=m
++CONFIG_NLS_ISO8859_1=y
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=m
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_FRAME_WARN=1024
++# CONFIG_MAGIC_SYSRQ is not set
++# CONFIG_STRIP_ASM_SYMS is not set
++# CONFIG_UNUSED_SYMBOLS is not set
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++# CONFIG_DEBUG_SECTION_MISMATCH is not set
++# CONFIG_DEBUG_KERNEL is not set
++# CONFIG_HARDLOCKUP_DETECTOR is not set
++# CONFIG_SLUB_DEBUG_ON is not set
++# CONFIG_SLUB_STATS is not set
++# CONFIG_SPARSE_RCU_POINTER is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++# CONFIG_DEBUG_MEMORY_INIT is not set
++CONFIG_RCU_CPU_STALL_TIMEOUT=60
++CONFIG_RCU_CPU_STALL_VERBOSE=y
++# CONFIG_LKDTM is not set
++CONFIG_SYSCTL_SYSCALL_CHECK=y
++CONFIG_HAVE_FUNCTION_TRACER=y
++CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
++CONFIG_HAVE_DYNAMIC_FTRACE=y
++CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
++CONFIG_HAVE_C_RECORDMCOUNT=y
++CONFIG_TRACING_SUPPORT=y
++# CONFIG_FTRACE is not set
++# CONFIG_DYNAMIC_DEBUG is not set
++# CONFIG_DMA_API_DEBUG is not set
++# CONFIG_ATOMIC64_SELFTEST is not set
++# CONFIG_SAMPLES is not set
++CONFIG_HAVE_ARCH_KGDB=y
++# CONFIG_TEST_KSTRTOX is not set
++# CONFIG_STRICT_DEVMEM is not set
++CONFIG_ARM_UNWIND=y
++# CONFIG_DEBUG_USER is not set
++# CONFIG_OC_ETM is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY_DMESG_RESTRICT is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITYFS is not set
++CONFIG_DEFAULT_SECURITY_DAC=y
++CONFIG_DEFAULT_SECURITY=""
++CONFIG_CRYPTO=y
++
++#
++# Crypto core or helper
++#
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_ALGAPI2=y
++CONFIG_CRYPTO_AEAD2=y
++CONFIG_CRYPTO_BLKCIPHER=y
++CONFIG_CRYPTO_BLKCIPHER2=y
++CONFIG_CRYPTO_HASH2=y
++CONFIG_CRYPTO_RNG2=y
++CONFIG_CRYPTO_PCOMP2=y
++CONFIG_CRYPTO_MANAGER=y
++CONFIG_CRYPTO_MANAGER2=y
++CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
++# CONFIG_CRYPTO_GF128MUL is not set
++# CONFIG_CRYPTO_NULL is not set
++# CONFIG_CRYPTO_PCRYPT is not set
++CONFIG_CRYPTO_WORKQUEUE=y
++# CONFIG_CRYPTO_CRYPTD is not set
++# CONFIG_CRYPTO_AUTHENC is not set
++CONFIG_CRYPTO_TEST=m
++CONFIG_CRYPTO_CRYPTODEV=y
++
++#
++# Authenticated Encryption with Associated Data
++#
++# CONFIG_CRYPTO_CCM is not set
++# CONFIG_CRYPTO_GCM is not set
++# CONFIG_CRYPTO_SEQIV is not set
++
++#
++# Block modes
++#
++CONFIG_CRYPTO_CBC=y
++# CONFIG_CRYPTO_CTR is not set
++# CONFIG_CRYPTO_CTS is not set
++CONFIG_CRYPTO_ECB=y
++# CONFIG_CRYPTO_LRW is not set
++# CONFIG_CRYPTO_PCBC is not set
++# CONFIG_CRYPTO_XTS is not set
++
++#
++# Hash modes
++#
++# CONFIG_CRYPTO_HMAC is not set
++# CONFIG_CRYPTO_XCBC is not set
++# CONFIG_CRYPTO_VMAC is not set
++
++#
++# Digest
++#
++# CONFIG_CRYPTO_CRC32C is not set
++# CONFIG_CRYPTO_GHASH is not set
++# CONFIG_CRYPTO_MD4 is not set
++# CONFIG_CRYPTO_MD5 is not set
++# CONFIG_CRYPTO_MICHAEL_MIC is not set
++# CONFIG_CRYPTO_RMD128 is not set
++# CONFIG_CRYPTO_RMD160 is not set
++# CONFIG_CRYPTO_RMD256 is not set
++# CONFIG_CRYPTO_RMD320 is not set
++# CONFIG_CRYPTO_SHA1 is not set
++# CONFIG_CRYPTO_SHA256 is not set
++# CONFIG_CRYPTO_SHA512 is not set
++# CONFIG_CRYPTO_TGR192 is not set
++# CONFIG_CRYPTO_WP512 is not set
++
++#
++# Ciphers
++#
++CONFIG_CRYPTO_AES=y
++# CONFIG_CRYPTO_ANUBIS is not set
++# CONFIG_CRYPTO_ARC4 is not set
++# CONFIG_CRYPTO_BLOWFISH is not set
++# CONFIG_CRYPTO_CAMELLIA is not set
++# CONFIG_CRYPTO_CAST5 is not set
++# CONFIG_CRYPTO_CAST6 is not set
++# CONFIG_CRYPTO_DES is not set
++# CONFIG_CRYPTO_FCRYPT is not set
++# CONFIG_CRYPTO_KHAZAD is not set
++# CONFIG_CRYPTO_SALSA20 is not set
++# CONFIG_CRYPTO_SEED is not set
++# CONFIG_CRYPTO_SERPENT is not set
++# CONFIG_CRYPTO_TEA is not set
++# CONFIG_CRYPTO_TWOFISH is not set
++
++#
++# Compression
++#
++CONFIG_CRYPTO_DEFLATE=y
++# CONFIG_CRYPTO_ZLIB is not set
++CONFIG_CRYPTO_LZO=y
++
++#
++# Random Number Generation
++#
++# CONFIG_CRYPTO_ANSI_CPRNG is not set
++# CONFIG_CRYPTO_USER_API_HASH is not set
++# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
++CONFIG_CRYPTO_HW=y
++# CONFIG_BINARY_PRINTF is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_RATIONAL=y
++CONFIG_CRC_CCITT=m
++CONFIG_CRC16=y
++# CONFIG_CRC_T10DIF is not set
++# CONFIG_CRC_ITU_T is not set
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++# CONFIG_LIBCRC32C is not set
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_LZO_COMPRESS=y
++CONFIG_LZO_DECOMPRESS=y
++# CONFIG_XZ_DEC is not set
++# CONFIG_XZ_DEC_BCJ is not set
++CONFIG_DECOMPRESS_GZIP=y
++CONFIG_GENERIC_ALLOCATOR=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
++CONFIG_CPU_RMAP=y
++CONFIG_NLATTR=y
++# CONFIG_AVERAGE is not set
+diff --git a/arch/arm/mach-mx6/Kconfig b/arch/arm/mach-mx6/Kconfig
+index 2ffd90d..28719ca 100644
+--- a/arch/arm/mach-mx6/Kconfig
++++ b/arch/arm/mach-mx6/Kconfig
+@@ -179,6 +179,41 @@ config MACH_MX6Q_SABRELITE
+ 	  Include support for i.MX 6Quad SABRE Lite platform. This includes specific
+ 	  configurations for the board and its peripherals.
+ 
++config MACH_MX6Q_QMX6
++	bool "Support Congatec i.MX 6Quad QMX6 platform"
++	select ARCH_MX6Q
++	select SOC_IMX6Q
++	select IMX_HAVE_PLATFORM_IMX_UART
++	select IMX_HAVE_PLATFORM_DMA
++	select IMX_HAVE_PLATFORM_FEC
++	select IMX_HAVE_PLATFORM_GPMI_NFC
++	select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
++	select IMX_HAVE_PLATFORM_SPI_IMX
++	select IMX_HAVE_PLATFORM_IMX_I2C
++	select IMX_HAVE_PLATFORM_VIV_GPU
++	select IMX_HAVE_PLATFORM_IMX_VPU
++	select IMX_HAVE_PLATFORM_IMX_DVFS
++	select IMX_HAVE_PLATFORM_IMX_SSI
++	select IMX_HAVE_PLATFORM_IMX_ANATOP_THERMAL
++	select IMX_HAVE_PLATFORM_FSL_USB2_UDC
++	select IMX_HAVE_PLATFORM_MXC_EHCI
++	select IMX_HAVE_PLATFORM_FSL_OTG
++	select IMX_HAVE_PLATFORM_FSL_USB_WAKEUP
++	select IMX_HAVE_PLATFORM_AHCI
++	select IMX_HAVE_PLATFORM_IMX_OCOTP
++	select IMX_HAVE_PLATFORM_IMX_VIIM
++	select IMX_HAVE_PLATFORM_IMX2_WDT
++	select IMX_HAVE_PLATFORM_IMX_SNVS_RTC
++	select IMX_HAVE_PLATFORM_IMX_PM
++	select IMX_HAVE_PLATFORM_MXC_HDMI
++	select IMX_HAVE_PLATFORM_IMX_ASRC
++	select IMX_HAVE_PLATFORM_FLEXCAN
++	select IMX_HAVE_PLATFORM_IMX_MIPI_CSI2
++	select IMX_HAVE_PLATFORM_IMX_PCIE
++	help
++	  Include support for Congatec i.MX 6Quad QMX6 platform. This includes specific
++	  configurations for the board and its peripherals.
++
+ config MACH_MX6Q_SABRESD
+ 	bool "Support i.MX 6Quad SABRESD platform"
+ 	select ARCH_MX6Q
+diff --git a/arch/arm/mach-mx6/Makefile b/arch/arm/mach-mx6/Makefile
+index 5cac9bc..3f050de 100644
+--- a/arch/arm/mach-mx6/Makefile
++++ b/arch/arm/mach-mx6/Makefile
+@@ -1,6 +1,7 @@
+ #
+ # Makefile for the linux kernel.
+ #
++CFLAGS_mx6q_qmx6_pmic_pfuze100.o += -DPFUZE100_FIRST_VERSION
+ 
+ # Object file lists.
+ obj-y   := cpu.o mm.o system.o devices.o dummy_gpio.o irq.o bus_freq.o  usb_h2.o usb_h3.o\
+@@ -12,6 +13,7 @@ obj-$(CONFIG_MACH_MX6Q_ARM2) += board-mx6q_arm2.o
+ obj-$(CONFIG_MACH_MX6SL_ARM2) += board-mx6sl_arm2.o mx6sl_arm2_pmic_pfuze100.o
+ obj-$(CONFIG_MACH_MX6SL_EVK) += board-mx6sl_evk.o mx6sl_evk_pmic_pfuze100.o
+ obj-$(CONFIG_MACH_MX6Q_SABRELITE) += board-mx6q_sabrelite.o
++obj-$(CONFIG_MACH_MX6Q_QMX6) += board-mx6q_qmx6.o mx6q_qmx6_pmic_pfuze100.o
+ obj-$(CONFIG_MACH_MX6Q_SABRESD) += board-mx6q_sabresd.o mx6q_sabresd_pmic_pfuze100.o
+ obj-$(CONFIG_MACH_MX6Q_SABREAUTO) += board-mx6q_sabreauto.o mx6q_sabreauto_pmic_pfuze100.o
+ obj-$(CONFIG_SMP) += plat_hotplug.o platsmp.o headsmp.o
+diff --git a/arch/arm/mach-mx6/board-mx6dl_qmx6.h b/arch/arm/mach-mx6/board-mx6dl_qmx6.h
+new file mode 100644
+index 0000000..214286f
+--- /dev/null
++++ b/arch/arm/mach-mx6/board-mx6dl_qmx6.h
+@@ -0,0 +1,199 @@
++/*
++ * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++
++ * You should have received a copy of the GNU General Public License along
++ * with this program; if not, write to the Free Software Foundation, Inc.,
++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
++ */
++
++#ifndef _BOARD_MX6DL_QMX6_H
++#define _BOARD_MX6DL_QMX6_H
++#include <mach/iomux-mx6dl.h>
++
++static iomux_v3_cfg_t mx6dl_qmx6_pads[] = {
++	/* AUDMUX */	
++	MX6DL_PAD_DI0_PIN4__AUDMUX_AUD6_RXD,
++	MX6DL_PAD_DI0_PIN15__AUDMUX_AUD6_TXC,
++	MX6DL_PAD_DI0_PIN2__AUDMUX_AUD6_TXD,
++	MX6DL_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS,
++
++	/* CAN1  */
++	MX6DL_PAD_KEY_ROW2__CAN1_RXCAN,
++	MX6DL_PAD_KEY_COL2__CAN1_TXCAN,
++	MX6DL_PAD_GPIO_2__GPIO_1_2,		/* PCIE_WAKE_B */
++
++	/* CCM  */
++	MX6DL_PAD_GPIO_0__GPIO_1_0,		/* GPIO_0/Audio Ref. CLK */		
++
++	/* ECSPI1 */
++	MX6DL_PAD_EIM_D17__ECSPI1_MISO,
++	MX6DL_PAD_EIM_D18__ECSPI1_MOSI,
++	MX6DL_PAD_EIM_D16__ECSPI1_SCLK,
++	MX6DL_PAD_EIM_D19__GPIO_3_19,	/*SS1*/
++
++	/* ENET */
++	MX6DL_PAD_ENET_MDIO__ENET_MDIO,
++	MX6DL_PAD_ENET_MDC__ENET_MDC,
++	MX6DL_PAD_RGMII_TXC__ENET_RGMII_TXC,
++	MX6DL_PAD_RGMII_TD0__ENET_RGMII_TD0,
++	MX6DL_PAD_RGMII_TD1__ENET_RGMII_TD1,
++	MX6DL_PAD_RGMII_TD2__ENET_RGMII_TD2,
++	MX6DL_PAD_RGMII_TD3__ENET_RGMII_TD3,
++	MX6DL_PAD_RGMII_TX_CTL__ENET_RGMII_TX_CTL,
++	MX6DL_PAD_ENET_REF_CLK__ENET_TX_CLK,
++	MX6DL_PAD_RGMII_RXC__ENET_RGMII_RXC,
++	MX6DL_PAD_RGMII_RD0__ENET_RGMII_RD0,
++	MX6DL_PAD_RGMII_RD1__ENET_RGMII_RD1,
++	MX6DL_PAD_RGMII_RD2__ENET_RGMII_RD2,
++	MX6DL_PAD_RGMII_RD3__ENET_RGMII_RD3,
++	MX6DL_PAD_RGMII_RX_CTL__ENET_RGMII_RX_CTL,
++	MX6DL_PAD_ENET_TX_EN__GPIO_1_28,		/* Micrel RGMII Phy Interrupt */
++	MX6DL_PAD_EIM_D23__GPIO_3_23,		/* RGMII reset */
++
++	/* GPIO1 */
++	MX6DL_PAD_ENET_RX_ER__SPDIF_IN1,		/* SPDIF_IN */
++
++	/* GPIO2 */
++	MX6DL_PAD_NANDF_D1__GPIO_2_1,	/* J14 - Menu Button */
++	MX6DL_PAD_NANDF_D2__GPIO_2_2,	/* J14 - Back Button */
++	MX6DL_PAD_NANDF_D3__GPIO_2_3,	/* J14 - Search Button */
++	MX6DL_PAD_NANDF_D4__GPIO_2_4,	/* J14 - Home Button */
++	MX6DL_PAD_EIM_A22__GPIO_2_16,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_A21__GPIO_2_17,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_A20__GPIO_2_18,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_A19__GPIO_2_19,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_A18__GPIO_2_20,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_A17__GPIO_2_21,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_A16__GPIO_2_22,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_RW__GPIO_2_26,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_LBA__GPIO_2_27,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_EB0__GPIO_2_28,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_EB1__GPIO_2_29,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_EB3__GPIO_2_31,	/* J12 - Boot Mode Select */
++
++	/* GPIO3 */
++	MX6DL_PAD_EIM_DA0__GPIO_3_0,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_DA1__GPIO_3_1,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_DA2__GPIO_3_2,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_DA3__GPIO_3_3,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_DA4__GPIO_3_4,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_DA5__GPIO_3_5,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_DA6__GPIO_3_6,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_DA7__GPIO_3_7,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_DA8__GPIO_3_8,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_DA9__GPIO_3_9,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_DA10__GPIO_3_10,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_DA11__GPIO_3_11,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_DA12__GPIO_3_12,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_DA13__GPIO_3_13,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_DA14__GPIO_3_14,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_DA15__GPIO_3_15,	/* J12 - Boot Mode Select */
++
++	/* GPIO4 */
++	MX6DL_PAD_GPIO_19__GPIO_4_5,	/* Volume Down */
++
++	/* GPIO5 */
++	MX6DL_PAD_EIM_WAIT__GPIO_5_0,	/* J12 - Boot Mode Select */
++	MX6DL_PAD_EIM_A24__GPIO_5_4,	/* J12 - Boot Mode Select */
++
++	/* GPIO6 */
++	MX6DL_PAD_EIM_A23__GPIO_6_6,	/* J12 - Boot Mode Select */
++
++	/* GPIO7 */
++	MX6DL_PAD_GPIO_17__GPIO_7_12,	/* USB Hub Reset */
++	MX6DL_PAD_GPIO_18__GPIO_7_13,	/* Volume Up */
++
++	/* I2C1 - PRIMARY */
++	MX6DL_PAD_EIM_D21__I2C1_SCL,	/* GPIO3[21] */
++	MX6DL_PAD_EIM_D28__I2C1_SDA,	/* GPIO3[28] */
++
++	/* I2C2 - PMIC SDVO */
++	MX6DL_PAD_KEY_COL3__I2C2_SCL,	/* GPIO4[12] */
++	MX6DL_PAD_KEY_ROW3__I2C2_SDA,	/* GPIO4[13] */
++
++	/* I2C3 - Unused */
++	MX6DL_PAD_GPIO_3__I2C3_SCL,
++	MX6DL_PAD_GPIO_6__I2C3_SDA,
++
++	/* SUS_S3 */
++	MX6DL_PAD_GPIO_5__GPIO_1_5,	/* GPIO1[5] */
++
++	MX6DL_PAD_GPIO_16__GPIO_7_11,	/* GPIO7[11] */
++
++	MX6DL_PAD_GPIO_7__GPIO_1_7,		/* Display Connector GP */
++	MX6DL_PAD_GPIO_9__GPIO_1_9,		/* Display Connector GP */
++	MX6DL_PAD_NANDF_D0__GPIO_2_0,		/* Unused */
++
++	/* PWM1 */
++	MX6DL_PAD_SD1_DAT3__PWM1_PWMO,		/* GPIO1[21] */
++
++	/* PCIe RESET */
++	MX6DL_PAD_SD1_DAT2__GPIO_1_19,		/* GPIO1[19] */
++
++	/* PWM4 */
++	MX6DL_PAD_SD1_CMD__PWM4_PWMO,		/* GPIO1[18] */
++
++	/* UART1  */
++	MX6DL_PAD_CSI0_DAT10__UART1_TXD,
++	MX6DL_PAD_CSI0_DAT11__UART1_RXD,
++
++	/* UART2 for debug */
++	MX6DL_PAD_EIM_D26__UART2_TXD,
++	MX6DL_PAD_EIM_D27__UART2_RXD,
++
++	/* USBOTG ID pin */
++	MX6DL_PAD_GPIO_1__USBOTG_ID,
++
++	/* WATCHDOG */
++	MX6DL_PAD_KEY_COL4__GPIO_4_14,
++
++	/* USB OC pin */
++	// MX6DL_PAD_EIM_D30__USBOH3_USBH1_OC, TODO: to be checked
++
++	/* USDHC2 */
++	MX6DL_PAD_SD2_CLK__USDHC2_CLK,
++	MX6DL_PAD_SD2_CMD__USDHC2_CMD,
++	MX6DL_PAD_SD2_DAT0__USDHC2_DAT0,
++	MX6DL_PAD_SD2_DAT1__USDHC2_DAT1,
++	MX6DL_PAD_SD2_DAT2__USDHC2_DAT2,
++	MX6DL_PAD_SD2_DAT3__USDHC2_DAT3,
++	MX6DL_PAD_GPIO_4__GPIO_1_4,		/* Card Detect */
++
++	/* USDHC3 */
++	MX6DL_PAD_SD3_CLK__USDHC3_CLK_50MHZ,
++	MX6DL_PAD_SD3_CMD__USDHC3_CMD_50MHZ,
++	MX6DL_PAD_SD3_DAT0__USDHC3_DAT0_50MHZ,
++	MX6DL_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ,
++	MX6DL_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ,
++	MX6DL_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ,
++	MX6DL_PAD_SD3_DAT4__USDHC3_DAT4_50MHZ,
++	MX6DL_PAD_SD3_DAT5__USDHC3_DAT5_50MHZ,
++	MX6DL_PAD_SD3_DAT6__USDHC3_DAT6_50MHZ,
++	MX6DL_PAD_SD3_DAT7__USDHC3_DAT7_50MHZ,
++
++	/* USDHC4 */
++	MX6DL_PAD_SD4_CLK__USDHC4_CLK_50MHZ,
++	MX6DL_PAD_SD4_CMD__USDHC4_CMD_50MHZ,
++	MX6DL_PAD_SD4_DAT0__USDHC4_DAT0_50MHZ,
++	MX6DL_PAD_SD4_DAT1__USDHC4_DAT1_50MHZ,
++	MX6DL_PAD_SD4_DAT2__USDHC4_DAT2_50MHZ,
++	MX6DL_PAD_SD4_DAT3__USDHC4_DAT3_50MHZ,
++	MX6DL_PAD_SD4_DAT4__USDHC4_DAT4_50MHZ,
++	MX6DL_PAD_SD4_DAT5__USDHC4_DAT5_50MHZ,
++	MX6DL_PAD_SD4_DAT6__USDHC4_DAT6_50MHZ,
++	MX6DL_PAD_SD4_DAT7__USDHC4_DAT7_50MHZ,
++	MX6DL_PAD_NANDF_D6__GPIO_2_6,		/* SD4_CD */
++	MX6DL_PAD_NANDF_D7__GPIO_2_7,		/* SD4_WP */
++};
++
++#endif
+diff --git a/arch/arm/mach-mx6/board-mx6q_qmx6.c b/arch/arm/mach-mx6/board-mx6q_qmx6.c
+new file mode 100644
+index 0000000..ff16fb5
+--- /dev/null
++++ b/arch/arm/mach-mx6/board-mx6q_qmx6.c
+@@ -0,0 +1,1011 @@
++/*
++ * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++
++ * You should have received a copy of the GNU General Public License along
++ * with this program; if not, write to the Free Software Foundation, Inc.,
++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
++ */
++
++#include <linux/types.h>
++#include <linux/sched.h>
++#include <linux/delay.h>
++#include <linux/pm.h>
++#include <linux/interrupt.h>
++#include <linux/irq.h>
++#include <linux/init.h>
++#include <linux/input.h>
++#include <linux/nodemask.h>
++#include <linux/clk.h>
++#include <linux/platform_device.h>
++#include <linux/fsl_devices.h>
++#include <linux/spi/spi.h>
++#include <linux/spi/flash.h>
++#include <linux/i2c.h>
++#include <linux/i2c/pca953x.h>
++#include <linux/ata.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/map.h>
++#include <linux/mtd/partitions.h>
++#include <linux/regulator/consumer.h>
++#include <linux/pmic_external.h>
++#include <linux/pmic_status.h>
++#include <linux/ipu.h>
++#include <linux/mxcfb.h>
++#include <linux/pwm_backlight.h>
++#include <linux/fec.h>
++#include <linux/memblock.h>
++#include <linux/gpio.h>
++#include <linux/etherdevice.h>
++#include <linux/regulator/anatop-regulator.h>
++#include <linux/regulator/consumer.h>
++#include <linux/regulator/machine.h>
++#include <linux/regulator/fixed.h>
++
++#include <mach/common.h>
++#include <mach/hardware.h>
++#include <mach/mxc_dvfs.h>
++#include <mach/memory.h>
++#include <mach/iomux-mx6q.h>
++#include <mach/imx-uart.h>
++#include <mach/viv_gpu.h>
++#include <mach/ahci_sata.h>
++#include <mach/ipu-v3.h>
++#include <mach/mxc_hdmi.h>
++#include <mach/mxc_asrc.h>
++
++#include <asm/irq.h>
++#include <asm/setup.h>
++#include <asm/mach-types.h>
++#include <asm/mach/arch.h>
++#include <asm/mach/time.h>
++
++#include "usb.h"
++#include "devices-imx6q.h"
++#include "crm_regs.h"
++#include "cpu_op-mx6.h"
++#include "board-mx6q_qmx6.h"
++#include "board-mx6dl_qmx6.h"
++
++#define MX6Q_QMX6_VOLUME_UP_KEY		IMX_GPIO_NR(7, 13)
++#define MX6Q_QMX6_VOLUME_DOWN_KEY	IMX_GPIO_NR(4, 5)
++#define MX6Q_QMX6_MENU_KEY			IMX_GPIO_NR(2, 1)
++#define MX6Q_QMX6_BACK_KEY			IMX_GPIO_NR(2, 2)
++#define MX6Q_QMX6_SEARCH_KEY		IMX_GPIO_NR(2, 3)
++#define MX6Q_QMX6_HOME_KEY			IMX_GPIO_NR(2, 4)
++#define MX6Q_QMX6_ECSPI1_CS1		IMX_GPIO_NR(3, 19)
++#define MX6Q_QMX6_USB_HUB_RESET		IMX_GPIO_NR(7, 12)
++
++#define MX6Q_QMX6_SD4_CD			IMX_GPIO_NR(2, 6)
++#define MX6Q_QMX6_SD4_WP			IMX_GPIO_NR(2, 7)
++#define MX6Q_QMX6_SD2_CD			IMX_GPIO_NR(1, 4)
++#define MX6Q_QMX6_USB_OTG_PWR		IMX_GPIO_NR(3, 22)
++#define MX6Q_QMX6_POWER_OFF			IMX_GPIO_NR(2, 3)
++#define MX6Q_QMX6_PCIE_WAKE_B		IMX_GPIO_NR(1, 2)
++#define MX6Q_QMX6_BLT_EN        	IMX_GPIO_NR(1, 9)
++
++#define MX6Q_QMX6_TCH_INT1			IMX_GPIO_NR(7, 11)
++#define MX6Q_QMX6_CSI0_RST			IMX_GPIO_NR(1, 8)
++#define MX6Q_QMX6_PCIE_RST_B		IMX_GPIO_NR(1, 20)
++#define MX6Q_QMX6_CSI0_PWN			IMX_GPIO_NR(6, 10)
++#define MX6Q_QMX6_PFUZE_INT			IMX_GPIO_NR(5, 16)
++
++void __init early_console_setup(unsigned long base, struct clk *clk);
++extern int mx6q_qmx6_init_pfuze100(u32 int_gpio);
++
++static struct clk *sata_clk;
++static int disable_ldb;
++
++extern char *gp_reg_id;
++extern void mx6_cpu_regulator_init(void);
++
++static const struct esdhc_platform_data mx6q_qmx6_sd2_data __initconst = {
++	.cd_gpio = MX6Q_QMX6_SD2_CD,
++
++	.keep_power_at_suspend = 1,
++	.support_8bit = 0,
++	.delay_line = 0,
++	.force_write_access = 1,
++};
++
++static const struct esdhc_platform_data mx6q_qmx6_sd3_data __initconst = {
++	.always_present = 1,
++	.cd_gpio = -1,
++	.keep_power_at_suspend = 1,
++	.support_8bit = 1,
++	.delay_line = 0,
++};
++
++static const struct esdhc_platform_data mx6q_qmx6_sd4_data __initconst = {
++	.cd_gpio = MX6Q_QMX6_SD4_CD,
++	.wp_gpio = MX6Q_QMX6_SD4_WP,
++	.keep_power_at_suspend = 1,
++	.support_8bit = 1,
++	.delay_line = 0,
++};
++
++static const struct anatop_thermal_platform_data
++	mx6q_qmx6_anatop_thermal_data __initconst = {
++		.name = "anatop_thermal",
++};
++
++static inline void mx6q_qmx6_init_uart(void)
++{
++	imx6q_add_imx_uart(0, NULL);
++	imx6q_add_imx_uart(1, NULL);
++}
++
++static int mx6q_qmx6_fec_phy_init(struct phy_device *phydev)
++{
++	/* adjust KSZ9031 ethernet phy */
++ 
++	phy_write(phydev, 0x0d, 0x2);
++	phy_write(phydev, 0x0e, 0x4);
++	phy_write(phydev, 0x0d, 0xc002);
++	phy_write(phydev, 0x0e, 0x0000);
++
++	phy_write(phydev, 0x0d, 0x2);
++	phy_write(phydev, 0x0e, 0x5);
++	phy_write(phydev, 0x0d, 0xc002);
++	phy_write(phydev, 0x0e, 0x0000);
++
++	phy_write(phydev, 0x0d, 0x2);
++	phy_write(phydev, 0x0e, 0x6);
++	phy_write(phydev, 0x0d, 0xc002);
++	phy_write(phydev, 0x0e, 0xffff);
++
++	phy_write(phydev, 0x0d, 0x2);
++	phy_write(phydev, 0x0e, 0x8);
++	phy_write(phydev, 0x0d, 0xc002);
++	phy_write(phydev, 0x0e, 0x3fff);
++	phy_write(phydev, 0x0d, 0x0);
++
++	return 0;
++}
++
++static struct fec_platform_data fec_data __initdata = {
++	.init = mx6q_qmx6_fec_phy_init,
++	.phy = PHY_INTERFACE_MODE_RGMII,
++};
++
++static int mx6q_qmx6_spi_cs[] = {
++	MX6Q_QMX6_ECSPI1_CS1,
++};
++
++static const struct spi_imx_master mx6q_qmx6_spi_data __initconst = {
++	.chipselect     = mx6q_qmx6_spi_cs,
++	.num_chipselect = ARRAY_SIZE(mx6q_qmx6_spi_cs),
++};
++
++#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
++static struct mtd_partition imx6_qmx6_spi_nor_partitions[] = {
++	{
++	 .name = "bootloader",
++	 .offset = 0,
++	 .size = 0x00040000,
++	},
++	{
++	 .name = "user",
++	 .offset = MTDPART_OFS_APPEND,
++	 .size = 0x003BC000,
++	},
++	{
++	 /* this 16KB area is used for congatec manufacturing purposes */
++	 /* we strongly recommend not to modify or destroy this area */ 
++	 .name = "reserved",
++	 .offset = MTDPART_OFS_APPEND,
++	 .size = 0x00004000,
++	 .mask_flags = MTD_WRITEABLE,
++	},
++};
++
++static struct flash_platform_data imx6_qmx6__spi_flash_data = {
++	.name = "m25p80",
++	.parts = imx6_qmx6_spi_nor_partitions,
++	.nr_parts = ARRAY_SIZE(imx6_qmx6_spi_nor_partitions),
++	.type = "sst25vf032b",
++};
++#endif
++
++static struct spi_board_info imx6_qmx6_spi_nor_device[] __initdata = {
++#if defined(CONFIG_MTD_M25P80)
++	{
++		.modalias = "m25p80",
++		.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
++		.bus_num = 0,
++		.chip_select = 0,
++		.platform_data = &imx6_qmx6__spi_flash_data,
++	},
++#endif
++};
++
++static void spi_device_init(void)
++{
++	spi_register_board_info(imx6_qmx6_spi_nor_device,
++				ARRAY_SIZE(imx6_qmx6_spi_nor_device));
++}
++
++static struct imx_ssi_platform_data mx6_qmx6_ssi_pdata = {
++	.flags = IMX_SSI_DMA | IMX_SSI_SYN,
++};
++
++static struct platform_device mx6_qmx6_audio_device = {
++	.name = "imx-sgtl5000",
++};
++
++static struct mxc_audio_platform_data mx6_qmx6_audio_data = {
++	.ssi_num = 1,
++	.src_port = 2,
++	.ext_port = 6,
++	.hp_gpio = -1,
++};
++static int mx6_qmx6_sgtl5000_init(void)
++{
++	struct clk *clko;
++	struct clk *new_parent;
++	int rate;
++
++	clko = clk_get(NULL, "clko_clk");
++	if (IS_ERR(clko)) {
++		pr_err("can't get CLKO clock.\n");
++		return PTR_ERR(clko);
++	}
++	new_parent = clk_get(NULL, "ahb");
++	if (!IS_ERR(new_parent)) {
++		clk_set_parent(clko, new_parent);
++		clk_put(new_parent);
++	}
++	rate = clk_round_rate(clko, 16000000);
++	if (rate < 8000000 || rate > 27000000) {
++		pr_err("Error:SGTL5000 mclk freq %d out of range!\n", rate);
++		clk_put(clko);
++		return -1;
++	}
++
++	mx6_qmx6_audio_data.sysclk = rate;
++	clk_set_rate(clko, rate);
++	clk_enable(clko);
++	return 0;
++}
++static struct imxi2c_platform_data mx6q_qmx6_i2c_data = {
++	.bitrate = 100000,
++};
++
++static struct i2c_board_info mxc_i2c0_board_info[] __initdata = {
++	{
++		I2C_BOARD_INFO("sgtl5000", 0x0a),
++	},
++};
++
++
++static struct i2c_board_info mxc_i2c1_board_info[] __initdata = {
++	{
++		I2C_BOARD_INFO("mxc_hdmi_i2c", 0x50),
++	},
++};
++
++static struct i2c_board_info mxc_i2c2_board_info[] __initdata = {
++	{
++		I2C_BOARD_INFO("mxc_ldb_i2c", 0x50),
++		.platform_data = (void *)0,
++	},
++};
++static void imx6q_qmx6_usbotg_vbus(bool on)
++{
++	if (on)
++		gpio_set_value(MX6Q_QMX6_USB_OTG_PWR, 1);
++	else
++		gpio_set_value(MX6Q_QMX6_USB_OTG_PWR, 0);
++}
++
++static void __init imx6q_qmx6_init_usb(void)
++{
++	int ret = 0;
++
++	imx_otg_base = MX6_IO_ADDRESS(MX6Q_USB_OTG_BASE_ADDR);
++	/* disable external charger detect,
++	 * or it will affect signal quality at dp .
++	 */
++	ret = gpio_request(MX6Q_QMX6_USB_OTG_PWR, "usb-pwr");
++	if (ret) {
++		pr_err("failed to get GPIO MX6Q_QMX6_USB_OTG_PWR: %d\n",
++			ret);
++		return;
++	}
++	gpio_direction_output(MX6Q_QMX6_USB_OTG_PWR, 0);
++#if 0
++// sml +++ debug, to be implemented
++	/* keep USB host1 VBUS always on */
++	ret = gpio_request(MX6Q_QMX6_USB_H1_PWR, "usb-h1-pwr");
++	if (ret) {
++		pr_err("failed to get GPIO MX6Q_QMX6_USB_H1_PWR: %d\n",
++			ret);
++		return;
++	}
++	gpio_direction_output(MX6Q_QMX6_USB_H1_PWR, 1);
++		mxc_iomux_set_gpr_register(1, 13, 1, 1);
++#endif
++
++	mx6_set_otghost_vbus_func(imx6q_qmx6_usbotg_vbus);
++}
++
++/* HW Initialization, if return 0, initialization is successful. */
++static int mx6q_qmx6_sata_init(struct device *dev, void __iomem *addr)
++{
++	u32 tmpdata;
++	int ret = 0;
++	struct clk *clk;
++
++	sata_clk = clk_get(dev, "imx_sata_clk");
++	if (IS_ERR(sata_clk)) {
++		dev_err(dev, "no sata clock.\n");
++		return PTR_ERR(sata_clk);
++	}
++	ret = clk_enable(sata_clk);
++	if (ret) {
++		dev_err(dev, "can't enable sata clock.\n");
++		goto put_sata_clk;
++	}
++
++	/* Set PHY Paremeters, two steps to configure the GPR13,
++	 * one write for rest of parameters, mask of first write is 0x07FFFFFD,
++	 * and the other one write for setting the mpll_clk_off_b
++	 *.rx_eq_val_0(iomuxc_gpr13[26:24]),
++	 *.los_lvl(iomuxc_gpr13[23:19]),
++	 *.rx_dpll_mode_0(iomuxc_gpr13[18:16]),
++	 *.sata_speed(iomuxc_gpr13[15]),
++	 *.mpll_ss_en(iomuxc_gpr13[14]),
++	 *.tx_atten_0(iomuxc_gpr13[13:11]),
++	 *.tx_boost_0(iomuxc_gpr13[10:7]),
++	 *.tx_lvl(iomuxc_gpr13[6:2]),
++	 *.mpll_ck_off(iomuxc_gpr13[1]),
++	 *.tx_edgerate_0(iomuxc_gpr13[0]),
++	 */
++	tmpdata = readl(IOMUXC_GPR13);
++	writel(((tmpdata & ~0x07FFFFFD) | 0x0593A044), IOMUXC_GPR13);
++
++	/* enable SATA_PHY PLL */
++	tmpdata = readl(IOMUXC_GPR13);
++	writel(((tmpdata & ~0x2) | 0x2), IOMUXC_GPR13);
++
++	/* Get the AHB clock rate, and configure the TIMER1MS reg later */
++	clk = clk_get(NULL, "ahb");
++	if (IS_ERR(clk)) {
++		dev_err(dev, "no ahb clock.\n");
++		ret = PTR_ERR(clk);
++		goto release_sata_clk;
++	}
++	tmpdata = clk_get_rate(clk) / 1000;
++	clk_put(clk);
++
++	ret = sata_init(addr, tmpdata);
++	if (ret == 0)
++		return ret;
++
++release_sata_clk:
++	clk_disable(sata_clk);
++put_sata_clk:
++	clk_put(sata_clk);
++
++	return ret;
++}
++
++static void mx6q_qmx6_sata_exit(struct device *dev)
++{
++	clk_disable(sata_clk);
++	clk_put(sata_clk);
++}
++
++static struct ahci_platform_data mx6q_qmx6_sata_data = {
++	.init = mx6q_qmx6_sata_init,
++	.exit = mx6q_qmx6_sata_exit,
++};
++
++static struct viv_gpu_platform_data imx6q_gpu_pdata __initdata = {
++	.reserved_mem_size = SZ_128M,
++};
++
++static struct imx_asrc_platform_data imx_asrc_data = {
++	.channel_bits = 4,
++	.clk_map_ver = 2,
++};
++
++static struct ipuv3_fb_platform_data qmx6_fb_data[] = {
++	{ /*fb0*/
++	.disp_dev = "ldb",
++	.interface_pix_fmt = IPU_PIX_FMT_RGB666,
++	.mode_str = "LDB-XGA",
++	.default_bpp = 16,
++	.int_clk = false,
++	}, {
++	.disp_dev = "lcd",
++	.interface_pix_fmt = IPU_PIX_FMT_RGB565,
++	.mode_str = "CLAA-WVGA",
++	.default_bpp = 16,
++	.int_clk = false,
++	}, {
++	.disp_dev = "ldb",
++	.interface_pix_fmt = IPU_PIX_FMT_RGB666,
++	.mode_str = "LDB-SVGA",
++	.default_bpp = 16,
++	.int_clk = false,
++	}, {
++	.disp_dev = "ldb",
++	.interface_pix_fmt = IPU_PIX_FMT_RGB666,
++	.mode_str = "LDB-VGA",
++	.default_bpp = 16,
++	.int_clk = false,
++	},
++};
++
++static void hdmi_init(int ipu_id, int disp_id)
++{
++	int hdmi_mux_setting;
++
++	if ((ipu_id > 1) || (ipu_id < 0)) {
++		pr_err("Invalid IPU select for HDMI: %d. Set to 0\n", ipu_id);
++		ipu_id = 0;
++	}
++
++	if ((disp_id > 1) || (disp_id < 0)) {
++		pr_err("Invalid DI select for HDMI: %d. Set to 0\n", disp_id);
++		disp_id = 0;
++	}
++
++	/* Configure the connection between IPU1/2 and HDMI */
++	hdmi_mux_setting = 2*ipu_id + disp_id;
++
++	/* GPR3, bits 2-3 = HDMI_MUX_CTL */
++	mxc_iomux_set_gpr_register(3, 2, 2, hdmi_mux_setting);
++}
++
++static struct fsl_mxc_hdmi_platform_data hdmi_data = {
++	.init = hdmi_init,
++};
++
++static struct fsl_mxc_hdmi_core_platform_data hdmi_core_data = {
++	.ipu_id = 0,
++	.disp_id = 0,
++};
++
++static struct fsl_mxc_lcd_platform_data lcdif_data = {
++	.ipu_id = 0,
++	.disp_id = 0,
++	.default_ifmt = IPU_PIX_FMT_RGB565,
++};
++
++static struct fsl_mxc_ldb_platform_data ldb_data = {
++	.ipu_id = 1,
++	.disp_id = 0,
++	.ext_ref = 1,
++	.mode = LDB_SEP0,
++	.sec_ipu_id = 1,
++	.sec_disp_id = 1,
++};
++
++static struct imx_ipuv3_platform_data ipu_data[] = {
++	{
++	.rev = 4,
++	.csi_clk[0] = "clko2_clk",
++	}, {
++	.rev = 4,
++	.csi_clk[0] = "clko2_clk",
++	},
++};
++
++static struct fsl_mxc_capture_platform_data capture_data[] = {
++  {
++    .csi = 0,
++    .ipu = 0,
++    .mclk_source = 0,
++    .is_mipi = 0,
++  },
++};
++
++static void qmx6_suspend_enter(void)
++{
++	/* suspend preparation */
++#if 0
++// sml: TBD
++	/* Disable AUX 5V */
++	gpio_set_value(QMX6_AUX_5V_EN, 0);
++#endif
++	/* disable backlight */
++	gpio_set_value(MX6Q_QMX6_BLT_EN, 0);
++}
++
++static void qmx6_suspend_exit(void)
++{
++	/* resume restore */
++#if 0
++// sml: TBD
++	/* Enable AUX 5V */
++	gpio_set_value(QMX6_AUX_5V_EN, 1);
++#endif
++	/* enable backlight */
++	gpio_set_value(MX6Q_QMX6_BLT_EN, 1);
++}
++static const struct pm_platform_data mx6q_qmx6_pm_data __initconst = {
++	.name = "imx_pm",
++	.suspend_enter = qmx6_suspend_enter,
++	.suspend_exit = qmx6_suspend_exit,
++};
++
++static struct regulator_consumer_supply qmx6_vmmc_consumers[] = {
++	REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.1"),
++	REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.2"),
++	REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx.3"),
++};
++
++static struct regulator_init_data qmx6_vmmc_init = {
++	.num_consumer_supplies = ARRAY_SIZE(qmx6_vmmc_consumers),
++	.consumer_supplies = qmx6_vmmc_consumers,
++};
++
++static struct fixed_voltage_config qmx6_vmmc_reg_config = {
++	.supply_name		= "vmmc",
++	.microvolts		= 3300000,
++	.gpio			= -1,
++	.init_data		= &qmx6_vmmc_init,
++};
++
++static struct platform_device qmx6_vmmc_reg_devices = {
++	.name	= "reg-fixed-voltage",
++	.id	= 3,
++	.dev	= {
++		.platform_data = &qmx6_vmmc_reg_config,
++	},
++};
++
++#ifdef CONFIG_SND_SOC_SGTL5000
++
++static struct regulator_consumer_supply sgtl5000_qmx6_consumer_vdda = {
++	.supply = "VDDA",
++	.dev_name = "0-000a",
++};
++
++static struct regulator_consumer_supply sgtl5000_qmx6_consumer_vddio = {
++	.supply = "VDDIO",
++	.dev_name = "0-000a",
++};
++
++static struct regulator_consumer_supply sgtl5000_qmx6_consumer_vddd = {
++	.supply = "VDDD",
++	.dev_name = "0-000a",
++};
++
++static struct regulator_init_data sgtl5000_qmx6_vdda_reg_initdata = {
++	.num_consumer_supplies = 1,
++	.consumer_supplies = &sgtl5000_qmx6_consumer_vdda,
++};
++
++static struct regulator_init_data sgtl5000_qmx6_vddio_reg_initdata = {
++	.num_consumer_supplies = 1,
++	.consumer_supplies = &sgtl5000_qmx6_consumer_vddio,
++};
++
++static struct regulator_init_data sgtl5000_qmx6_vddd_reg_initdata = {
++	.num_consumer_supplies = 1,
++	.consumer_supplies = &sgtl5000_qmx6_consumer_vddd,
++};
++
++static struct fixed_voltage_config sgtl5000_qmx6_vdda_reg_config = {
++	.supply_name		= "VDDA",
++	.microvolts		= 2500000,
++	.gpio			= -1,
++	.init_data		= &sgtl5000_qmx6_vdda_reg_initdata,
++};
++
++static struct fixed_voltage_config sgtl5000_qmx6_vddio_reg_config = {
++	.supply_name		= "VDDIO",
++	.microvolts		= 3300000,
++	.gpio			= -1,
++	.init_data		= &sgtl5000_qmx6_vddio_reg_initdata,
++};
++
++static struct fixed_voltage_config sgtl5000_qmx6_vddd_reg_config = {
++	.supply_name		= "VDDD",
++	.microvolts		= 0,
++	.gpio			= -1,
++	.init_data		= &sgtl5000_qmx6_vddd_reg_initdata,
++};
++
++static struct platform_device sgtl5000_qmx6_vdda_reg_devices = {
++	.name	= "reg-fixed-voltage",
++	.id	= 0,
++	.dev	= {
++		.platform_data = &sgtl5000_qmx6_vdda_reg_config,
++	},
++};
++
++static struct platform_device sgtl5000_qmx6_vddio_reg_devices = {
++	.name	= "reg-fixed-voltage",
++	.id	= 1,
++	.dev	= {
++		.platform_data = &sgtl5000_qmx6_vddio_reg_config,
++	},
++};
++
++static struct platform_device sgtl5000_qmx6_vddd_reg_devices = {
++	.name	= "reg-fixed-voltage",
++	.id	= 2,
++	.dev	= {
++		.platform_data = &sgtl5000_qmx6_vddd_reg_config,
++	},
++};
++
++#endif /* CONFIG_SND_SOC_SGTL5000 */
++
++static int imx6q_init_audio(void)
++{
++	mxc_register_device(&mx6_qmx6_audio_device,
++			    &mx6_qmx6_audio_data);
++	imx6q_add_imx_ssi(1, &mx6_qmx6_ssi_pdata);
++#ifdef CONFIG_SND_SOC_SGTL5000
++	platform_device_register(&sgtl5000_qmx6_vdda_reg_devices);
++	platform_device_register(&sgtl5000_qmx6_vddio_reg_devices);
++	platform_device_register(&sgtl5000_qmx6_vddd_reg_devices);
++	mx6_qmx6_sgtl5000_init();
++#endif
++	return 0;
++
++}
++
++static void pcie_3v3_reset(void)
++{
++	/* reset miniPCIe */
++	gpio_request(MX6Q_QMX6_PCIE_RST_B, "pcie_reset");
++	gpio_direction_output(MX6Q_QMX6_PCIE_RST_B, 1);
++
++	gpio_set_value(MX6Q_QMX6_PCIE_RST_B, 0);
++	/* The PCI Express Mini CEM specification states that PREST# is
++	deasserted minimum 1ms after 3.3vVaux has been applied and stable*/
++	msleep(1);
++	gpio_set_value(MX6Q_QMX6_PCIE_RST_B, 1);
++}
++
++#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
++#define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake)	\
++{								\
++	.gpio		= gpio_num,				\
++	.type		= EV_KEY,				\
++	.code		= ev_code,				\
++	.active_low	= act_low,				\
++	.desc		= "btn " descr,				\
++	.wakeup		= wake,					\
++}
++
++static struct gpio_keys_button imx6q_buttons[] = {
++	GPIO_BUTTON(MX6Q_QMX6_POWER_OFF, KEY_POWER, 1, "key-power", 1),
++	GPIO_BUTTON(MX6Q_QMX6_MENU_KEY, KEY_MENU, 1, "key-memu", 0),
++	GPIO_BUTTON(MX6Q_QMX6_HOME_KEY, KEY_HOME, 1, "key-home", 0),
++	GPIO_BUTTON(MX6Q_QMX6_BACK_KEY, KEY_BACK, 1, "key-back", 0),
++	GPIO_BUTTON(MX6Q_QMX6_VOLUME_UP_KEY, KEY_VOLUMEUP, 1, "volume-up", 0),
++	GPIO_BUTTON(MX6Q_QMX6_VOLUME_DOWN_KEY, KEY_VOLUMEDOWN, 1, "volume-down", 0),
++};
++
++static struct gpio_keys_platform_data imx6q_button_data = {
++	.buttons	= imx6q_buttons,
++	.nbuttons	= ARRAY_SIZE(imx6q_buttons),
++};
++
++static struct platform_device imx6q_button_device = {
++	.name		= "gpio-keys",
++	.id		= -1,
++	.num_resources  = 0,
++	.dev		= {
++		.platform_data = &imx6q_button_data,
++	}
++};
++
++static void __init imx6q_add_device_buttons(void)
++{
++	platform_device_register(&imx6q_button_device);
++}
++#else
++static void __init imx6q_add_device_buttons(void) {}
++#endif
++
++static struct platform_pwm_backlight_data mx6_qmx6_pwm_backlight_data = {
++	.pwm_id = 3,
++	.max_brightness = 255,
++	.dft_brightness = 128,
++	.pwm_period_ns = 50000,
++};
++
++static struct mxc_dvfs_platform_data qmx6_dvfscore_data = {
++	.reg_id = "cpu_vddgp",
++	.clk1_id = "cpu_clk",
++	.clk2_id = "gpc_dvfs_clk",
++	.gpc_cntr_offset = MXC_GPC_CNTR_OFFSET,
++	.ccm_cdcr_offset = MXC_CCM_CDCR_OFFSET,
++	.ccm_cacrr_offset = MXC_CCM_CACRR_OFFSET,
++	.ccm_cdhipr_offset = MXC_CCM_CDHIPR_OFFSET,
++	.prediv_mask = 0x1F800,
++	.prediv_offset = 11,
++	.prediv_val = 3,
++	.div3ck_mask = 0xE0000000,
++	.div3ck_offset = 29,
++	.div3ck_val = 2,
++	.emac_val = 0x08,
++	.upthr_val = 25,
++	.dnthr_val = 9,
++	.pncthr_val = 33,
++	.upcnt_val = 10,
++	.dncnt_val = 10,
++	.delay_time = 80,
++};
++
++static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags,
++				   char **cmdline, struct meminfo *mi)
++{
++	char *str;
++	struct tag *t;
++	int i = 0;
++	struct ipuv3_fb_platform_data *pdata_fb = qmx6_fb_data;
++
++	for_each_tag(t, tags) {
++		if (t->hdr.tag == ATAG_CMDLINE) {
++			str = t->u.cmdline.cmdline;
++			str = strstr(str, "fbmem=");
++			if (str != NULL) {
++				str += 6;
++				pdata_fb[i++].res_size[0] = memparse(str, &str);
++				while (*str == ',' &&
++					i < ARRAY_SIZE(qmx6_fb_data)) {
++					str++;
++					pdata_fb[i++].res_size[0] = memparse(str, &str);
++				}
++			}
++			break;
++		}
++	}
++}
++
++#define SNVS_LPCR 0x38
++static void mx6_snvs_poweroff(void)
++{
++
++	void __iomem *mx6_snvs_base =  MX6_IO_ADDRESS(MX6Q_SNVS_BASE_ADDR);
++	u32 value;
++	value = readl(mx6_snvs_base + SNVS_LPCR);
++	/*set TOP and DP_EN bit*/
++	writel(value | 0x60, mx6_snvs_base + SNVS_LPCR);
++}
++
++static int __init early_disable_ldb(char *p)
++{
++	/*mipi dsi need pll3_pfd_540M as 540MHz, ldb will change to 454Mhz*/
++	disable_ldb = 1;
++	return 0;
++}
++
++early_param("disable_ldb", early_disable_ldb);
++
++static const struct imx_pcie_platform_data mx6_qmx6_pcie_data __initconst = {
++	.pcie_pwr_en	= -1,
++	.pcie_rst	= MX6Q_QMX6_PCIE_RST_B,
++	.pcie_wake_up	= MX6Q_QMX6_PCIE_WAKE_B,
++	.pcie_dis	= -1,
++};
++
++/*!
++ * Board specific initialization.
++ */
++static void __init mx6_qmx6_board_init(void)
++{
++	int i;
++	int ret;
++	struct clk *clko2;
++	struct clk *new_parent;
++	int rate;
++
++	if (cpu_is_mx6q())
++		mxc_iomux_v3_setup_multiple_pads(mx6q_qmx6_pads,
++			ARRAY_SIZE(mx6q_qmx6_pads));
++	else if (cpu_is_mx6dl()) {
++		mxc_iomux_v3_setup_multiple_pads(mx6dl_qmx6_pads,
++			ARRAY_SIZE(mx6dl_qmx6_pads));
++	}
++
++	gp_reg_id = qmx6_dvfscore_data.reg_id;
++	mx6q_qmx6_init_uart();
++
++	/*
++	 * MX6DL/Solo only supports single IPU
++	 * The following codes are used to change ipu id
++	 * and display id information for MX6DL/Solo. Then
++	 * register 1 IPU device and up to 2 displays for
++	 * MX6DL/Solo
++	 */
++	if (cpu_is_mx6dl()) {
++		ldb_data.ipu_id = 0;
++		ldb_data.disp_id = 0;
++		ldb_data.sec_ipu_id = 0;
++		ldb_data.sec_disp_id = 1;
++		hdmi_core_data.disp_id = 1;
++	}
++	imx6q_add_mxc_hdmi_core(&hdmi_core_data);
++
++	imx6q_add_ipuv3(0, &ipu_data[0]);
++	if (cpu_is_mx6q()) {
++		imx6q_add_ipuv3(1, &ipu_data[1]);
++		for (i = 0; i < ARRAY_SIZE(qmx6_fb_data); i++)
++			imx6q_add_ipuv3fb(i, &qmx6_fb_data[i]);
++	} else
++		for (i = 0; i < (ARRAY_SIZE(qmx6_fb_data) + 1) / 2; i++)
++			imx6q_add_ipuv3fb(i, &qmx6_fb_data[i]);
++
++	imx6q_add_vdoa();
++	imx6q_add_lcdif(&lcdif_data);
++	if (!disable_ldb)
++		imx6q_add_ldb(&ldb_data);
++	imx6q_add_v4l2_output(0);
++	imx6q_add_v4l2_capture(0, &capture_data[0]);	
++	imx6q_add_imx_snvs_rtc();
++
++	imx6q_add_imx_i2c(0, &mx6q_qmx6_i2c_data);
++	imx6q_add_imx_i2c(1, &mx6q_qmx6_i2c_data);
++	imx6q_add_imx_i2c(2, &mx6q_qmx6_i2c_data);
++	i2c_register_board_info(0, mxc_i2c0_board_info,
++			ARRAY_SIZE(mxc_i2c0_board_info));
++	i2c_register_board_info(1, mxc_i2c1_board_info,
++			ARRAY_SIZE(mxc_i2c1_board_info));
++	i2c_register_board_info(2, mxc_i2c2_board_info,
++			ARRAY_SIZE(mxc_i2c2_board_info));
++	ret = gpio_request(MX6Q_QMX6_PFUZE_INT, "pFUZE-int");
++	if (ret) {
++		printk(KERN_ERR"request pFUZE-int error!!\n");
++		return;
++	} else {
++		gpio_direction_input(MX6Q_QMX6_PFUZE_INT);
++		mx6q_qmx6_init_pfuze100(MX6Q_QMX6_PFUZE_INT);
++	}
++
++	/* SPI */
++	imx6q_add_ecspi(0, &mx6q_qmx6_spi_data);
++	spi_device_init();
++
++	imx6q_add_mxc_hdmi(&hdmi_data);
++
++	imx6q_add_anatop_thermal_imx(1, &mx6q_qmx6_anatop_thermal_data);
++	imx6_init_fec(fec_data);
++	imx6q_add_pm_imx(0, &mx6q_qmx6_pm_data);
++	/* Move sd3 to first because sd3 connect to emmc.
++	   Mfgtools want emmc is mmcblk0 and other sd card is mmcblk1.
++	*/
++	imx6q_add_sdhci_usdhc_imx(1, &mx6q_qmx6_sd2_data);
++	imx6q_add_sdhci_usdhc_imx(2, &mx6q_qmx6_sd3_data);
++	imx6q_add_sdhci_usdhc_imx(3, &mx6q_qmx6_sd4_data);
++	
++	imx_add_viv_gpu(&imx6_gpu_data, &imx6q_gpu_pdata);
++	imx6q_qmx6_init_usb();
++	/* SATA is not supported by MX6DL/Solo */
++	if (cpu_is_mx6q())
++		imx6q_add_ahci(0, &mx6q_qmx6_sata_data);
++	imx6q_add_vpu();
++	imx6q_init_audio();
++	platform_device_register(&qmx6_vmmc_reg_devices);
++
++	imx_asrc_data.asrc_core_clk = clk_get(NULL, "asrc_clk");
++	imx_asrc_data.asrc_audio_clk = clk_get(NULL, "asrc_serial_clk");
++	imx6q_add_asrc(&imx_asrc_data);
++
++	/* release USB Hub reset */
++	gpio_set_value(MX6Q_QMX6_USB_HUB_RESET, 1);
++
++	/* fan & backlight PWM */
++	imx6q_add_mxc_pwm(0);
++	imx6q_add_mxc_pwm(3);
++	imx6q_add_mxc_pwm_backlight(3, &mx6_qmx6_pwm_backlight_data);
++
++	/* switch on backlight */
++	gpio_request(MX6Q_QMX6_BLT_EN, "backlight");
++	gpio_direction_output(MX6Q_QMX6_BLT_EN, 1);
++	gpio_set_value(MX6Q_QMX6_BLT_EN, 1);
++
++	imx6q_add_otp();
++	imx6q_add_viim();
++	imx6q_add_imx2_wdt(0, NULL);
++	imx6q_add_dma();
++
++	imx6q_add_dvfs_core(&qmx6_dvfscore_data);
++	mx6_cpu_regulator_init();
++
++	imx6q_add_device_buttons();	
++
++	imx6q_add_hdmi_soc();
++	imx6q_add_hdmi_soc_dai();
++
++	/*
++	ret = gpio_request_array(mx6q_qmx6_flexcan_gpios,
++			ARRAY_SIZE(mx6q_qmx6_flexcan_gpios));
++	if (ret)
++		pr_err("failed to request flexcan1-gpios: %d\n", ret);
++	else
++		imx6q_add_flexcan0(&mx6q_qmx6_flexcan0_pdata);
++	*/
++
++	clko2 = clk_get(NULL, "clko2_clk");
++	if (IS_ERR(clko2))
++		pr_err("can't get CLKO2 clock.\n");
++
++	new_parent = clk_get(NULL, "osc_clk");
++	if (!IS_ERR(new_parent)) {
++		clk_set_parent(clko2, new_parent);
++		clk_put(new_parent);
++	}
++	rate = clk_round_rate(clko2, 24000000);
++	clk_set_rate(clko2, rate);
++	clk_enable(clko2);
++
++	pm_power_off = mx6_snvs_poweroff;
++	imx6q_add_busfreq();
++
++	imx6q_add_pcie(&mx6_qmx6_pcie_data);
++}
++
++extern void __iomem *twd_base;
++static void __init mx6_qmx6_timer_init(void)
++{
++	struct clk *uart_clk;
++#ifdef CONFIG_LOCAL_TIMERS
++	twd_base = ioremap(LOCAL_TWD_ADDR, SZ_256);
++	BUG_ON(!twd_base);
++#endif
++	mx6_clocks_init(32768, 24000000, 0, 0);
++
++	uart_clk = clk_get_sys("imx-uart.0", NULL);
++	early_console_setup(UART2_BASE_ADDR, uart_clk);
++}
++
++static struct sys_timer mx6_qmx6_timer = {
++	.init   = mx6_qmx6_timer_init,
++};
++
++static void __init mx6q_qmx6_reserve(void)
++{
++	phys_addr_t phys;
++	int i;
++
++	if (imx6q_gpu_pdata.reserved_mem_size) {
++		phys = memblock_alloc_base(imx6q_gpu_pdata.reserved_mem_size,
++					   SZ_4K, SZ_1G);
++		memblock_free(phys, imx6q_gpu_pdata.reserved_mem_size);
++		memblock_remove(phys, imx6q_gpu_pdata.reserved_mem_size);
++		imx6q_gpu_pdata.reserved_mem_base = phys;
++	}
++
++	for (i = 0; i < ARRAY_SIZE(qmx6_fb_data); i++)
++		if (qmx6_fb_data[i].res_size[0]) {
++			/* reserve for background buffer */
++			phys = memblock_alloc(qmx6_fb_data[i].res_size[0],
++						SZ_4K);
++			memblock_free(phys, qmx6_fb_data[i].res_size[0]);
++			memblock_remove(phys, qmx6_fb_data[i].res_size[0]);
++			qmx6_fb_data[i].res_base[0] = phys;
++		}
++}
++
++/*
++ * initialize __mach_desc_MX6Q_QMX6 data structure.
++ */
++MACHINE_START(MX6Q_QMX6, "Congatec i.MX 6Quad QMX6 Board")
++	/* Maintainer: congatec */
++	.boot_params = MX6_PHYS_OFFSET + 0x100,
++	.fixup = fixup_mxc_board,
++	.map_io = mx6_map_io,
++	.init_irq = mx6_init_irq,
++	.init_machine = mx6_qmx6_board_init,
++	.timer = &mx6_qmx6_timer,
++	.reserve = mx6q_qmx6_reserve,
++MACHINE_END
+diff --git a/arch/arm/mach-mx6/board-mx6q_qmx6.h b/arch/arm/mach-mx6/board-mx6q_qmx6.h
+new file mode 100644
+index 0000000..2d568ff
+--- /dev/null
++++ b/arch/arm/mach-mx6/board-mx6q_qmx6.h
+@@ -0,0 +1,199 @@
++/*
++ * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++
++ * You should have received a copy of the GNU General Public License along
++ * with this program; if not, write to the Free Software Foundation, Inc.,
++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
++ */
++
++#ifndef _BOARD_MX6Q_QMX6_H
++#define _BOARD_MX6Q_QMX6_H
++#include <mach/iomux-mx6q.h>
++
++static iomux_v3_cfg_t mx6q_qmx6_pads[] = {
++	/* AUDMUX */	
++	MX6Q_PAD_DI0_PIN4__AUDMUX_AUD6_RXD,
++	MX6Q_PAD_DI0_PIN15__AUDMUX_AUD6_TXC,
++	MX6Q_PAD_DI0_PIN2__AUDMUX_AUD6_TXD,
++	MX6Q_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS,
++
++	/* CAN1  */
++	MX6Q_PAD_KEY_ROW2__CAN1_RXCAN,
++	MX6Q_PAD_KEY_COL2__CAN1_TXCAN,
++	MX6Q_PAD_GPIO_2__GPIO_1_2,		/* PCIE_WAKE_B */
++
++	/* CCM  */
++	MX6Q_PAD_GPIO_0__GPIO_1_0,		/* GPIO_0/Audio Ref. CLK */		
++
++	/* ECSPI1 */
++	MX6Q_PAD_EIM_D17__ECSPI1_MISO,
++	MX6Q_PAD_EIM_D18__ECSPI1_MOSI,
++	MX6Q_PAD_EIM_D16__ECSPI1_SCLK,
++	MX6Q_PAD_EIM_D19__GPIO_3_19,	/*SS1*/
++
++	/* ENET */
++	MX6Q_PAD_ENET_MDIO__ENET_MDIO,
++	MX6Q_PAD_ENET_MDC__ENET_MDC,
++	MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC,
++	MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0,
++	MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1,
++	MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2,
++	MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3,
++	MX6Q_PAD_RGMII_TX_CTL__ENET_RGMII_TX_CTL,
++	MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK,
++	MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC,
++	MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0,
++	MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1,
++	MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2,
++	MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3,
++	MX6Q_PAD_RGMII_RX_CTL__ENET_RGMII_RX_CTL,
++	MX6Q_PAD_ENET_TX_EN__GPIO_1_28,		/* Micrel RGMII Phy Interrupt */
++	MX6Q_PAD_EIM_D23__GPIO_3_23,		/* RGMII reset */
++
++	/* GPIO1 */
++	MX6Q_PAD_ENET_RX_ER__SPDIF_IN1,		/* SPDIF_IN */
++
++	/* GPIO2 */
++	MX6Q_PAD_NANDF_D1__GPIO_2_1,	/* J14 - Menu Button */
++	MX6Q_PAD_NANDF_D2__GPIO_2_2,	/* J14 - Back Button */
++	MX6Q_PAD_NANDF_D3__GPIO_2_3,	/* J14 - Search Button */
++	MX6Q_PAD_NANDF_D4__GPIO_2_4,	/* J14 - Home Button */
++	MX6Q_PAD_EIM_A22__GPIO_2_16,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_A21__GPIO_2_17,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_A20__GPIO_2_18,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_A19__GPIO_2_19,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_A18__GPIO_2_20,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_A17__GPIO_2_21,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_A16__GPIO_2_22,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_RW__GPIO_2_26,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_LBA__GPIO_2_27,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_EB0__GPIO_2_28,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_EB1__GPIO_2_29,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_EB3__GPIO_2_31,	/* J12 - Boot Mode Select */
++
++	/* GPIO3 */
++	MX6Q_PAD_EIM_DA0__GPIO_3_0,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_DA1__GPIO_3_1,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_DA2__GPIO_3_2,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_DA3__GPIO_3_3,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_DA4__GPIO_3_4,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_DA5__GPIO_3_5,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_DA6__GPIO_3_6,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_DA7__GPIO_3_7,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_DA8__GPIO_3_8,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_DA9__GPIO_3_9,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_DA10__GPIO_3_10,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_DA11__GPIO_3_11,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_DA12__GPIO_3_12,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_DA13__GPIO_3_13,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_DA14__GPIO_3_14,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_DA15__GPIO_3_15,	/* J12 - Boot Mode Select */
++
++	/* GPIO4 */
++	MX6Q_PAD_GPIO_19__GPIO_4_5,	/* Volume Down */
++
++	/* GPIO5 */
++	MX6Q_PAD_EIM_WAIT__GPIO_5_0,	/* J12 - Boot Mode Select */
++	MX6Q_PAD_EIM_A24__GPIO_5_4,	/* J12 - Boot Mode Select */
++
++	/* GPIO6 */
++	MX6Q_PAD_EIM_A23__GPIO_6_6,	/* J12 - Boot Mode Select */
++
++	/* GPIO7 */
++	MX6Q_PAD_GPIO_17__GPIO_7_12,	/* USB Hub Reset */
++	MX6Q_PAD_GPIO_18__GPIO_7_13,	/* Volume Up */
++
++	/* I2C1 - PRIMARY */
++	MX6Q_PAD_EIM_D21__I2C1_SCL,	/* GPIO3[21] */
++	MX6Q_PAD_EIM_D28__I2C1_SDA,	/* GPIO3[28] */
++
++	/* I2C2 - PMIC SDVO */
++	MX6Q_PAD_KEY_COL3__I2C2_SCL,	/* GPIO4[12] */
++	MX6Q_PAD_KEY_ROW3__I2C2_SDA,	/* GPIO4[13] */
++
++	/* I2C3 - Unused */
++	MX6Q_PAD_GPIO_3__I2C3_SCL,
++	MX6Q_PAD_GPIO_6__I2C3_SDA,
++
++	/* SUS_S3 */
++	MX6Q_PAD_GPIO_5__GPIO_1_5,	/* GPIO1[5] */
++
++	MX6Q_PAD_GPIO_16__GPIO_7_11,	/* GPIO7[11] */
++
++	MX6Q_PAD_GPIO_7__GPIO_1_7,		/* Display Connector GP */
++	MX6Q_PAD_GPIO_9__GPIO_1_9,		/* Display Connector GP */
++	MX6Q_PAD_NANDF_D0__GPIO_2_0,		/* Unused */
++
++	/* PWM1 */
++	MX6Q_PAD_SD1_DAT3__PWM1_PWMO,		/* GPIO1[21] */
++
++	/* PCIe RESET */
++	MX6Q_PAD_SD1_DAT2__GPIO_1_19,		/* GPIO1[19] */
++
++	/* PWM4 */
++	MX6Q_PAD_SD1_CMD__PWM4_PWMO,		/* GPIO1[18] */
++
++	/* UART1  */
++	MX6Q_PAD_CSI0_DAT10__UART1_TXD,
++	MX6Q_PAD_CSI0_DAT11__UART1_RXD,
++
++	/* UART2 for debug */
++	MX6Q_PAD_EIM_D26__UART2_TXD,
++	MX6Q_PAD_EIM_D27__UART2_RXD,
++
++	/* USBOTG ID pin */
++	MX6Q_PAD_GPIO_1__USBOTG_ID,
++
++	/* WATCHDOG */
++	MX6Q_PAD_KEY_COL4__GPIO_4_14,
++
++	/* USB OC pin */
++	// MX6Q_PAD_EIM_D30__USBOH3_USBH1_OC, TODO: to be checked
++
++	/* USDHC2 */
++	MX6Q_PAD_SD2_CLK__USDHC2_CLK,
++	MX6Q_PAD_SD2_CMD__USDHC2_CMD,
++	MX6Q_PAD_SD2_DAT0__USDHC2_DAT0,
++	MX6Q_PAD_SD2_DAT1__USDHC2_DAT1,
++	MX6Q_PAD_SD2_DAT2__USDHC2_DAT2,
++	MX6Q_PAD_SD2_DAT3__USDHC2_DAT3,
++	MX6Q_PAD_GPIO_4__GPIO_1_4,		/* Card Detect */
++
++	/* USDHC3 */
++	MX6Q_PAD_SD3_CLK__USDHC3_CLK_50MHZ,
++	MX6Q_PAD_SD3_CMD__USDHC3_CMD_50MHZ,
++	MX6Q_PAD_SD3_DAT0__USDHC3_DAT0_50MHZ,
++	MX6Q_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ,
++	MX6Q_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ,
++	MX6Q_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ,
++	MX6Q_PAD_SD3_DAT4__USDHC3_DAT4_50MHZ,
++	MX6Q_PAD_SD3_DAT5__USDHC3_DAT5_50MHZ,
++	MX6Q_PAD_SD3_DAT6__USDHC3_DAT6_50MHZ,
++	MX6Q_PAD_SD3_DAT7__USDHC3_DAT7_50MHZ,
++
++	/* USDHC4 */
++	MX6Q_PAD_SD4_CLK__USDHC4_CLK_50MHZ,
++	MX6Q_PAD_SD4_CMD__USDHC4_CMD_50MHZ,
++	MX6Q_PAD_SD4_DAT0__USDHC4_DAT0_50MHZ,
++	MX6Q_PAD_SD4_DAT1__USDHC4_DAT1_50MHZ,
++	MX6Q_PAD_SD4_DAT2__USDHC4_DAT2_50MHZ,
++	MX6Q_PAD_SD4_DAT3__USDHC4_DAT3_50MHZ,
++	MX6Q_PAD_SD4_DAT4__USDHC4_DAT4_50MHZ,
++	MX6Q_PAD_SD4_DAT5__USDHC4_DAT5_50MHZ,
++	MX6Q_PAD_SD4_DAT6__USDHC4_DAT6_50MHZ,
++	MX6Q_PAD_SD4_DAT7__USDHC4_DAT7_50MHZ,
++	MX6Q_PAD_NANDF_D6__GPIO_2_6,		/* SD4_CD */
++	MX6Q_PAD_NANDF_D7__GPIO_2_7,		/* SD4_WP */
++};
++
++#endif
+diff --git a/arch/arm/mach-mx6/mx6q_qmx6_pmic_pfuze100.c b/arch/arm/mach-mx6/mx6q_qmx6_pmic_pfuze100.c
+new file mode 100644
+index 0000000..492eaec
+--- /dev/null
++++ b/arch/arm/mach-mx6/mx6q_qmx6_pmic_pfuze100.c
+@@ -0,0 +1,422 @@
++/*
++ * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
++ */
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/err.h>
++#include <linux/i2c.h>
++#include <linux/gpio.h>
++#include <linux/regulator/machine.h>
++#include <linux/mfd/pfuze.h>
++#include <mach/irqs.h>
++
++/*
++ * Convenience conversion.
++ * Here atm, maybe there is somewhere better for this.
++ */
++#define mV_to_uV(mV) (mV * 1000)
++#define uV_to_mV(uV) (uV / 1000)
++#define V_to_uV(V) (mV_to_uV(V * 1000))
++#define uV_to_V(uV) (uV_to_mV(uV) / 1000)
++
++#define PFUZE100_I2C_DEVICE_NAME  "pfuze100"
++/* 7-bit I2C bus slave address */
++#define PFUZE100_I2C_ADDR         (0x08)
++ /*SWBST*/
++#define PFUZE100_SW1ASTANDBY	33
++#define PFUZE100_SW1ASTANDBY_STBY_VAL	(0x18)
++#define PFUZE100_SW1ASTANDBY_STBY_M	(0x3f<<0)
++#define PFUZE100_SW1BSTANDBY   40
++#define PFUZE100_SW1BSTANDBY_STBY_VAL  (0x18)
++#define PFUZE100_SW1BSTANDBY_STBY_M    (0x3f<<0)
++#define PFUZE100_SW1CSTANDBY	47
++#define PFUZE100_SW1CSTANDBY_STBY_VAL	(0x18)
++#define PFUZE100_SW1CSTANDBY_STBY_M	(0x3f<<0)
++#define PFUZE100_SW2STANDBY     54
++#define PFUZE100_SW2STANDBY_STBY_VAL    0x0
++#define PFUZE100_SW2STANDBY_STBY_M      (0x3f<<0)
++#define PFUZE100_SW3ASTANDBY    61
++#define PFUZE100_SW3ASTANDBY_STBY_VAL   0x0
++#define PFUZE100_SW3ASTANDBY_STBY_M     (0x3f<<0)
++#define PFUZE100_SW3BSTANDBY    68
++#define PFUZE100_SW3BSTANDBY_STBY_VAL   0x0
++#define PFUZE100_SW3BSTANDBY_STBY_M     (0x3f<<0)
++#define PFUZE100_SW4STANDBY     75
++#define PFUZE100_SW4STANDBY_STBY_VAL    0
++#define PFUZE100_SW4STANDBY_STBY_M      (0x3f<<0)
++#define PFUZE100_SWBSTCON1	102
++#define PFUZE100_SWBSTCON1_SWBSTMOD_VAL	(0x1<<2)
++#define PFUZE100_SWBSTCON1_SWBSTMOD_M	(0x3<<2)
++
++
++static struct regulator_consumer_supply sw2_consumers[] = {
++	{
++		.supply	   = "MICVDD",
++		.dev_name   = "0-001a",
++	}
++};
++static struct regulator_consumer_supply sw4_consumers[] = {
++       {
++	.supply = "AUD_1V8",
++	}
++};
++static struct regulator_consumer_supply swbst_consumers[] = {
++       {
++	.supply = "SWBST_5V",
++	}
++};
++static struct regulator_consumer_supply vgen1_consumers[] = {
++       {
++	.supply = "VGEN1_1V5",
++	}
++};
++static struct regulator_consumer_supply vgen2_consumers[] = {
++       {
++	.supply = "VGEN2_1V5",
++	}
++};
++static struct regulator_consumer_supply vgen4_consumers[] = {
++	{
++		.supply	   = "DBVDD",
++		.dev_name   = "0-001a",
++	},
++	{
++		.supply	   = "AVDD",
++		.dev_name   = "0-001a",
++	},
++	{
++		.supply	   = "DCVDD",
++		.dev_name   = "0-001a",
++	},
++	{
++		.supply	   = "CPVDD",
++		.dev_name   = "0-001a",
++	},
++	{
++		.supply	   = "PLLVDD",
++		.dev_name   = "0-001a",
++	}
++};
++static struct regulator_consumer_supply vgen5_consumers[] = {
++       {
++	.supply = "VGEN5_2V8",
++	}
++};
++static struct regulator_consumer_supply vgen6_consumers[] = {
++       {
++	.supply = "VGEN6_3V3",
++	}
++};
++
++static struct regulator_init_data sw1a_init = {
++	.constraints = {
++			.name = "PFUZE100_SW1A",
++#ifdef PFUZE100_FIRST_VERSION
++			.min_uV = 650000,
++			.max_uV = 1437500,
++#else
++			.min_uV = 300000,
++			.max_uV = 1875000,
++#endif
++			.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
++			.valid_modes_mask = 0,
++			.boot_on = 1,
++			.always_on = 1,
++			},
++};
++
++static struct regulator_init_data sw1b_init = {
++	.constraints = {
++			.name = "PFUZE100_SW1B",
++			.min_uV = 300000,
++			.max_uV = 1875000,
++			.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
++			.valid_modes_mask = 0,
++			.always_on = 1,
++			.boot_on = 1,
++			},
++};
++
++static struct regulator_init_data sw1c_init = {
++	.constraints = {
++			.name = "PFUZE100_SW1C",
++			.min_uV = 300000,
++			.max_uV = 1875000,
++			.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
++			.valid_modes_mask = 0,
++			.always_on = 1,
++			.boot_on = 1,
++			},
++};
++
++static struct regulator_init_data sw2_init = {
++	.constraints = {
++			.name = "PFUZE100_SW2",
++#if PFUZE100_SW2_VOL6
++			.min_uV = 800000,
++			.max_uV = 3950000,
++#else
++			.min_uV = 400000,
++			.max_uV = 1975000,
++#endif
++			.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
++			.valid_modes_mask = 0,
++			.always_on = 1,
++			.boot_on = 1,
++			},
++	.num_consumer_supplies = ARRAY_SIZE(sw2_consumers),
++	.consumer_supplies = sw2_consumers,
++};
++
++static struct regulator_init_data sw3a_init = {
++	.constraints = {
++			.name = "PFUZE100_SW3A",
++#if PFUZE100_SW3_VOL6
++			.min_uV = 800000,
++			.max_uV = 3950000,
++#else
++			.min_uV = 400000,
++			.max_uV = 1975000,
++#endif
++			.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
++			.valid_modes_mask = 0,
++			.always_on = 1,
++			.boot_on = 1,
++			},
++};
++
++static struct regulator_init_data sw3b_init = {
++	.constraints = {
++			.name = "PFUZE100_SW3B",
++#if PFUZE100_SW3_VOL6
++			.min_uV = 800000,
++			.max_uV = 3950000,
++#else
++			.min_uV = 400000,
++			.max_uV = 1975000,
++#endif
++			.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
++			.valid_modes_mask = 0,
++			.always_on = 1,
++			.boot_on = 1,
++			},
++};
++
++static struct regulator_init_data sw4_init = {
++	.constraints = {
++			.name = "PFUZE100_SW4",
++#if PFUZE100_SW4_VOL6
++			.min_uV = 800000,
++			.max_uV = 3950000,
++#else
++			.min_uV = 400000,
++			.max_uV = 1975000,
++#endif
++			.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
++			.valid_modes_mask = 0,
++			},
++	.num_consumer_supplies = ARRAY_SIZE(sw4_consumers),
++	.consumer_supplies = sw4_consumers,
++};
++
++static struct regulator_init_data swbst_init = {
++	.constraints = {
++			.name = "PFUZE100_SWBST",
++			.min_uV = 5000000,
++			.max_uV = 5150000,
++			.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
++			.valid_modes_mask = 0,
++			.always_on = 1,
++			.boot_on = 1,
++			},
++	.num_consumer_supplies = ARRAY_SIZE(swbst_consumers),
++	.consumer_supplies = swbst_consumers,
++};
++
++static struct regulator_init_data vsnvs_init = {
++	.constraints = {
++			.name = "PFUZE100_VSNVS",
++			.min_uV = 1200000,
++			.max_uV = 3000000,
++			.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
++			.valid_modes_mask = 0,
++			.always_on = 1,
++			.boot_on = 1,
++			},
++};
++
++static struct regulator_init_data vrefddr_init = {
++	.constraints = {
++			.name = "PFUZE100_VREFDDR",
++			.always_on = 1,
++			.boot_on = 1,
++			},
++};
++
++static struct regulator_init_data vgen1_init = {
++	.constraints = {
++			.name = "PFUZE100_VGEN1",
++#ifdef PFUZE100_FIRST_VERSION
++			.min_uV = 1200000,
++			.max_uV = 1550000,
++#else
++			.min_uV = 800000,
++			.max_uV = 1550000,
++#endif
++			.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
++			REGULATOR_CHANGE_STATUS,
++			.valid_modes_mask = 0,
++			},
++	.num_consumer_supplies = ARRAY_SIZE(vgen1_consumers),
++	.consumer_supplies = vgen1_consumers,
++};
++
++static struct regulator_init_data vgen2_init = {
++	.constraints = {
++			.name = "PFUZE100_VGEN2",
++#ifdef PFUZE100_FIRST_VERSION
++			.min_uV = 1200000,
++			.max_uV = 1550000,
++#else
++			.min_uV = 800000,
++			.max_uV = 1550000,
++#endif
++			.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
++			REGULATOR_CHANGE_STATUS,
++			.valid_modes_mask = 0,
++			},
++	.num_consumer_supplies = ARRAY_SIZE(vgen2_consumers),
++	.consumer_supplies = vgen2_consumers,
++
++};
++
++static struct regulator_init_data vgen3_init = {
++	.constraints = {
++			.name = "PFUZE100_VGEN3",
++			.min_uV = 1800000,
++			.max_uV = 3300000,
++			.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
++			REGULATOR_CHANGE_STATUS,
++			.valid_modes_mask = 0,
++			},
++};
++
++static struct regulator_init_data vgen4_init = {
++	.constraints = {
++			.name = "PFUZE100_VGEN4",
++			.min_uV = 1800000,
++			.max_uV = 3300000,
++			.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
++			REGULATOR_CHANGE_STATUS,
++			.valid_modes_mask = 0,
++			.always_on = 1,
++			.boot_on = 1,
++			},
++	.num_consumer_supplies = ARRAY_SIZE(vgen4_consumers),
++	.consumer_supplies = vgen4_consumers,
++};
++
++static struct regulator_init_data vgen5_init = {
++	.constraints = {
++			.name = "PFUZE100_VGEN5",
++			.min_uV = 1800000,
++			.max_uV = 3300000,
++			.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
++			REGULATOR_CHANGE_STATUS,
++			.valid_modes_mask = 0,
++			.always_on = 1,
++			.boot_on = 1,
++			},
++	.num_consumer_supplies = ARRAY_SIZE(vgen5_consumers),
++	.consumer_supplies = vgen5_consumers,
++};
++
++static struct regulator_init_data vgen6_init = {
++	.constraints = {
++			.name = "PFUZE100_VGEN6",
++			.min_uV = 1800000,
++			.max_uV = 3300000,
++			.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
++			REGULATOR_CHANGE_STATUS,
++			.valid_modes_mask = 0,
++			},
++	.num_consumer_supplies = ARRAY_SIZE(vgen6_consumers),
++	.consumer_supplies = vgen6_consumers,
++};
++
++static int pfuze100_init(struct mc_pfuze *pfuze)
++{
++	int ret;
++	ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1ASTANDBY,
++			    PFUZE100_SW1ASTANDBY_STBY_M,
++			    PFUZE100_SW1ASTANDBY_STBY_VAL);
++	if (ret)
++		goto err;
++	ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1BSTANDBY,
++			    PFUZE100_SW1BSTANDBY_STBY_M,
++			    PFUZE100_SW1BSTANDBY_STBY_VAL);
++	if (ret)
++		goto err;
++	ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1CSTANDBY,
++			    PFUZE100_SW1CSTANDBY_STBY_M,
++			    PFUZE100_SW1CSTANDBY_STBY_VAL);
++	if (ret)
++		goto err;
++	return 0;
++err:
++	printk(KERN_ERR "pfuze100 init error!\n");
++	return -1;
++}
++
++static struct pfuze_regulator_init_data mx6q_qmx6_pfuze100_regulators[] = {
++	{.id = PFUZE100_SW1A,	.init_data = &sw1a_init},
++	{.id = PFUZE100_SW1B,	.init_data = &sw1b_init},
++	{.id = PFUZE100_SW1C,	.init_data = &sw1c_init},
++	{.id = PFUZE100_SW2,	.init_data = &sw2_init},
++	{.id = PFUZE100_SW3A,	.init_data = &sw3a_init},
++	{.id = PFUZE100_SW3B,	.init_data = &sw3b_init},
++	{.id = PFUZE100_SW4,	.init_data = &sw4_init},
++	{.id = PFUZE100_SWBST,	.init_data = &swbst_init},
++	{.id = PFUZE100_VSNVS,	.init_data = &vsnvs_init},
++	{.id = PFUZE100_VREFDDR,	.init_data = &vrefddr_init},
++	{.id = PFUZE100_VGEN1,	.init_data = &vgen1_init},
++	{.id = PFUZE100_VGEN2,	.init_data = &vgen2_init},
++	{.id = PFUZE100_VGEN3,	.init_data = &vgen3_init},
++	{.id = PFUZE100_VGEN4,	.init_data = &vgen4_init},
++	{.id = PFUZE100_VGEN5,	.init_data = &vgen5_init},
++	{.id = PFUZE100_VGEN6,	.init_data = &vgen6_init},
++};
++
++static struct pfuze_platform_data pfuze100_plat = {
++	.flags = PFUZE_USE_REGULATOR,
++	.num_regulators = ARRAY_SIZE(mx6q_qmx6_pfuze100_regulators),
++	.regulators = mx6q_qmx6_pfuze100_regulators,
++	.pfuze_init = pfuze100_init,
++};
++
++static struct i2c_board_info __initdata pfuze100_i2c_device = {
++	I2C_BOARD_INFO(PFUZE100_I2C_DEVICE_NAME, PFUZE100_I2C_ADDR),
++	.platform_data = &pfuze100_plat,
++};
++
++int __init mx6q_qmx6_init_pfuze100(u32 int_gpio)
++{
++	pfuze100_i2c_device.irq = gpio_to_irq(int_gpio); /*update INT gpio */
++	return i2c_register_board_info(1, &pfuze100_i2c_device, 1);
++}
+diff --git a/arch/arm/plat-mxc/include/mach/esdhc.h b/arch/arm/plat-mxc/include/mach/esdhc.h
+index bb15db1..ee4460d 100644
+--- a/arch/arm/plat-mxc/include/mach/esdhc.h
++++ b/arch/arm/plat-mxc/include/mach/esdhc.h
+@@ -36,5 +36,6 @@ struct esdhc_platform_data {
+ 	unsigned int keep_power_at_suspend;
+ 	unsigned int delay_line;
+ 	int (*platform_pad_change)(unsigned int index, int clock);
++  	unsigned int force_write_access;
+ };
+ #endif /* __ASM_ARCH_IMX_ESDHC_H */
+diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
+index 88210d9..a91e401 100644
+--- a/arch/arm/tools/mach-types
++++ b/arch/arm/tools/mach-types
+@@ -1118,5 +1118,5 @@ mx6q_sabrelite		MACH_MX6Q_SABRELITE	MX6Q_SABRELITE		3769
+ mx6q_sabresd		MACH_MX6Q_SABRESD	MX6Q_SABRESD		3980
+ mx6q_arm2		MACH_MX6Q_ARM2		MX6Q_ARM2		3837
+ mx6sl_arm2		MACH_MX6SL_ARM2		MX6SL_ARM2		4091
++mx6q_qmx6		MACH_MX6Q_QMX6		MX6Q_QMX6		4122
+ mx6sl_evk		MACH_MX6SL_EVK		MX6SL_EVK		4307
+-
+diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
+index 35fd825..8a9f1c8 100644
+--- a/drivers/mmc/host/sdhci-esdhc-imx.c
++++ b/drivers/mmc/host/sdhci-esdhc-imx.c
+@@ -719,6 +719,9 @@ static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host)
+ {
+ 	struct esdhc_platform_data *boarddata = host->mmc->parent->platform_data;
+ 
++	if (boarddata->force_write_access)
++		return 0;
++
+ 	if (boarddata && gpio_is_valid(boarddata->wp_gpio))
+ 		return gpio_get_value(boarddata->wp_gpio);
+ 	else
+diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c
+index b3e28ec..b1d89e3 100644
+--- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c
++++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command_vg.c
+@@ -1108,7 +1108,7 @@ _AllocateCommandBuffer(
+         gctUINT requestedSize;
+         gctUINT allocationSize;
+         gctUINT32 address = 0;
+-        gcsCMDBUFFER_PTR commandBuffer;
++        gcsCMDBUFFER_PTR commandBuffer = ((void *) 0);
+         gctUINT8_PTR endCommand;
+ 
+         /* Determine the aligned header size. */
+diff --git a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c
+index dc39b39..b681a65 100644
+--- a/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c
++++ b/drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_video_memory.c
+@@ -1662,7 +1662,7 @@ gckVIDMEM_Lock(
+     gctBOOL acquired = gcvFALSE;
+     gctBOOL locked = gcvFALSE;
+     gckOS os = gcvNULL;
+-    gctBOOL needMapping;
++    gctBOOL needMapping = gcvFALSE;
+     gctUINT32 baseAddress;
+ 
+     gcmkHEADER_ARG("Node=0x%x", Node);
+diff --git a/drivers/net/fec.c b/drivers/net/fec.c
+index 4b5818e..65d1f70 100755
+--- a/drivers/net/fec.c
++++ b/drivers/net/fec.c
+@@ -1070,6 +1070,7 @@ static int fec_enet_mii_init(struct platform_device *pdev)
+ 	const struct platform_device_id *id_entry =
+ 				platform_get_device_id(fep->pdev);
+ 	int err = -ENXIO, i;
++	struct clk *bus_clk;
+ 
+ 	/*
+ 	 * The dual fec interfaces are not equivalent with enet-mac.
+@@ -1098,8 +1099,10 @@ static int fec_enet_mii_init(struct platform_device *pdev)
+ 	/*
+ 	 * Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed)
+ 	 */
+-	fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk),
+-					(FEC_ENET_MII_CLK << 2)) << 1;
++
++	// sml 2012-11-29: MII Speed derived from 66MHz ipg-clk
++	bus_clk = clk_get(NULL, "ipg_clk");
++	fep->phy_speed = (DIV_ROUND_UP(clk_get_rate(bus_clk),FEC_ENET_MII_CLK))-1;
+ 
+ 	/* set hold time to 2 internal clock cycle */
+ 	if (cpu_is_mx6q() || cpu_is_mx6dl())
+diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
+index 80747d2..cd690e5 100644
+--- a/drivers/net/phy/micrel.c
++++ b/drivers/net/phy/micrel.c
+@@ -187,6 +187,21 @@ static struct phy_driver ksz9021_driver = {
+ 	.driver		= { .owner = THIS_MODULE, },
+ };
+ 
++static struct phy_driver ksz9031_driver = {
++	.phy_id		= PHY_ID_KSZ9031,
++	.phy_id_mask	= 0x00ffffff,
++	.name		= "Micrel KSZ9031 Gigabit PHY",
++	.features	= (PHY_GBIT_FEATURES | SUPPORTED_Pause
++				| SUPPORTED_Asym_Pause),
++	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
++	.config_init	= kszphy_config_init,
++	.config_aneg	= genphy_config_aneg,
++	.read_status	= genphy_read_status,
++	.ack_interrupt	= kszphy_ack_interrupt,
++	.config_intr	= ksz9021_config_intr,
++	.driver		= { .owner = THIS_MODULE, },
++};
++
+ static int __init ksphy_init(void)
+ {
+ 	int ret;
+@@ -209,8 +224,15 @@ static int __init ksphy_init(void)
+ 	if (ret)
+ 		goto err5;
+ 
++	ret = phy_driver_register(&ksz9031_driver);
++	if (ret)
++		goto err6;
++
++		
+ 	return 0;
+ 
++err6:
++	phy_driver_unregister(&ksz9031_driver);
+ err5:
+ 	phy_driver_unregister(&ks8041_driver);
+ err4:
+@@ -230,6 +252,7 @@ static void __exit ksphy_exit(void)
+ 	phy_driver_unregister(&ksz9021_driver);
+ 	phy_driver_unregister(&ks8041_driver);
+ 	phy_driver_unregister(&ks8051_driver);
++	phy_driver_unregister(&ksz9031_driver);
+ }
+ 
+ module_init(ksphy_init);
+@@ -241,6 +264,7 @@ MODULE_LICENSE("GPL");
+ 
+ static struct mdio_device_id __maybe_unused micrel_tbl[] = {
+ 	{ PHY_ID_KSZ9021, 0x00ffffff },
++	{ PHY_ID_KSZ9031, 0x00ffffff },
+ 	{ PHY_ID_KS8001, 0x00ffffff },
+ 	{ PHY_ID_KS8737, 0x00ffffff },
+ 	{ PHY_ID_KS8041, 0x00ffffff },
+diff --git a/include/linux/micrel_phy.h b/include/linux/micrel_phy.h
+index dd8da34..3222193 100644
+--- a/include/linux/micrel_phy.h
++++ b/include/linux/micrel_phy.h
+@@ -4,6 +4,7 @@
+ #define MICREL_PHY_ID_MASK	0x00fffff0
+ 
+ #define PHY_ID_KSZ9021		0x00221611
++#define PHY_ID_KSZ9031		0x00221621
+ #define PHY_ID_KS8737		0x00221720
+ #define PHY_ID_KS8041		0x00221510
+ #define PHY_ID_KS8051		0x00221550
+diff --git a/sound/soc/imx/Kconfig b/sound/soc/imx/Kconfig
+index 72d8550..f60180b 100644
+--- a/sound/soc/imx/Kconfig
++++ b/sound/soc/imx/Kconfig
+@@ -53,7 +53,7 @@ config SND_SOC_PHYCORE_AC97
+ config SND_SOC_IMX_SGTL5000
+ 	tristate "SoC Audio support for i.MX boards with sgtl5000"
+ 	depends on I2C && (MACH_MX35_3DS || MACH_MX51_BABBAGE \
+-			|| MACH_MX6Q_SABRELITE || MACH_MX6Q_ARM2)
++			|| MACH_MX6Q_SABRELITE || MACH_MX6Q_ARM2 || MACH_MX6Q_QMX6)
+ 	select SND_SOC_SGTL5000
+ 	select SND_MXC_SOC_MX2
+ 	help
+diff --git a/sound/soc/imx/imx-sgtl5000.c b/sound/soc/imx/imx-sgtl5000.c
+index 9325dc8..a1b87c6 100644
+--- a/sound/soc/imx/imx-sgtl5000.c
++++ b/sound/soc/imx/imx-sgtl5000.c
+@@ -363,11 +363,11 @@ static int __init imx_sgtl5000_init(void)
+ 	if (ret)
+ 		return -ENOMEM;
+ 
+-	if (machine_is_mx35_3ds() || machine_is_mx6q_sabrelite())
++	if (machine_is_mx35_3ds() || machine_is_mx6q_sabrelite() || machine_is_mx6q_qmx6())
+ 		imx_sgtl5000_dai[0].codec_name = "sgtl5000.0-000a";
+-	else
++	else 
+ 		imx_sgtl5000_dai[0].codec_name = "sgtl5000.1-000a";
+-
++	
+ 	imx_sgtl5000_snd_device = platform_device_alloc("soc-audio", 1);
+ 	if (!imx_sgtl5000_snd_device)
+ 		return -ENOMEM;
diff --git a/recipes-kernel/linux/linux-imx-3.0.35/cgtqmx6/defconfig b/recipes-kernel/linux/linux-imx-3.0.35/cgtqmx6/defconfig
new file mode 100644
index 0000000..a8b7c9d
--- /dev/null
+++ b/recipes-kernel/linux/linux-imx-3.0.35/cgtqmx6/defconfig
@@ -0,0 +1,2722 @@ 
+#
+# Automatically generated make config: don't edit
+# Linux/arm 3.0.35 Kernel Configuration
+#
+CONFIG_ARM=y
+CONFIG_HAVE_PWM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_HAVE_SCHED_CLOCK=y
+CONFIG_GENERIC_GPIO=y
+# CONFIG_ARCH_USES_GETTIMEOFFSET is not set
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+CONFIG_KTIME_SCALAR=y
+CONFIG_HAVE_PROC_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_LOCKBREAK=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_ARCH_HAS_CPUFREQ=y
+CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ZONE_DMA=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_FIQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+# CONFIG_ARM_PATCH_PHYS_VIRT is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_HAVE_IRQ_WORK=y
+CONFIG_IRQ_WORK=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_DEFAULT_HOSTNAME="CongatecQmx6"
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_FHANDLE is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_GENERIC_HARDIRQS=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_HAVE_SPARSE_IRQ=y
+CONFIG_GENERIC_IRQ_SHOW=y
+# CONFIG_SPARSE_IRQ is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_PREEMPT_RCU=y
+CONFIG_PREEMPT_RCU=y
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_RCU_BOOST is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EXPERT=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_EMBEDDED=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+CONFIG_PERF_EVENTS=y
+# CONFIG_PERF_COUNTERS is not set
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_USE_GENERIC_SMP_HELPERS=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_HW_BREAKPOINT=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_STOP_MACHINE=y
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_VEXPRESS is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CNS3XXX is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+CONFIG_ARCH_MXC=y
+# CONFIG_ARCH_MXS is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_LPC32XX is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_NUC93X is not set
+# CONFIG_ARCH_TEGRA is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_SHMOBILE is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P64X0 is not set
+# CONFIG_ARCH_S5PC100 is not set
+# CONFIG_ARCH_S5PV210 is not set
+# CONFIG_ARCH_EXYNOS4 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_TCC_926 is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_PLAT_SPEAR is not set
+# CONFIG_ARCH_VT8500 is not set
+CONFIG_GPIO_PCA953X=y
+# CONFIG_KEYBOARD_GPIO_POLLED is not set
+CONFIG_IMX_HAVE_PLATFORM_DMA=y
+CONFIG_IMX_HAVE_PLATFORM_FEC=y
+CONFIG_IMX_HAVE_PLATFORM_FLEXCAN=y
+CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC=y
+CONFIG_IMX_HAVE_PLATFORM_GPMI_NFC=y
+CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_SNVS_RTC=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_CAAM=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_I2C=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_SSI=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_UART=y
+CONFIG_IMX_HAVE_PLATFORM_MXC_EHCI=y
+CONFIG_IMX_HAVE_PLATFORM_MXC_PWM=y
+CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX=y
+CONFIG_IMX_HAVE_PLATFORM_SPI_IMX=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_IPUV3=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_VPU=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_DVFS=y
+CONFIG_IMX_HAVE_PLATFORM_AHCI=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_OCOTP=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_VIIM=y
+CONFIG_IMX_HAVE_PLATFORM_LDB=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_SPDIF=y
+CONFIG_IMX_HAVE_PLATFORM_VIV_GPU=y
+CONFIG_IMX_HAVE_PLATFORM_MXC_HDMI=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_ANATOP_THERMAL=y
+CONFIG_IMX_HAVE_PLATFORM_FSL_OTG=y
+CONFIG_IMX_HAVE_PLATFORM_FSL_USB_WAKEUP=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_PM=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_ASRC=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_MIPI_CSI2=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_VDOA=y
+CONFIG_IMX_HAVE_PLATFORM_IMX_PCIE=y
+
+#
+# Freescale MXC Implementations
+#
+# CONFIG_ARCH_MX1 is not set
+# CONFIG_ARCH_MX2 is not set
+# CONFIG_ARCH_MX25 is not set
+# CONFIG_ARCH_MX3 is not set
+# CONFIG_ARCH_MX503 is not set
+# CONFIG_ARCH_MX51 is not set
+CONFIG_ARCH_MX6=y
+CONFIG_ARCH_MX6Q=y
+CONFIG_FORCE_MAX_ZONEORDER=14
+CONFIG_SOC_IMX6Q=y
+# CONFIG_MACH_MX6Q_ARM2 is not set
+# CONFIG_MACH_MX6SL_ARM2 is not set
+# CONFIG_MACH_MX6SL_EVK is not set
+# CONFIG_MACH_MX6Q_SABRELITE is not set
+CONFIG_MACH_MX6Q_QMX6=y
+# CONFIG_MACH_MX6Q_SABRESD is not set
+# CONFIG_MACH_MX6Q_SABREAUTO is not set
+
+#
+# MX6 Options:
+#
+# CONFIG_IMX_PCIE is not set
+# CONFIG_USB_EHCI_ARC_H1 is not set
+# CONFIG_USB_FSL_ARC_OTG is not set
+# CONFIG_MX6_INTER_LDO_BYPASS is not set
+# CONFIG_MX6_CLK_FOR_BOOTUI_TRANS is not set
+CONFIG_ISP1504_MXC=y
+# CONFIG_MXC_IRQ_PRIOR is not set
+CONFIG_MXC_PWM=y
+# CONFIG_MXC_DEBUG_BOARD is not set
+CONFIG_MXC_REBOOT_MFGMODE=y
+# CONFIG_MXC_REBOOT_ANDROID_CMD is not set
+CONFIG_ARCH_MXC_IOMUX_V3=y
+CONFIG_ARCH_MXC_AUDMUX_V2=y
+CONFIG_IRAM_ALLOC=y
+CONFIG_CLK_DEBUG=y
+CONFIG_DMA_ZONE_SIZE=184
+
+#
+# System MMU
+#
+
+#
+# Processor Type
+#
+CONFIG_CPU_V7=y
+CONFIG_CPU_32v6K=y
+CONFIG_CPU_32v7=y
+CONFIG_CPU_ABRT_EV7=y
+CONFIG_CPU_PABRT_V7=y
+CONFIG_CPU_CACHE_V7=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V7=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_ARM_THUMBEE is not set
+# CONFIG_SWP_EMULATE is not set
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_OUTER_CACHE=y
+CONFIG_OUTER_CACHE_SYNC=y
+CONFIG_CACHE_L2X0=y
+CONFIG_CACHE_PL310=y
+CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_ARM_DMA_MEM_BUFFERABLE=y
+CONFIG_CPU_HAS_PMU=y
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+# CONFIG_ARM_ERRATA_742230 is not set
+# CONFIG_ARM_ERRATA_742231 is not set
+# CONFIG_PL310_ERRATA_588369 is not set
+# CONFIG_ARM_ERRATA_720789 is not set
+# CONFIG_PL310_ERRATA_727915 is not set
+CONFIG_ARM_ERRATA_743622=y
+CONFIG_ARM_ERRATA_751472=y
+# CONFIG_ARM_ERRATA_753970 is not set
+CONFIG_ARM_ERRATA_754322=y
+# CONFIG_ARM_ERRATA_754327 is not set
+CONFIG_ARM_GIC=y
+
+#
+# Bus support
+#
+CONFIG_ARM_AMBA=y
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+CONFIG_ARM_ERRATA_764369=y
+# CONFIG_PL310_ERRATA_769419 is not set
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_SMP=y
+CONFIG_SMP_ON_UP=y
+CONFIG_HAVE_ARM_SCU=y
+CONFIG_HAVE_ARM_TWD=y
+# CONFIG_VMSPLIT_3G is not set
+CONFIG_VMSPLIT_2G=y
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_NR_CPUS=4
+CONFIG_HOTPLUG_CPU=y
+CONFIG_LOCAL_TIMERS=y
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+# CONFIG_THUMB2_KERNEL is not set
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_HAVE_ARCH_PFN_VALID=y
+CONFIG_HIGHMEM=y
+# CONFIG_HIGHPTE is not set
+CONFIG_HW_PERF_EVENTS=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_COMPACTION=y
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_KSM=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+# CONFIG_CLEANCACHE is not set
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_CC_STACKPROTECTOR is not set
+# CONFIG_DEPRECATED_PARAM_STRUCT is not set
+
+#
+# Boot options
+#
+# CONFIG_USE_OF is not set
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw rootfstype=jffs2 ip=off"
+CONFIG_CMDLINE_FROM_BOOTLOADER=y
+# CONFIG_CMDLINE_EXTEND is not set
+# CONFIG_CMDLINE_FORCE is not set
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
+# CONFIG_AUTO_ZRELADDR is not set
+
+#
+# CPU Power Management
+#
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_GOV_INTERACTIVE is not set
+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_IMX=y
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_VFP=y
+CONFIG_VFPv3=y
+CONFIG_NEON=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_SUSPEND=y
+# CONFIG_PM_TEST_SUSPEND is not set
+CONFIG_SUSPEND_DEVICE_TIME_DEBUG=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_PM_SLEEP=y
+CONFIG_PM_SLEEP_SMP=y
+CONFIG_PM_RUNTIME=y
+CONFIG_PM=y
+CONFIG_PM_DEBUG=y
+# CONFIG_PM_ADVANCED_DEBUG is not set
+CONFIG_CAN_PM_TRACE=y
+CONFIG_APM_EMULATION=y
+CONFIG_PM_RUNTIME_CLK=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE_DEMUX is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+CONFIG_LLC=y
+CONFIG_LLC2=y
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+# CONFIG_BATMAN_ADV is not set
+CONFIG_RPS=y
+CONFIG_RFS_ACCEL=y
+CONFIG_XPS=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+CONFIG_CAN=y
+CONFIG_CAN_RAW=y
+CONFIG_CAN_BCM=y
+
+#
+# CAN Device Drivers
+#
+CONFIG_CAN_VCAN=y
+# CONFIG_CAN_SLCAN is not set
+CONFIG_CAN_DEV=y
+CONFIG_CAN_CALC_BITTIMING=y
+# CONFIG_CAN_MCP251X is not set
+CONFIG_HAVE_CAN_FLEXCAN=y
+CONFIG_CAN_FLEXCAN=y
+# CONFIG_CAN_SJA1000 is not set
+# CONFIG_CAN_C_CAN is not set
+
+#
+# CAN USB interfaces
+#
+# CONFIG_CAN_EMS_USB is not set
+# CONFIG_CAN_ESD_USB2 is not set
+# CONFIG_CAN_SOFTING is not set
+# CONFIG_CAN_DEBUG_DEVICES is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=y
+CONFIG_BT_L2CAP=y
+CONFIG_BT_SCO=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=y
+
+#
+# Bluetooth device drivers
+#
+CONFIG_BT_HCIBTUSB=y
+# CONFIG_BT_HCIBTSDIO is not set
+CONFIG_BT_HCIUART=y
+# CONFIG_BT_HCIUART_H4 is not set
+# CONFIG_BT_HCIUART_BCSP is not set
+CONFIG_BT_HCIUART_ATH3K=y
+# CONFIG_BT_HCIUART_LL is not set
+# CONFIG_BT_HCIBCM203X is not set
+# CONFIG_BT_HCIBPA10X is not set
+# CONFIG_BT_HCIBFUSB is not set
+CONFIG_BT_HCIVHCI=y
+# CONFIG_BT_MRVL is not set
+# CONFIG_BT_ATH3K is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_WEXT_SPY=y
+CONFIG_WEXT_PRIV=y
+CONFIG_CFG80211=y
+# CONFIG_NL80211_TESTMODE is not set
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
+# CONFIG_CFG80211_REG_DEBUG is not set
+CONFIG_CFG80211_DEFAULT_PS=y
+# CONFIG_CFG80211_DEBUGFS is not set
+# CONFIG_CFG80211_INTERNAL_REGDB is not set
+CONFIG_CFG80211_WEXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_LIB80211=y
+CONFIG_LIB80211_CRYPT_WEP=y
+CONFIG_LIB80211_CRYPT_CCMP=y
+CONFIG_LIB80211_CRYPT_TKIP=y
+# CONFIG_LIB80211_DEBUG is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_WIMAX is not set
+CONFIG_RFKILL=y
+CONFIG_RFKILL_LEDS=y
+CONFIG_RFKILL_INPUT=y
+# CONFIG_RFKILL_REGULATOR is not set
+# CONFIG_RFKILL_GPIO is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=y
+CONFIG_PROC_EVENTS=y
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+# CONFIG_MTD_SWAP is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+CONFIG_MTD_M25P80=y
+CONFIG_M25PXX_USE_FAST_READ=y
+# CONFIG_MTD_SST25L is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND_ECC=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_BCH is not set
+# CONFIG_MTD_SM_COMMON is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+CONFIG_MTD_NAND_GPMI_NAND=y
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_GLUEBI is not set
+# CONFIG_MTD_UBI_DEBUG is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_DRBD is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_SENSORS_LIS3LV02D is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_INTEL_MID_PTI is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_APDS9802ALS is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_ISL29020 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_SENSORS_BH1780 is not set
+# CONFIG_SENSORS_BH1770 is not set
+# CONFIG_SENSORS_APDS990X is not set
+# CONFIG_HMC6352 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_TI_DAC7512 is not set
+# CONFIG_BMP085 is not set
+CONFIG_MXS_PERFMON=m
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_IWMC3200TOP is not set
+
+#
+# Texas Instruments shared transport line discipline
+#
+# CONFIG_TI_ST is not set
+# CONFIG_SENSORS_LIS3_SPI is not set
+# CONFIG_SENSORS_LIS3_I2C is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_ISCSI_BOOT_SYSFS is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
+# CONFIG_SATA_PMP is not set
+
+#
+# Controllers with non-SFF native interface
+#
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_ATA_SFF=y
+
+#
+# SFF controllers with custom DMA interface
+#
+CONFIG_ATA_BMDMA=y
+
+#
+# SATA SFF controllers with BMDMA
+#
+# CONFIG_SATA_MV is not set
+
+#
+# PATA SFF controllers with BMDMA
+#
+# CONFIG_PATA_ARASAN_CF is not set
+
+#
+# PIO-only SFF controllers
+#
+# CONFIG_PATA_PLATFORM is not set
+
+#
+# Generic fallback / legacy drivers
+#
+# CONFIG_MD is not set
+# CONFIG_TARGET_CORE is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_MII=y
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+CONFIG_MICREL_PHY=y
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+CONFIG_SMSC911X=y
+# CONFIG_SMSC911X_ARCH_HOOKS is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851 is not set
+# CONFIG_KS8851_MLL is not set
+CONFIG_FEC=y
+CONFIG_FEC_NAPI=y
+# CONFIG_FEC_1588 is not set
+# CONFIG_FTMAC100 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+CONFIG_WLAN=y
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+CONFIG_ATH_COMMON=m
+# CONFIG_ATH_DEBUG is not set
+CONFIG_ATH6KL=m
+# CONFIG_ATH6KL_DEBUG is not set
+CONFIG_HOSTAP=y
+# CONFIG_HOSTAP_FIRMWARE is not set
+# CONFIG_IWM is not set
+# CONFIG_LIBERTAS is not set
+# CONFIG_MWIFIEX is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_HSO is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_WAN is not set
+
+#
+# CAIF transport drivers
+#
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+# CONFIG_INPUT_APMPOWER is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ADP5589 is not set
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_QT1070 is not set
+# CONFIG_KEYBOARD_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_KEYBOARD_TCA6416 is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_MCS is not set
+# CONFIG_KEYBOARD_MPR121 is not set
+# CONFIG_KEYBOARD_IMX is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
+# CONFIG_TOUCHSCREEN_BU21013 is not set
+# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+CONFIG_TOUCHSCREEN_EGALAX=y
+CONFIG_TOUCHSCREEN_ELAN=y
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+CONFIG_TOUCHSCREEN_MAX11801=y
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_WM97XX is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_NOVATEK is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2005 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+# CONFIG_TOUCHSCREEN_ST1232 is not set
+# CONFIG_TOUCHSCREEN_P1003 is not set
+# CONFIG_TOUCHSCREEN_TPS6507X is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+CONFIG_INPUT_UINPUT=y
+# CONFIG_INPUT_PCF8574 is not set
+# CONFIG_INPUT_PWM_BEEPER is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_ADXL34X is not set
+# CONFIG_INPUT_CMA3000 is not set
+CONFIG_INPUT_ISL29023=y
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_AMBAKMI is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_SERIO_PS2MULT is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_TRACE_SINK is not set
+CONFIG_DEVKMEM=y
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_AMBA_PL010 is not set
+# CONFIG_SERIAL_AMBA_PL011 is not set
+# CONFIG_SERIAL_MAX3100 is not set
+# CONFIG_SERIAL_MAX3107 is not set
+CONFIG_SERIAL_IMX=y
+CONFIG_SERIAL_IMX_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_IFX6X60 is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_TTY_PRINTK is not set
+CONFIG_FSL_OTP=y
+# CONFIG_HVC_DCC is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_RAMOOPS is not set
+CONFIG_MXS_VIIM=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=y
+# CONFIG_I2C_MUX is not set
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=m
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+# CONFIG_I2C_GPIO is not set
+CONFIG_I2C_IMX=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_PXA_PCI is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_DIOLAN_U2C is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_ALTERA is not set
+CONFIG_SPI_BITBANG=y
+# CONFIG_SPI_GPIO is not set
+CONFIG_SPI_IMX_VER_2_3=y
+CONFIG_SPI_IMX=y
+# CONFIG_SPI_OC_TINY is not set
+# CONFIG_SPI_PL022 is not set
+# CONFIG_SPI_PXA2XX_PCI is not set
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+
+#
+# PPS generators support
+#
+
+#
+# PTP clock support
+#
+
+#
+# Enable Device Drivers -> PPS to see the PTP clock options.
+#
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO drivers:
+#
+# CONFIG_GPIO_BASIC_MMIO is not set
+# CONFIG_GPIO_IT8761E is not set
+# CONFIG_GPIO_PL061 is not set
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX7300 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X_IRQ is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_SX150X is not set
+# CONFIG_GPIO_WM8994 is not set
+# CONFIG_GPIO_ADP5588 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_GPIO_MC33880 is not set
+# CONFIG_GPIO_74X164 is not set
+
+#
+# AC97 GPIO expanders:
+#
+
+#
+# MODULbus GPIO expanders:
+#
+# CONFIG_W1 is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_PDA_POWER is not set
+# CONFIG_APM_POWER is not set
+# CONFIG_TEST_POWER is not set
+# CONFIG_BATTERY_DS2780 is not set
+# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_BQ20Z75 is not set
+# CONFIG_BATTERY_BQ27x00 is not set
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_BATTERY_MAX17042 is not set
+# CONFIG_CHARGER_ISP1704 is not set
+# CONFIG_CHARGER_MAX8903 is not set
+CONFIG_SABRESD_MAX8903=y
+# CONFIG_CHARGER_GPIO is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Native drivers
+#
+# CONFIG_SENSORS_AD7414 is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADCXX is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7411 is not set
+# CONFIG_SENSORS_ADT7462 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7475 is not set
+# CONFIG_SENSORS_ASC7621 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS620 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_GPIO_FAN is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_JC42 is not set
+# CONFIG_SENSORS_LINEAGE is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_LM73 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4151 is not set
+# CONFIG_SENSORS_LTC4215 is not set
+# CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LTC4261 is not set
+# CONFIG_SENSORS_LM95241 is not set
+# CONFIG_SENSORS_MAX1111 is not set
+# CONFIG_SENSORS_MAX16065 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6639 is not set
+# CONFIG_SENSORS_MAX6642 is not set
+CONFIG_SENSORS_MAX17135=y
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_PMBUS is not set
+# CONFIG_SENSORS_SHT15 is not set
+# CONFIG_SENSORS_SHT21 is not set
+# CONFIG_SENSORS_SMM665 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_EMC1403 is not set
+# CONFIG_SENSORS_EMC2103 is not set
+# CONFIG_SENSORS_EMC6W201 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_SCH5627 is not set
+# CONFIG_SENSORS_ADS1015 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_ADS7871 is not set
+# CONFIG_SENSORS_AMC6821 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_TMP102 is not set
+# CONFIG_SENSORS_TMP401 is not set
+# CONFIG_SENSORS_TMP421 is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83795 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+CONFIG_SENSORS_MAG3110=y
+# CONFIG_MXC_MMA8450 is not set
+CONFIG_MXC_MMA8451=y
+CONFIG_THERMAL=y
+# CONFIG_THERMAL_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_ARM_SP805_WATCHDOG is not set
+# CONFIG_MPCORE_WATCHDOG is not set
+# CONFIG_MAX63XX_WATCHDOG is not set
+CONFIG_IMX2_WDT=y
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+
+#
+# Broadcom specific AMBA
+#
+# CONFIG_BCMA is not set
+CONFIG_MFD_SUPPORT=y
+CONFIG_MFD_CORE=y
+# CONFIG_MFD_88PM860X is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_HTC_I2CPLD is not set
+# CONFIG_UCB1400_CORE is not set
+# CONFIG_TPS6105X is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TPS6507X is not set
+# CONFIG_MFD_TPS6586X is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_STMPE is not set
+# CONFIG_MFD_TC3589X is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_MAX8925 is not set
+# CONFIG_MFD_MAX8997 is not set
+# CONFIG_MFD_MAX8998 is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X_I2C is not set
+# CONFIG_MFD_WM831X_SPI is not set
+# CONFIG_MFD_WM8350_I2C is not set
+CONFIG_MFD_WM8994=y
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_PMIC_DIALOG is not set
+# CONFIG_MFD_MC_PMIC is not set
+# CONFIG_MFD_MC34708 is not set
+CONFIG_MFD_PFUZE=y
+# CONFIG_MFD_MC13XXX is not set
+# CONFIG_ABX500_CORE is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_MFD_WL1273_CORE is not set
+# CONFIG_MFD_TPS65910 is not set
+CONFIG_MFD_MAX17135=y
+CONFIG_MFD_MXC_HDMI=y
+CONFIG_REGULATOR=y
+# CONFIG_REGULATOR_DEBUG is not set
+# CONFIG_REGULATOR_DUMMY is not set
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
+# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
+# CONFIG_REGULATOR_BQ24022 is not set
+# CONFIG_REGULATOR_MAX1586 is not set
+# CONFIG_REGULATOR_MAX8649 is not set
+# CONFIG_REGULATOR_MAX8660 is not set
+# CONFIG_REGULATOR_MAX8952 is not set
+# CONFIG_REGULATOR_WM8994 is not set
+# CONFIG_REGULATOR_LP3971 is not set
+# CONFIG_REGULATOR_LP3972 is not set
+# CONFIG_REGULATOR_MC34708 is not set
+CONFIG_REGULATOR_PFUZE100=y
+# CONFIG_REGULATOR_TPS65023 is not set
+# CONFIG_REGULATOR_TPS6507X is not set
+# CONFIG_REGULATOR_ISL6271A is not set
+# CONFIG_REGULATOR_AD5398 is not set
+CONFIG_REGULATOR_ANATOP=y
+# CONFIG_REGULATOR_TPS6524X is not set
+CONFIG_REGULATOR_MAX17135=y
+CONFIG_MEDIA_SUPPORT=y
+
+#
+# Multimedia core support
+#
+# CONFIG_MEDIA_CONTROLLER is not set
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_COMMON=y
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=y
+
+#
+# Multimedia drivers
+#
+# CONFIG_RC_CORE is not set
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=y
+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
+CONFIG_MEDIA_TUNER_SIMPLE=y
+CONFIG_MEDIA_TUNER_TDA8290=y
+CONFIG_MEDIA_TUNER_TDA827X=y
+CONFIG_MEDIA_TUNER_TDA18271=y
+CONFIG_MEDIA_TUNER_TDA9887=y
+CONFIG_MEDIA_TUNER_TEA5761=y
+CONFIG_MEDIA_TUNER_TEA5767=y
+CONFIG_MEDIA_TUNER_MT20XX=y
+CONFIG_MEDIA_TUNER_XC2028=y
+CONFIG_MEDIA_TUNER_XC5000=y
+CONFIG_MEDIA_TUNER_MC44S803=y
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEOBUF_GEN=y
+CONFIG_VIDEOBUF_DMA_CONTIG=y
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
+
+#
+# Encoders, decoders, sensors and other helper chips
+#
+
+#
+# Audio decoders, processors and mixers
+#
+# CONFIG_VIDEO_TVAUDIO is not set
+# CONFIG_VIDEO_TDA7432 is not set
+# CONFIG_VIDEO_TDA9840 is not set
+# CONFIG_VIDEO_TEA6415C is not set
+# CONFIG_VIDEO_TEA6420 is not set
+# CONFIG_VIDEO_MSP3400 is not set
+# CONFIG_VIDEO_CS5345 is not set
+# CONFIG_VIDEO_CS53L32A is not set
+# CONFIG_VIDEO_TLV320AIC23B is not set
+# CONFIG_VIDEO_WM8775 is not set
+# CONFIG_VIDEO_WM8739 is not set
+# CONFIG_VIDEO_VP27SMPX is not set
+
+#
+# RDS decoders
+#
+# CONFIG_VIDEO_SAA6588 is not set
+
+#
+# Video decoders
+#
+# CONFIG_VIDEO_ADV7180 is not set
+# CONFIG_VIDEO_BT819 is not set
+# CONFIG_VIDEO_BT856 is not set
+# CONFIG_VIDEO_BT866 is not set
+# CONFIG_VIDEO_KS0127 is not set
+# CONFIG_VIDEO_SAA7110 is not set
+# CONFIG_VIDEO_SAA711X is not set
+# CONFIG_VIDEO_SAA7191 is not set
+# CONFIG_VIDEO_TVP514X is not set
+# CONFIG_VIDEO_TVP5150 is not set
+# CONFIG_VIDEO_TVP7002 is not set
+# CONFIG_VIDEO_VPX3220 is not set
+
+#
+# Video and audio decoders
+#
+# CONFIG_VIDEO_SAA717X is not set
+# CONFIG_VIDEO_CX25840 is not set
+
+#
+# MPEG video encoders
+#
+# CONFIG_VIDEO_CX2341X is not set
+
+#
+# Video encoders
+#
+# CONFIG_VIDEO_SAA7127 is not set
+# CONFIG_VIDEO_SAA7185 is not set
+# CONFIG_VIDEO_ADV7170 is not set
+# CONFIG_VIDEO_ADV7175 is not set
+# CONFIG_VIDEO_ADV7343 is not set
+# CONFIG_VIDEO_AK881X is not set
+
+#
+# Camera sensor devices
+#
+# CONFIG_VIDEO_OV7670 is not set
+# CONFIG_VIDEO_MT9V011 is not set
+# CONFIG_VIDEO_TCM825X is not set
+
+#
+# Video improvement chips
+#
+# CONFIG_VIDEO_UPD64031A is not set
+# CONFIG_VIDEO_UPD64083 is not set
+
+#
+# Miscelaneous helper chips
+#
+# CONFIG_VIDEO_THS7303 is not set
+# CONFIG_VIDEO_M52790 is not set
+# CONFIG_VIDEO_VIVI is not set
+CONFIG_VIDEO_MXC_CAMERA=m
+
+#
+# MXC Camera/V4L2 PRP Features support
+#
+CONFIG_VIDEO_MXC_IPU_CAMERA=y
+# CONFIG_VIDEO_MXC_CSI_CAMERA is not set
+# CONFIG_MXC_CAMERA_MICRON111 is not set
+# CONFIG_MXC_CAMERA_OV2640 is not set
+CONFIG_MXC_CAMERA_OV3640=m
+CONFIG_MXC_CAMERA_OV5640=m
+CONFIG_MXC_CAMERA_OV8820_MIPI=m
+CONFIG_MXC_CAMERA_OV5642=m
+CONFIG_MXC_CAMERA_OV5640_MIPI=m
+# CONFIG_MXC_MIPI_CSI2_TVIN_ADV7280 is not set
+CONFIG_MXC_CAMERA_SENSOR_CLK=m
+CONFIG_MXC_IPU_DEVICE_QUEUE_SDC=m
+CONFIG_MXC_IPU_PRP_ENC=m
+CONFIG_MXC_IPU_CSI_ENC=m
+CONFIG_VIDEO_MXC_OUTPUT=y
+CONFIG_VIDEO_MXC_IPU_OUTPUT=y
+# CONFIG_VIDEO_MXC_IPUV1_WVGA_OUTPUT is not set
+# CONFIG_VIDEO_MXC_OPL is not set
+# CONFIG_VIDEO_CPIA2 is not set
+# CONFIG_VIDEO_TIMBERDALE is not set
+# CONFIG_VIDEO_SR030PC30 is not set
+# CONFIG_VIDEO_NOON010PC30 is not set
+# CONFIG_SOC_CAMERA is not set
+CONFIG_V4L_USB_DRIVERS=y
+CONFIG_USB_VIDEO_CLASS=m
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+CONFIG_USB_GSPCA=m
+# CONFIG_USB_M5602 is not set
+# CONFIG_USB_STV06XX is not set
+# CONFIG_USB_GL860 is not set
+# CONFIG_USB_GSPCA_BENQ is not set
+# CONFIG_USB_GSPCA_CONEX is not set
+# CONFIG_USB_GSPCA_CPIA1 is not set
+# CONFIG_USB_GSPCA_ETOMS is not set
+# CONFIG_USB_GSPCA_FINEPIX is not set
+# CONFIG_USB_GSPCA_JEILINJ is not set
+# CONFIG_USB_GSPCA_KINECT is not set
+# CONFIG_USB_GSPCA_KONICA is not set
+# CONFIG_USB_GSPCA_MARS is not set
+# CONFIG_USB_GSPCA_MR97310A is not set
+# CONFIG_USB_GSPCA_NW80X is not set
+# CONFIG_USB_GSPCA_OV519 is not set
+# CONFIG_USB_GSPCA_OV534 is not set
+# CONFIG_USB_GSPCA_OV534_9 is not set
+# CONFIG_USB_GSPCA_PAC207 is not set
+# CONFIG_USB_GSPCA_PAC7302 is not set
+# CONFIG_USB_GSPCA_PAC7311 is not set
+# CONFIG_USB_GSPCA_SN9C2028 is not set
+# CONFIG_USB_GSPCA_SN9C20X is not set
+# CONFIG_USB_GSPCA_SONIXB is not set
+# CONFIG_USB_GSPCA_SONIXJ is not set
+# CONFIG_USB_GSPCA_SPCA500 is not set
+# CONFIG_USB_GSPCA_SPCA501 is not set
+# CONFIG_USB_GSPCA_SPCA505 is not set
+# CONFIG_USB_GSPCA_SPCA506 is not set
+# CONFIG_USB_GSPCA_SPCA508 is not set
+# CONFIG_USB_GSPCA_SPCA561 is not set
+# CONFIG_USB_GSPCA_SPCA1528 is not set
+# CONFIG_USB_GSPCA_SQ905 is not set
+# CONFIG_USB_GSPCA_SQ905C is not set
+# CONFIG_USB_GSPCA_SQ930X is not set
+# CONFIG_USB_GSPCA_STK014 is not set
+# CONFIG_USB_GSPCA_STV0680 is not set
+# CONFIG_USB_GSPCA_SUNPLUS is not set
+# CONFIG_USB_GSPCA_T613 is not set
+# CONFIG_USB_GSPCA_TV8532 is not set
+# CONFIG_USB_GSPCA_VC032X is not set
+# CONFIG_USB_GSPCA_VICAM is not set
+# CONFIG_USB_GSPCA_XIRLINK_CIT is not set
+# CONFIG_USB_GSPCA_ZC3XX is not set
+# CONFIG_VIDEO_PVRUSB2 is not set
+# CONFIG_VIDEO_HDPVR is not set
+# CONFIG_VIDEO_USBVISION is not set
+# CONFIG_USB_ET61X251 is not set
+# CONFIG_USB_SN9C102 is not set
+# CONFIG_USB_PWC is not set
+# CONFIG_USB_ZR364XX is not set
+# CONFIG_USB_STKWEBCAM is not set
+# CONFIG_USB_S2255 is not set
+# CONFIG_V4L_MEM2MEM_DRIVERS is not set
+# CONFIG_RADIO_ADAPTERS is not set
+
+#
+# Graphics support
+#
+CONFIG_DRM=m
+CONFIG_DRM_VIVANTE=m
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_WMT_GE_ROPS is not set
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+CONFIG_FB_MODE_HELPERS=y
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_ARMCLCD is not set
+# CONFIG_FB_UVESA is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_TMIO is not set
+# CONFIG_FB_UDL is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_BROADSHEET is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_BACKLIGHT_PWM=y
+# CONFIG_BACKLIGHT_ADP8860 is not set
+# CONFIG_BACKLIGHT_ADP8870 is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+CONFIG_FB_MXC=y
+CONFIG_FB_MXC_EDID=y
+CONFIG_FB_MXC_SYNC_PANEL=y
+# CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL is not set
+CONFIG_FB_MXC_LDB=y
+CONFIG_FB_MXC_MIPI_DSI=y
+CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL=y
+# CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set
+# CONFIG_FB_MXC_SEIKO_WVGA_SYNC_PANEL is not set
+# CONFIG_FB_MXC_SII902X is not set
+# CONFIG_FB_MXC_CH7026 is not set
+# CONFIG_FB_MXC_TVOUT_CH7024 is not set
+# CONFIG_FB_MXC_ASYNC_PANEL is not set
+CONFIG_FB_MXC_EINK_PANEL=y
+# CONFIG_FB_MXC_EINK_AUTO_UPDATE_MODE is not set
+# CONFIG_FB_MXC_SIPIX_PANEL is not set
+# CONFIG_FB_MXC_ELCDIF_FB is not set
+CONFIG_FB_MXC_HDMI=y
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+# CONFIG_FONT_8x8 is not set
+CONFIG_FONT_8x16=y
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+# CONFIG_FONT_MINI_4x6 is not set
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE is not set
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+CONFIG_SND_HWDEP=y
+CONFIG_SND_RAWMIDI=y
+CONFIG_SND_JACK=y
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_HRTIMER is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_ALOOP is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+CONFIG_SND_ARM=y
+# CONFIG_SND_ARMAACI is not set
+CONFIG_SND_SPI=y
+CONFIG_SND_USB=y
+CONFIG_SND_USB_AUDIO=y
+# CONFIG_SND_USB_UA101 is not set
+# CONFIG_SND_USB_CAIAQ is not set
+# CONFIG_SND_USB_6FIRE is not set
+CONFIG_SND_SOC=y
+# CONFIG_SND_SOC_CACHE_LZO is not set
+CONFIG_SND_SOC_AC97_BUS=y
+CONFIG_SND_IMX_SOC=y
+CONFIG_SND_MXC_SOC_MX2=y
+CONFIG_SND_MXC_SOC_SPDIF_DAI=y
+CONFIG_SND_SOC_IMX_SGTL5000=y
+# CONFIG_SND_SOC_IMX_WM8958 is not set
+CONFIG_SND_SOC_IMX_WM8962=y
+# CONFIG_SND_SOC_IMX_SI4763 is not set
+CONFIG_SND_SOC_IMX_SPDIF=y
+CONFIG_SND_SOC_IMX_HDMI=y
+CONFIG_SND_SOC_I2C_AND_SPI=y
+# CONFIG_SND_SOC_ALL_CODECS is not set
+CONFIG_SND_SOC_MXC_HDMI=y
+CONFIG_SND_SOC_MXC_SPDIF=y
+CONFIG_SND_SOC_SGTL5000=y
+CONFIG_SND_SOC_WM8962=y
+# CONFIG_SOUND_PRIME is not set
+CONFIG_AC97_BUS=y
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+CONFIG_HIDRAW=y
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_A4TECH=m
+# CONFIG_HID_ACRUX is not set
+CONFIG_HID_APPLE=m
+CONFIG_HID_BELKIN=m
+CONFIG_HID_CHERRY=m
+CONFIG_HID_CHICONY=m
+# CONFIG_HID_PRODIKEYS is not set
+CONFIG_HID_CYPRESS=m
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EMS_FF is not set
+# CONFIG_HID_ELECOM is not set
+CONFIG_HID_EZKEY=m
+# CONFIG_HID_KEYTOUCH is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_UCLOGIC is not set
+# CONFIG_HID_WALTOP is not set
+CONFIG_HID_GYRATION=m
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LCPOWER is not set
+CONFIG_HID_LOGITECH=m
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+# CONFIG_LOGIG940_FF is not set
+# CONFIG_LOGIWII_FF is not set
+# CONFIG_HID_MAGICMOUSE is not set
+CONFIG_HID_MICROSOFT=m
+CONFIG_HID_MONTEREY=m
+# CONFIG_HID_MULTITOUCH is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
+CONFIG_HID_PANTHERLORD=m
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=m
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_QUANTA is not set
+# CONFIG_HID_ROCCAT is not set
+# CONFIG_HID_ROCCAT_ARVO is not set
+# CONFIG_HID_ROCCAT_KONE is not set
+# CONFIG_HID_ROCCAT_KONEPLUS is not set
+# CONFIG_HID_ROCCAT_KOVAPLUS is not set
+# CONFIG_HID_ROCCAT_PYRA is not set
+CONFIG_HID_SAMSUNG=m
+CONFIG_HID_SONY=m
+CONFIG_HID_SUNPLUS=m
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_WACOM is not set
+# CONFIG_HID_ZEROPLUS is not set
+# CONFIG_HID_ZYDACRON is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_SUSPEND=y
+CONFIG_USB_OTG=y
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ARC=y
+CONFIG_USB_EHCI_ARC_OTG=y
+# CONFIG_USB_EHCI_ARC_HSIC is not set
+# CONFIG_USB_STATIC_IRAM is not set
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_EHCI_MXC is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_REALTEK is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_STORAGE_ENE_UB6250 is not set
+# CONFIG_USB_UAS is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_YUREX is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+# CONFIG_USB_GADGET_DEBUG_FS is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+CONFIG_USB_GADGET_ARC=y
+# CONFIG_IMX_USB_CHARGER is not set
+CONFIG_USB_ARC=y
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_FUSB300 is not set
+# CONFIG_USB_GADGET_R8A66597 is not set
+# CONFIG_USB_GADGET_PXA_U2O is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+CONFIG_USB_AUDIO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+# CONFIG_USB_ETH_EEM is not set
+# CONFIG_USB_G_NCM is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FUNCTIONFS is not set
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_FSL_UTP is not set
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+# CONFIG_USB_MASS_STORAGE is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_MULTI is not set
+# CONFIG_USB_G_HID is not set
+# CONFIG_USB_G_DBGP is not set
+# CONFIG_USB_G_WEBCAM is not set
+
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_USB_ULPI is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MXC_OTG=y
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+CONFIG_MMC_UNSAFE_RESUME=y
+# CONFIG_MMC_CLKGATE is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_MINORS=8
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_ARMMMCI is not set
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_IO_ACCESSORS=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_ESDHC_IMX=y
+# CONFIG_MMC_DW is not set
+# CONFIG_MMC_VUB300 is not set
+# CONFIG_MMC_USHC is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_LM3530 is not set
+# CONFIG_LEDS_PCA9532 is not set
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_GPIO_PLATFORM=y
+# CONFIG_LEDS_LP3944 is not set
+# CONFIG_LEDS_LP5521 is not set
+# CONFIG_LEDS_LP5523 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_DAC124S085 is not set
+# CONFIG_LEDS_PWM is not set
+# CONFIG_LEDS_REGULATOR is not set
+# CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
+CONFIG_LEDS_TRIGGERS=y
+
+#
+# LED Triggers
+#
+# CONFIG_LEDS_TRIGGER_TIMER is not set
+# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+
+#
+# LED Triggers
+#
+# CONFIG_NFC_DEVICES is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+CONFIG_RTC_INTF_DEV_UIE_EMUL=y
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS3232 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+# CONFIG_RTC_DRV_EM3027 is not set
+# CONFIG_RTC_DRV_RV3029C2 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T93 is not set
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+# CONFIG_RTC_DRV_PCF2123 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_MXC is not set
+# CONFIG_RTC_DRV_MXC_V2 is not set
+CONFIG_RTC_DRV_SNVS=y
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_PL030 is not set
+# CONFIG_RTC_DRV_PL031 is not set
+CONFIG_DMADEVICES=y
+# CONFIG_DMADEVICES_DEBUG is not set
+
+#
+# DMA Devices
+#
+# CONFIG_AMBA_PL08X is not set
+# CONFIG_DW_DMAC is not set
+CONFIG_MXC_PXP_V2=y
+CONFIG_MXC_PXP_CLIENT_DEVICE=y
+# CONFIG_TIMB_DMA is not set
+CONFIG_IMX_SDMA=y
+CONFIG_MXS_DMA=y
+CONFIG_DMA_ENGINE=y
+
+#
+# DMA Clients
+#
+# CONFIG_NET_DMA is not set
+# CONFIG_ASYNC_TX_DMA is not set
+# CONFIG_DMATEST is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_CLKSRC_MMIO=y
+
+#
+# MXC support drivers
+#
+CONFIG_MXC_IPU=y
+CONFIG_MXC_IPU_V3=y
+CONFIG_MXC_IPU_V3H=y
+
+#
+# MXC SSI support
+#
+# CONFIG_MXC_SSI is not set
+
+#
+# MXC Digital Audio Multiplexer support
+#
+# CONFIG_MXC_DAM is not set
+
+#
+# MXC PMIC support
+#
+# CONFIG_MXC_PMIC_MC13783 is not set
+# CONFIG_MXC_PMIC_MC13892 is not set
+# CONFIG_MXC_PMIC_MC34704 is not set
+# CONFIG_MXC_PMIC_MC9SDZ60 is not set
+# CONFIG_MXC_PMIC_MC9S08DZ60 is not set
+
+#
+# MXC Security Drivers
+#
+# CONFIG_MXC_SECURITY_SCC is not set
+# CONFIG_MXC_SECURITY_RNG is not set
+
+#
+# MXC MPEG4 Encoder Kernel module support
+#
+# CONFIG_MXC_HMP4E is not set
+
+#
+# MXC HARDWARE EVENT
+#
+# CONFIG_MXC_HWEVENT is not set
+
+#
+# MXC VPU(Video Processing Unit) support
+#
+CONFIG_MXC_VPU=y
+CONFIG_MXC_VPU_DEBUG=y
+CONFIG_MX6_VPU_352M=y
+
+#
+# MXC Asynchronous Sample Rate Converter support
+#
+CONFIG_MXC_ASRC=y
+
+#
+# MXC Bluetooth support
+#
+
+#
+# Broadcom GPS ioctrl support
+#
+
+#
+# MXC Media Local Bus Driver
+#
+CONFIG_MXC_MLB=y
+CONFIG_MXC_MLB150=m
+
+#
+# i.MX ADC support
+#
+# CONFIG_IMX_ADC is not set
+
+#
+# MXC Vivante GPU support
+#
+CONFIG_MXC_GPU_VIV=y
+
+#
+# ANATOP_THERMAL
+#
+CONFIG_ANATOP_THERMAL=y
+
+#
+# MXC MIPI Support
+#
+CONFIG_MXC_MIPI_CSI2=y
+
+#
+# MXC HDMI CEC (Consumer Electronics Control) support
+#
+CONFIG_MXC_HDMI_CEC=y
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_XATTR=y
+# CONFIG_EXT4_FS_POSIX_ACL is not set
+# CONFIG_EXT4_FS_SECURITY is not set
+# CONFIG_EXT4_DEBUG is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_QUOTACTL is not set
+CONFIG_AUTOFS4_FS=m
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_TMPFS_XATTR is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_UBIFS_FS=y
+# CONFIG_UBIFS_FS_XATTR is not set
+# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+# CONFIG_UBIFS_FS_DEBUG is not set
+# CONFIG_LOGFS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_PSTORE is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+CONFIG_EFI_PARTITION=y
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_HARDLOCKUP_DETECTOR is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_SPARSE_RCU_POINTER is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_MEMORY_INIT is not set
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+CONFIG_RCU_CPU_STALL_VERBOSE=y
+# CONFIG_LKDTM is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_TEST_KSTRTOX is not set
+# CONFIG_STRICT_DEVMEM is not set
+CONFIG_ARM_UNWIND=y
+# CONFIG_DEBUG_USER is not set
+CONFIG_OC_ETM=y
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
+CONFIG_CRYPTO_GF128MUL=y
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_PCRYPT is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_AUTHENC=y
+CONFIG_CRYPTO_TEST=m
+# CONFIG_CRYPTO_CRYPTODEV is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+CONFIG_CRYPTO_CCM=y
+CONFIG_CRYPTO_GCM=y
+CONFIG_CRYPTO_SEQIV=y
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_CTR=y
+CONFIG_CRYPTO_CTS=y
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_LRW=y
+CONFIG_CRYPTO_PCBC=y
+CONFIG_CRYPTO_XTS=y
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+CONFIG_CRYPTO_GHASH=y
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+CONFIG_CRYPTO_MICHAEL_MIC=y
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_ZLIB is not set
+CONFIG_CRYPTO_LZO=y
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+CONFIG_CRYPTO_HW=y
+CONFIG_CRYPTO_DEV_FSL_CAAM=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9
+CONFIG_CRYPTO_DEV_FSL_CAAM_INTC=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD=255
+CONFIG_CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD=2048
+CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y
+# CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_TEST is not set
+CONFIG_CRYPTO_DEV_FSL_CAAM_SM=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_SM_SLOTSIZE=7
+CONFIG_CRYPTO_DEV_FSL_CAAM_SM_TEST=y
+CONFIG_CRYPTO_DEV_FSL_CAAM_SECVIO=y
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_RATIONAL=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+# CONFIG_XZ_DEC is not set
+# CONFIG_XZ_DEC_BCJ is not set
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_CPU_RMAP=y
+CONFIG_NLATTR=y
+# CONFIG_AVERAGE is not set
diff --git a/recipes-kernel/linux/linux-imx_3.0.35.bb b/recipes-kernel/linux/linux-imx_3.0.35.bb
index b0870a2..c3d1d25 100644
--- a/recipes-kernel/linux/linux-imx_3.0.35.bb
+++ b/recipes-kernel/linux/linux-imx_3.0.35.bb
@@ -17,3 +17,10 @@  SRC_URI += "file://fix_getrusage_for_perf.patch \
 
 # iMX6Q SabreLITE changes done by Boundary Devices
 SRC_URI_append_imx6qsabrelite = " file://sync-boundary-changes.patch"
+
+# Revision of rel_imx_3.0.35_1.1.0
+SRCREV_cgtqmx6 = "c27cb3851bb6f822f8a92e4a1e10fba19284bdd4"
+LOCALVERSION = "-12.09.01+yocto_cgtqmx6"
+
+# Add suuport for the Congatec qmx6 board
+SRC_URI_append_cgtqmx6 = "file://cgtqmx6.patch"