From patchwork Mon Feb 5 12:40:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Mason X-Patchwork-Id: 38837 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id CEA74C4828D for ; Mon, 5 Feb 2024 12:41:05 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.61451.1707136855792289108 for ; Mon, 05 Feb 2024 04:40:55 -0800 Authentication-Results: mx.groups.io; dkim=none (message not signed); spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: jon.mason@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id ED75ADA7 for ; Mon, 5 Feb 2024 04:41:37 -0800 (PST) Received: from H24V3P4C17.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 04B2A3F762 for ; Mon, 5 Feb 2024 04:40:54 -0800 (PST) From: Jon Mason To: openembedded-core@lists.openembedded.org Subject: [master-next PATCH 2/2] arm/armv*: add all the Arm tunes in GCC 13.2.0 Date: Mon, 5 Feb 2024 13:40:53 +0100 Message-Id: <20240205124053.14205-2-jon.mason@arm.com> X-Mailer: git-send-email 2.39.3 (Apple Git-145) In-Reply-To: <20240205124053.14205-1-jon.mason@arm.com> References: <20240205124053.14205-1-jon.mason@arm.com> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Mon, 05 Feb 2024 12:41:05 -0000 X-Groupsio-URL: https://lists.openembedded.org/g/openembedded-core/message/194933 Signed-off-by: Jon Mason --- .../machine/include/arm/arch-armv8-1a.inc | 18 +++++++++++++++ .../machine/include/arm/arch-armv8-3a.inc | 22 +++++++++++++++++++ .../machine/include/arm/arch-armv8-6a.inc | 22 +++++++++++++++++++ .../include/arm/armv8-2a/tune-cortexa78ae.inc | 15 +++++++++++++ .../include/arm/armv8-2a/tune-cortexa78c.inc | 15 +++++++++++++ .../include/arm/armv8-2a/tune-cortexx1.inc | 15 +++++++++++++ .../include/arm/armv8-2a/tune-cortexx1c.inc | 15 +++++++++++++ .../arm/armv8-4a/tune-neoverse512tvb.inc | 15 +++++++++++++ .../include/arm/armv8-4a/tune-neoversev1.inc | 15 +++++++++++++ .../include/arm/armv8r/tune-cortexr82.inc | 15 +++++++++++++ .../include/arm/armv9a/tune-cortexa510.inc | 15 +++++++++++++ .../include/arm/armv9a/tune-cortexa710.inc | 15 +++++++++++++ .../include/arm/armv9a/tune-cortexa715.inc | 15 +++++++++++++ .../include/arm/armv9a/tune-cortexx2.inc | 15 +++++++++++++ .../include/arm/armv9a/tune-cortexx3.inc | 15 +++++++++++++ .../include/arm/armv9a/tune-neoversev2.inc | 15 +++++++++++++ 16 files changed, 257 insertions(+) create mode 100644 meta/conf/machine/include/arm/arch-armv8-1a.inc create mode 100644 meta/conf/machine/include/arm/arch-armv8-3a.inc create mode 100644 meta/conf/machine/include/arm/arch-armv8-6a.inc create mode 100644 meta/conf/machine/include/arm/armv8-2a/tune-cortexa78ae.inc create mode 100644 meta/conf/machine/include/arm/armv8-2a/tune-cortexa78c.inc create mode 100644 meta/conf/machine/include/arm/armv8-2a/tune-cortexx1.inc create mode 100644 meta/conf/machine/include/arm/armv8-2a/tune-cortexx1c.inc create mode 100644 meta/conf/machine/include/arm/armv8-4a/tune-neoverse512tvb.inc create mode 100644 meta/conf/machine/include/arm/armv8-4a/tune-neoversev1.inc create mode 100644 meta/conf/machine/include/arm/armv8r/tune-cortexr82.inc create mode 100644 meta/conf/machine/include/arm/armv9a/tune-cortexa510.inc create mode 100644 meta/conf/machine/include/arm/armv9a/tune-cortexa710.inc create mode 100644 meta/conf/machine/include/arm/armv9a/tune-cortexa715.inc create mode 100644 meta/conf/machine/include/arm/armv9a/tune-cortexx2.inc create mode 100644 meta/conf/machine/include/arm/armv9a/tune-cortexx3.inc create mode 100644 meta/conf/machine/include/arm/armv9a/tune-neoversev2.inc diff --git a/meta/conf/machine/include/arm/arch-armv8-1a.inc b/meta/conf/machine/include/arm/arch-armv8-1a.inc new file mode 100644 index 000000000000..be8e814a39aa --- /dev/null +++ b/meta/conf/machine/include/arm/arch-armv8-1a.inc @@ -0,0 +1,18 @@ +DEFAULTTUNE ?= "armv8-1a" + +TUNEVALID[armv8-1a] = "Enable instructions for ARMv8.1-a" +TUNE_CCARGS_MARCH .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8-1a', ' -march=armv8.1-a', '', d)}" +# TUNE crypto will be handled by arch-armv8a.inc below +MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv8-1a', 'armv8-1a:', '', d)}" + +require conf/machine/include/arm/arch-armv8a.inc + +AVAILTUNES += "armv8-1a armv8-1a-crypto" +ARMPKGARCH:tune-armv8-1a ?= "armv8-1a" +ARMPKGARCH:tune-armv8-1a-crypto ?= "armv8-1a" +TUNE_FEATURES:tune-armv8-1a = "aarch64 armv8-1a" +TUNE_FEATURES:tune-armv8-1a-crypto = "${TUNE_FEATURES:tune-armv8-1a} crypto" +PACKAGE_EXTRA_ARCHS:tune-armv8-1a = "${PACKAGE_EXTRA_ARCHS:tune-armv8a} armv8-1a" +PACKAGE_EXTRA_ARCHS:tune-armv8-1a-crypto = "${PACKAGE_EXTRA_ARCHS:tune-armv8-1a} armv8-1a-crypto" +BASE_LIB:tune-armv8-1a = "lib64" +BASE_LIB:tune-armv8-1a-crypto = "lib64" diff --git a/meta/conf/machine/include/arm/arch-armv8-3a.inc b/meta/conf/machine/include/arm/arch-armv8-3a.inc new file mode 100644 index 000000000000..49493fb3b50e --- /dev/null +++ b/meta/conf/machine/include/arm/arch-armv8-3a.inc @@ -0,0 +1,22 @@ +DEFAULTTUNE ?= "armv8-3a" + +TUNEVALID[armv8-3a] = "Enable instructions for ARMv8.3-a" +TUNE_CCARGS_MARCH .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8-3a', ' -march=armv8.3-a', '', d)}" +# TUNE crypto will be handled by arch-armv8a.inc below +MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv8-3a', 'armv8-3a:', '', d)}" + +require conf/machine/include/arm/arch-armv8a.inc + +AVAILTUNES += "armv8-3a armv8-3a-crypto armv8-3a-crypto-sve" +ARMPKGARCH:tune-armv8-3a ?= "armv8-3a" +ARMPKGARCH:tune-armv8-3a-crypto ?= "armv8-3a" +ARMPKGARCH:tune-armv8-3a-crypto-sve ?= "armv8-3a" +TUNE_FEATURES:tune-armv8-3a = "aarch64 armv8-3a" +TUNE_FEATURES:tune-armv8-3a-crypto = "${TUNE_FEATURES:tune-armv8-3a} crypto" +TUNE_FEATURES:tune-armv8-3a-crypto-sve = "${TUNE_FEATURES:tune-armv8-3a-crypto} sve" +PACKAGE_EXTRA_ARCHS:tune-armv8-3a = "${PACKAGE_EXTRA_ARCHS:tune-armv8a} armv8-3a" +PACKAGE_EXTRA_ARCHS:tune-armv8-3a-crypto = "${PACKAGE_EXTRA_ARCHS:tune-armv8-3a} armv8-3a-crypto" +PACKAGE_EXTRA_ARCHS:tune-armv8-3a-crypto-sve = "${PACKAGE_EXTRA_ARCHS:tune-armv8-3a-crypto} armv8-3a-crypto-sve" +BASE_LIB:tune-armv8-3a = "lib64" +BASE_LIB:tune-armv8-3a-crypto = "lib64" +BASE_LIB:tune-armv8-3a-crypto-sve = "lib64" diff --git a/meta/conf/machine/include/arm/arch-armv8-6a.inc b/meta/conf/machine/include/arm/arch-armv8-6a.inc new file mode 100644 index 000000000000..27f85325caf6 --- /dev/null +++ b/meta/conf/machine/include/arm/arch-armv8-6a.inc @@ -0,0 +1,22 @@ +DEFAULTTUNE ?= "armv8-6a" + +TUNEVALID[armv8-6a] = "Enable instructions for ARMv8.6-a" +TUNE_CCARGS_MARCH .= "${@bb.utils.contains('TUNE_FEATURES', 'armv8-6a', ' -march=armv8.6-a', '', d)}" +# TUNE crypto will be handled by arch-armv8a.inc below +MACHINEOVERRIDES =. "${@bb.utils.contains('TUNE_FEATURES', 'armv8-6a', 'armv8-6a:', '', d)}" + +require conf/machine/include/arm/arch-armv8a.inc + +AVAILTUNES += "armv8-6a armv8-6a-crypto armv8-6a-crypto-sve" +ARMPKGARCH:tune-armv8-6a ?= "armv8-6a" +ARMPKGARCH:tune-armv8-6a-crypto ?= "armv8-6a" +ARMPKGARCH:tune-armv8-6a-crypto-sve ?= "armv8-6a" +TUNE_FEATURES:tune-armv8-6a = "aarch64 armv8-6a" +TUNE_FEATURES:tune-armv8-6a-crypto = "${TUNE_FEATURES:tune-armv8-6a} crypto" +TUNE_FEATURES:tune-armv8-6a-crypto-sve = "${TUNE_FEATURES:tune-armv8-6a-crypto} sve" +PACKAGE_EXTRA_ARCHS:tune-armv8-6a = "${PACKAGE_EXTRA_ARCHS:tune-armv8a} armv8-6a" +PACKAGE_EXTRA_ARCHS:tune-armv8-6a-crypto = "${PACKAGE_EXTRA_ARCHS:tune-armv8-6a} armv8-6a-crypto" +PACKAGE_EXTRA_ARCHS:tune-armv8-6a-crypto-sve = "${PACKAGE_EXTRA_ARCHS:tune-armv8-6a-crypto} armv8-6a-crypto-sve" +BASE_LIB:tune-armv8-6a = "lib64" +BASE_LIB:tune-armv8-6a-crypto = "lib64" +BASE_LIB:tune-armv8-6a-crypto-sve = "lib64" diff --git a/meta/conf/machine/include/arm/armv8-2a/tune-cortexa78ae.inc b/meta/conf/machine/include/arm/armv8-2a/tune-cortexa78ae.inc new file mode 100644 index 000000000000..fe68bda9a03c --- /dev/null +++ b/meta/conf/machine/include/arm/armv8-2a/tune-cortexa78ae.inc @@ -0,0 +1,15 @@ +# +# Tune Settings for cortex-a78ae +# +DEFAULTTUNE ?= "cortexa78ae" + +TUNEVALID[cortexa78ae] = "Enable cortex-a78ae specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa78ae', ' -mcpu=cortex-a78ae', '', d)}" + +require conf/machine/include/arm/arch-armv8-2a.inc + +AVAILTUNES += "cortexa78ae" +ARMPKGARCH:tune-cortexa78ae = "cortexa78ae" +TUNE_FEATURES:tune-cortexa78ae = "aarch64 crypto cortexa78ae" +PACKAGE_EXTRA_ARCHS:tune-cortexa78ae = "${PACKAGE_EXTRA_ARCHS:tune-armv8-2a-crypto} cortexa78ae" +BASE_LIB:tune-cortexa78ae = "lib64" diff --git a/meta/conf/machine/include/arm/armv8-2a/tune-cortexa78c.inc b/meta/conf/machine/include/arm/armv8-2a/tune-cortexa78c.inc new file mode 100644 index 000000000000..cb1fe91dfca5 --- /dev/null +++ b/meta/conf/machine/include/arm/armv8-2a/tune-cortexa78c.inc @@ -0,0 +1,15 @@ +# +# Tune Settings for cortex-a78c +# +DEFAULTTUNE ?= "cortexa78c" + +TUNEVALID[cortexa78c] = "Enable cortex-a78c specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa78c', ' -mcpu=cortex-a78c', '', d)}" + +require conf/machine/include/arm/arch-armv8-2a.inc + +AVAILTUNES += "cortexa78c" +ARMPKGARCH:tune-cortexa78c = "cortexa78c" +TUNE_FEATURES:tune-cortexa78c = "aarch64 crypto cortexa78c" +PACKAGE_EXTRA_ARCHS:tune-cortexa78c = "${PACKAGE_EXTRA_ARCHS:tune-armv8-2a-crypto} cortexa78c" +BASE_LIB:tune-cortexa78c = "lib64" diff --git a/meta/conf/machine/include/arm/armv8-2a/tune-cortexx1.inc b/meta/conf/machine/include/arm/armv8-2a/tune-cortexx1.inc new file mode 100644 index 000000000000..0a99156e6297 --- /dev/null +++ b/meta/conf/machine/include/arm/armv8-2a/tune-cortexx1.inc @@ -0,0 +1,15 @@ +# +# Tune Settings for cortex-x1 +# +DEFAULTTUNE ?= "cortexx1" + +TUNEVALID[cortexx1] = "Enable cortex-x1 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexx1', ' -mcpu=cortex-x1', '', d)}" + +require conf/machine/include/arm/arch-armv8-2a.inc + +AVAILTUNES += "cortexx1" +ARMPKGARCH:tune-cortexx1 = "cortexx1" +TUNE_FEATURES:tune-cortexx1 = "aarch64 crypto cortexx1" +PACKAGE_EXTRA_ARCHS:tune-cortexx1 = "${PACKAGE_EXTRA_ARCHS:tune-armv8-2a-crypto} cortexx1" +BASE_LIB:tune-cortexx1 = "lib64" diff --git a/meta/conf/machine/include/arm/armv8-2a/tune-cortexx1c.inc b/meta/conf/machine/include/arm/armv8-2a/tune-cortexx1c.inc new file mode 100644 index 000000000000..2a16d1695de5 --- /dev/null +++ b/meta/conf/machine/include/arm/armv8-2a/tune-cortexx1c.inc @@ -0,0 +1,15 @@ +# +# Tune Settings for cortex-x1c +# +DEFAULTTUNE ?= "cortexx1c" + +TUNEVALID[cortexx1c] = "Enable cortex-x1c specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexx1c', ' -mcpu=cortex-x1c', '', d)}" + +require conf/machine/include/arm/arch-armv8-2a.inc + +AVAILTUNES += "cortexx1c" +ARMPKGARCH:tune-cortexx1c = "cortexx1c" +TUNE_FEATURES:tune-cortexx1c = "aarch64 crypto cortexx1c" +PACKAGE_EXTRA_ARCHS:tune-cortexx1c = "${PACKAGE_EXTRA_ARCHS:tune-armv8-2a-crypto} cortexx1c" +BASE_LIB:tune-cortexx1c = "lib64" diff --git a/meta/conf/machine/include/arm/armv8-4a/tune-neoverse512tvb.inc b/meta/conf/machine/include/arm/armv8-4a/tune-neoverse512tvb.inc new file mode 100644 index 000000000000..450bf748963e --- /dev/null +++ b/meta/conf/machine/include/arm/armv8-4a/tune-neoverse512tvb.inc @@ -0,0 +1,15 @@ +# +# Tune Settings for neoverse-512tvb +# +DEFAULTTUNE ?= "neoverse512tvb" + +TUNEVALID[neoverse512tvb] = "Enable neoverse-512tvb specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'neoverse512tvb', ' -mcpu=neoverse-512tvb', '', d)}" + +require conf/machine/include/arm/arch-armv8-4a.inc + +AVAILTUNES += "neoverse512tvb" +ARMPKGARCH:tune-neoverse512tvb = "neoverse512tvb" +TUNE_FEATURES:tune-neoverse512tvb = "aarch64 crypto neoverse512tvb" +PACKAGE_EXTRA_ARCHS:tune-neoverse512tvb = "${PACKAGE_EXTRA_ARCHS:tune-armv8-4a-crypto} neoverse512tvb" +BASE_LIB:tune-neoverse512tvb = "lib64" diff --git a/meta/conf/machine/include/arm/armv8-4a/tune-neoversev1.inc b/meta/conf/machine/include/arm/armv8-4a/tune-neoversev1.inc new file mode 100644 index 000000000000..2b4da7db3cd5 --- /dev/null +++ b/meta/conf/machine/include/arm/armv8-4a/tune-neoversev1.inc @@ -0,0 +1,15 @@ +# +# Tune Settings for neoverse-v1 +# +DEFAULTTUNE ?= "neoversev1" + +TUNEVALID[neoversev1] = "Enable neoverse-v1 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'neoversev1', ' -mcpu=neoverse-v1', '', d)}" + +require conf/machine/include/arm/arch-armv8-4a.inc + +AVAILTUNES += "neoversev1" +ARMPKGARCH:tune-neoversev1 = "neoversev1" +TUNE_FEATURES:tune-neoversev1 = "aarch64 crypto neoversev1" +PACKAGE_EXTRA_ARCHS:tune-neoversev1 = "${PACKAGE_EXTRA_ARCHS:tune-armv8-4a-crypto} neoversev1" +BASE_LIB:tune-neoversev1 = "lib64" diff --git a/meta/conf/machine/include/arm/armv8r/tune-cortexr82.inc b/meta/conf/machine/include/arm/armv8r/tune-cortexr82.inc new file mode 100644 index 000000000000..84b2471c6b15 --- /dev/null +++ b/meta/conf/machine/include/arm/armv8r/tune-cortexr82.inc @@ -0,0 +1,15 @@ +# +# Tune Settings for cortex-r82 +# +DEFAULTTUNE ?= "cortexr82" + +TUNEVALID[cortexr82] = "Enable cortex-r82 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexr82', ' -mcpu=cortex-r82', '', d)}" + +require conf/machine/include/arm/arch-armv8r.inc + +AVAILTUNES += "cortexr82" +ARMPKGARCH:tune-cortexr82 = "cortexr82" +TUNE_FEATURES:tune-cortexr82 = "${TUNE_FEATURES:tune-armv8r-crc-simd} cortexr82" +PACKAGE_EXTRA_ARCHS:tune-cortexr82 = "${PACKAGE_EXTRA_ARCHS:tune-armv8r-crc-simd} cortexr82" +BASE_LIB:tune-cortexr82 = "lib64" diff --git a/meta/conf/machine/include/arm/armv9a/tune-cortexa510.inc b/meta/conf/machine/include/arm/armv9a/tune-cortexa510.inc new file mode 100644 index 000000000000..09219ec7f1c1 --- /dev/null +++ b/meta/conf/machine/include/arm/armv9a/tune-cortexa510.inc @@ -0,0 +1,15 @@ +# +# Tune Settings for cortex-a510 +# +DEFAULTTUNE ?= "cortexa510" + +TUNEVALID[cortexa510] = "Enable cortex-a510 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa510', ' -mcpu=cortex-a510', '', d)}" + +require conf/machine/include/arm/arch-armv9a.inc + +AVAILTUNES += "cortexa510" +ARMPKGARCH:tune-cortexa510 = "cortexa510" +TUNE_FEATURES:tune-cortexa510 = "aarch64 crypto cortexa510" +PACKAGE_EXTRA_ARCHS:tune-cortexa510 = "${PACKAGE_EXTRA_ARCHS:tune-armv9a-crypto} cortexa510" +BASE_LIB:tune-cortexa510 = "lib64" diff --git a/meta/conf/machine/include/arm/armv9a/tune-cortexa710.inc b/meta/conf/machine/include/arm/armv9a/tune-cortexa710.inc new file mode 100644 index 000000000000..19743d67db40 --- /dev/null +++ b/meta/conf/machine/include/arm/armv9a/tune-cortexa710.inc @@ -0,0 +1,15 @@ +# +# Tune Settings for cortex-a710 +# +DEFAULTTUNE ?= "cortexa710" + +TUNEVALID[cortexa710] = "Enable cortex-a710 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa710', ' -mcpu=cortex-a710', '', d)}" + +require conf/machine/include/arm/arch-armv9a.inc + +AVAILTUNES += "cortexa710" +ARMPKGARCH:tune-cortexa710 = "cortexa710" +TUNE_FEATURES:tune-cortexa710 = "aarch64 crypto cortexa710" +PACKAGE_EXTRA_ARCHS:tune-cortexa710 = "${PACKAGE_EXTRA_ARCHS:tune-armv9a-crypto} cortexa710" +BASE_LIB:tune-cortexa710 = "lib64" diff --git a/meta/conf/machine/include/arm/armv9a/tune-cortexa715.inc b/meta/conf/machine/include/arm/armv9a/tune-cortexa715.inc new file mode 100644 index 000000000000..2f6d8c6f8f56 --- /dev/null +++ b/meta/conf/machine/include/arm/armv9a/tune-cortexa715.inc @@ -0,0 +1,15 @@ +# +# Tune Settings for cortex-a715 +# +DEFAULTTUNE ?= "cortexa715" + +TUNEVALID[cortexa715] = "Enable cortex-a715 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa715', ' -mcpu=cortex-a715', '', d)}" + +require conf/machine/include/arm/arch-armv9a.inc + +AVAILTUNES += "cortexa715" +ARMPKGARCH:tune-cortexa715 = "cortexa715" +TUNE_FEATURES:tune-cortexa715 = "aarch64 crypto cortexa715" +PACKAGE_EXTRA_ARCHS:tune-cortexa715 = "${PACKAGE_EXTRA_ARCHS:tune-armv9a-crypto} cortexa715" +BASE_LIB:tune-cortexa715 = "lib64" diff --git a/meta/conf/machine/include/arm/armv9a/tune-cortexx2.inc b/meta/conf/machine/include/arm/armv9a/tune-cortexx2.inc new file mode 100644 index 000000000000..c116e30ff591 --- /dev/null +++ b/meta/conf/machine/include/arm/armv9a/tune-cortexx2.inc @@ -0,0 +1,15 @@ +# +# Tune Settings for cortex-x2 +# +DEFAULTTUNE ?= "cortexx2" + +TUNEVALID[cortexx2] = "Enable cortex-x2 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexx2', ' -mcpu=cortex-x2', '', d)}" + +require conf/machine/include/arm/arch-armv9a.inc + +AVAILTUNES += "cortexx2" +ARMPKGARCH:tune-cortexx2 = "cortexx2" +TUNE_FEATURES:tune-cortexx2 = "aarch64 crypto cortexx2" +PACKAGE_EXTRA_ARCHS:tune-cortexx2 = "${PACKAGE_EXTRA_ARCHS:tune-armv9a-crypto} cortexx2" +BASE_LIB:tune-cortexx2 = "lib64" diff --git a/meta/conf/machine/include/arm/armv9a/tune-cortexx3.inc b/meta/conf/machine/include/arm/armv9a/tune-cortexx3.inc new file mode 100644 index 000000000000..7982079ef86e --- /dev/null +++ b/meta/conf/machine/include/arm/armv9a/tune-cortexx3.inc @@ -0,0 +1,15 @@ +# +# Tune Settings for cortex-x3 +# +DEFAULTTUNE ?= "cortexx3" + +TUNEVALID[cortexx3] = "Enable cortex-x3 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexx3', ' -mcpu=cortex-x3', '', d)}" + +require conf/machine/include/arm/arch-armv9a.inc + +AVAILTUNES += "cortexx3" +ARMPKGARCH:tune-cortexx3 = "cortexx3" +TUNE_FEATURES:tune-cortexx3 = "aarch64 crypto cortexx3" +PACKAGE_EXTRA_ARCHS:tune-cortexx3 = "${PACKAGE_EXTRA_ARCHS:tune-armv9a-crypto} cortexx3" +BASE_LIB:tune-cortexx3 = "lib64" diff --git a/meta/conf/machine/include/arm/armv9a/tune-neoversev2.inc b/meta/conf/machine/include/arm/armv9a/tune-neoversev2.inc new file mode 100644 index 000000000000..5d1e108468d2 --- /dev/null +++ b/meta/conf/machine/include/arm/armv9a/tune-neoversev2.inc @@ -0,0 +1,15 @@ +# +# Tune Settings for neoverse-v2 +# +DEFAULTTUNE ?= "neoversev2" + +TUNEVALID[neoversev2] = "Enable neoverse-v2 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'neoversev2', ' -mcpu=neoverse-v2', '', d)}" + +require conf/machine/include/arm/arch-armv9a.inc + +AVAILTUNES += "neoversev2" +ARMPKGARCH:tune-neoversev2 = "neoversev2" +TUNE_FEATURES:tune-neoversev2 = "aarch64 crypto neoversev2" +PACKAGE_EXTRA_ARCHS:tune-neoversev2 = "${PACKAGE_EXTRA_ARCHS:tune-armv9a-crypto} neoversev2" +BASE_LIB:tune-neoversev2 = "lib64"