Patchwork Add support for the Technologic Systems TS7500 ARM SBCs

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Submitter UDel V2G Team
Date March 29, 2011, 9:46 p.m.
Message ID <1301435199-30068-1-git-send-email-v2g.udel@gmail.com>
Download mbox | patch
Permalink /patch/1859/
State New, archived
Headers show

Comments

UDel V2G Team - March 29, 2011, 9:46 p.m.
From: Sachin Kamboj <skamboj@udel.edu>

* Includes conf/machine/ts75xx.conf and conf/machine/include/tune-fa526.inc
  files needed for building OE packages w/ EABI and *NO* thumb support
* Adds recipes for building TS75xx userspace utilities:
  canctl, dioctl, dmxctl, jed2vme, sdctl, ts7500ctl,  spiflashctl and xuartctl
* Adds a custom kernel with all the patches for the Cavium FA 526 core
* Added a busybox defconfig for building a version of busybox that will be
  very similar to the shipped version
* Added two images - one for building the initrd image and the other for
  building the rootfs image.

Signed-off-by: UDel V2G Team <v2g.udel@gmail.com>
---
 conf/distro/include/angstrom.inc                   |    2 +-
 conf/machine/include/tune-fa526.inc                |   23 +
 conf/machine/ts75xx.conf                           |   22 +
 files/device_table-ts75xx.txt                      |   66 +
 recipes/busybox/busybox-1.13.2/ts75xx/defconfig    |  986 +
 recipes/busybox/busybox-1.18.3/ts75xx/defconfig    |  986 +
 recipes/images/ts75xx-initrd-image.bb              |   89 +
 recipes/images/ts75xx-rootfs-image.bb              |  206 +
 .../ts75xx/cavium-userspace-irq-2.6.35.patch       |  181 +
 recipes/linux/linux-ts75xx-2.6.35/ts75xx/defconfig | 1603 +
 .../linux/linux-ts75xx-2.6.35/ts75xx/defconfig.bak | 1521 +
 .../ts75xx/ts7500-2.6.35.11.patch                  |85527 ++++++++++++++++++++
 .../ts75xx/unionfs-2.5.8_for_2.6.35.11.patch       |11286 +++
 recipes/linux/linux-ts75xx_2.6.35.bb               |  141 +
 recipes/nbd/files/nbd.h                            |  102 +
 recipes/nbd/nbd_2.8.7.bb.changed                   |   31 +
 recipes/ts7500/canctl_0.0.1.bb                     |   29 +
 recipes/ts7500/dioctl_0.0.1.bb                     |   53 +
 recipes/ts7500/dmxctl_0.0.1.bb                     |   23 +
 recipes/ts7500/files/group                         |   22 +
 recipes/ts7500/files/linuxrc-fastboot              |  156 +
 recipes/ts7500/files/linuxrc-nandmount             |  148 +
 recipes/ts7500/files/linuxrc-sdmount               |  136 +
 recipes/ts7500/files/linuxrc-sdroot                |  179 +
 recipes/ts7500/files/linuxrc-sdroot-readonly       |  188 +
 recipes/ts7500/files/linuxrc-usbroot               |  163 +
 recipes/ts7500/files/passwd                        |    9 +
 recipes/ts7500/files/ts-utils.patch                |   68 +
 recipes/ts7500/files/ts7500.subr                   |  633 +
 recipes/ts7500/spictl_0.0.1.bb                     |   26 +
 recipes/ts7500/ts-initrd_0.0.1.bb                  |   46 +
 recipes/ts7500/ts-utils_0.0.1.bb                   |   60 +
 recipes/ts7500/ts7500_0.0.1.bb                     |    7 +
 33 files changed, 104717 insertions(+), 1 deletions(-)
 create mode 100755 conf/machine/include/tune-fa526.inc
 create mode 100755 conf/machine/ts75xx.conf
 create mode 100644 files/device_table-ts75xx.txt
 create mode 100644 recipes/busybox/busybox-1.13.2/ts75xx/defconfig
 create mode 100644 recipes/busybox/busybox-1.18.3/ts75xx/defconfig
 create mode 100644 recipes/images/ts75xx-initrd-image.bb
 create mode 100644 recipes/images/ts75xx-rootfs-image.bb
 create mode 100644 recipes/linux/linux-ts75xx-2.6.35/ts75xx/cavium-userspace-irq-2.6.35.patch
 create mode 100644 recipes/linux/linux-ts75xx-2.6.35/ts75xx/defconfig
 create mode 100644 recipes/linux/linux-ts75xx-2.6.35/ts75xx/defconfig.bak
 create mode 100644 recipes/linux/linux-ts75xx-2.6.35/ts75xx/ts7500-2.6.35.11.patch
 create mode 100644 recipes/linux/linux-ts75xx-2.6.35/ts75xx/unionfs-2.5.8_for_2.6.35.11.patch
 create mode 100644 recipes/linux/linux-ts75xx_2.6.35.bb
 create mode 100644 recipes/nbd/files/nbd.h
 create mode 100644 recipes/nbd/nbd_2.8.7.bb.changed
 create mode 100644 recipes/ts7500/canctl_0.0.1.bb
 create mode 100644 recipes/ts7500/dioctl_0.0.1.bb
 create mode 100644 recipes/ts7500/dmxctl_0.0.1.bb
 create mode 100644 recipes/ts7500/files/group
 create mode 100644 recipes/ts7500/files/linuxrc-fastboot
 create mode 100644 recipes/ts7500/files/linuxrc-nandmount
 create mode 100644 recipes/ts7500/files/linuxrc-sdmount
 create mode 100644 recipes/ts7500/files/linuxrc-sdroot
 create mode 100644 recipes/ts7500/files/linuxrc-sdroot-readonly
 create mode 100644 recipes/ts7500/files/linuxrc-usbroot
 create mode 100644 recipes/ts7500/files/passwd
 create mode 100644 recipes/ts7500/files/ts-utils.patch
 create mode 100644 recipes/ts7500/files/ts7500.subr
 create mode 100644 recipes/ts7500/spictl_0.0.1.bb
 create mode 100644 recipes/ts7500/ts-initrd_0.0.1.bb
 create mode 100644 recipes/ts7500/ts-utils_0.0.1.bb
 create mode 100644 recipes/ts7500/ts7500_0.0.1.bb
Petr Štetiar - March 30, 2011, 6:15 a.m.
UDel V2G Team <v2g.udel@gmail.com> [2011-03-29 17:46:39]:

> From: Sachin Kamboj <skamboj@udel.edu>
> 
> * Includes conf/machine/ts75xx.conf and conf/machine/include/tune-fa526.inc
>   files needed for building OE packages w/ EABI and *NO* thumb support
> * Adds recipes for building TS75xx userspace utilities:
>   canctl, dioctl, dmxctl, jed2vme, sdctl, ts7500ctl,  spiflashctl and xuartctl
> * Adds a custom kernel with all the patches for the Cavium FA 526 core
> * Added a busybox defconfig for building a version of busybox that will be
>   very similar to the shipped version
> * Added two images - one for building the initrd image and the other for
>   building the rootfs image.

Hi,

first of all thank you for your contribution. Please can you split your huge
patchset to the logical parts and send it as the patch series? ie. one patch
which adds ts75xx machine, one which adds kernel etc. It should be easy with
git rebase. It's really hard to make any comments and/or read it.  Thanks.

-- ynezz

Patch

diff --git a/conf/distro/include/angstrom.inc b/conf/distro/include/angstrom.inc
index 5a02723..9ec1dc7 100644
--- a/conf/distro/include/angstrom.inc
+++ b/conf/distro/include/angstrom.inc
@@ -54,7 +54,7 @@  ARM_INSTRUCTION_SET = "${ANGSTROM_ARM_INSTRUCTION_SET}"
 #    but requires more instructions (140% for 70% smaller code) so may be
 #    slower.
 
-THUMB_INTERWORK = "yes"
+THUMB_INTERWORK ?= "yes"
 # "yes" "no"
 #    Whether to compile with code to allow interworking between the two
 #    instruction sets.  This allows thumb code to be executed on a primarily
diff --git a/conf/machine/include/tune-fa526.inc b/conf/machine/include/tune-fa526.inc
new file mode 100755
index 0000000..33bac22
--- /dev/null
+++ b/conf/machine/include/tune-fa526.inc
@@ -0,0 +1,23 @@ 
+# This tune file is for the Faraday FA526 core is used in 
+# ARM processors like the Semi STR8132/ Cavium CNS2132, which is 
+# in the Technologic Systems TS-7500 board in addition to some 
+# NAS boxes out there.
+#
+# This core basically resembles a ARM920T but has NO thumb interworking support
+# which makes it not fully EABI compliant
+# (http://www.mail-archive.com/openocd-development <at> lists.berlios.de/msg05856.html)
+#
+# Hence, we need to diable all thumb instructions here
+# Also be sure to disable all thumb flags/features/includes in the distros 
+
+FEED_ARCH = "armv4"
+BASE_PACKAGE_ARCH = "armv4" 
+
+# Ideally we want the following CFLAGS for our architecture.
+# Angstorm will automtically add the thumb flags, so don't include them here
+# TARGET_CC_ARCH += "-march=armv4 -mno-thumb-interwork -mno-thumb -mfloat-abi=soft"
+TARGET_CC_ARCH += "-march=armv4 -mfloat-abi=soft"
+
+PACKAGE_EXTRA_ARCHS += "armv4"
+LDFLAGS += "-Xlinker --fix-v4bx -Xassembler --fix-v4bx"
+THUMB_INTERWORK = "no"
diff --git a/conf/machine/ts75xx.conf b/conf/machine/ts75xx.conf
new file mode 100755
index 0000000..d76548d
--- /dev/null
+++ b/conf/machine/ts75xx.conf
@@ -0,0 +1,22 @@ 
+#@TYPE: Machine
+#@Name: Technologic Systems TS-75xx SBC
+#@DESCRIPTION: Machine configuration for Technologic Systems TS-75xx SBC
+
+TARGET_ARCH = "arm"
+
+MACHINE_FEATURES = "kernel26 ext2 usbhost"
+
+# This requires cavium fa526 patch set to function
+# See the linux-ts75xx directory for the patches
+PREFERRED_PROVIDER_virtual/kernel = "linux-ts75xx"
+PREFERRED_VERSION_linux = "2.6.35"
+
+SERIAL_CONSOLE = "115200 ttyS0"
+USE_VT = "0"
+
+# Uses the traditional TS-7500 bootloader process
+# See the ts75xx-initrd-image.bb recipe for building
+# an initrd script that only uses EABI userspace utilities
+CMDLINE = "root=/dev/ram0 init=/linuxrc console=/dev/ttyS0,115200 lpj=958464"
+
+require conf/machine/include/tune-fa526.inc
diff --git a/files/device_table-ts75xx.txt b/files/device_table-ts75xx.txt
new file mode 100644
index 0000000..feacaa0
--- /dev/null
+++ b/files/device_table-ts75xx.txt
@@ -0,0 +1,66 @@ 
+#<path> <type> <mode>   <uid>   <gid>   <major> <minor> <start> <inc>   <count>
+#/dev/mem    c      640      0       0       1       1       0        0        -
+#
+#type can be one of: 
+#    f  A regular file
+#    d  Directory
+#    c  Character special device file
+#    b  Block special device file
+#    p  Fifo (named pipe)
+/dev            d       755     0       0       -       -       -       -       -
+/dev/initctl    p       600     0       0       -       -       -       -       -
+/dev/pts	d	775	0	0	-	-	-	-	-
+/dev/shm	d	775	0	0	-	-	-	-	-
+/var		d	775	0	0	-	-	-	-	-
+/boot/var/empty	d	755	0	3	-	-	-	-
+/dev/apm_bios	c	660	0	46	10	134	-	-	-
+/dev/console	c	660	0	5	5	1	-	-
+/dev/full	c	666	0	7	-	-	-
+/dev/i2c0	c	660	0	0	89	0	-	-	-
+/dev/kmem	c	640	0	15	1	2	-	-	-
+/dev/kmsg	c	640	0	0	1	11	-	-	-
+/dev/loop0	b	660	0	11	7	0	-	-	-
+/dev/loop1	b	660	0	11	7	1	-	-	-
+/dev/mem	c	640	0	15	1	1	-	-	-
+/dev/mtd	c	660	0	6	90	0	0	2	8
+/dev/mtdblock	b	640	0	0	31	0	0	1	8
+/dev/nbd0	b	664	0	0	43	0	-	-	-
+/dev/nbd1	b	664	0	0	43	1	-	-	-
+/dev/nbd2	b	664	0	0	43	2	-	-	-
+/dev/nbd3	b	664	0	0	43	3	-	-	-
+/dev/nbd4	b	664	0	0	43	4	-	-	-
+/dev/nbd5	b	664	0	0	43	5	-	-	-
+/dev/nbd6	b	664	0	0	43	6	-	-	-
+/dev/nbd7	b	664	0	0	43	7	-	-	-
+/dev/nbd8	b	664	0	0	43	8	-	-	-
+/dev/nbd9	b	664	0	0	43	9	-	-	-
+/dev/nbd10	b	664	0	0	43	10	-	-	-
+/dev/nbd11	b	664	0	0	43	11	-	-	-
+/dev/nbd12	b	664	0	0	43	12	-	-	-
+/dev/nbd13	b	664	0	0	43	13	-	-	-
+/dev/nbd14	b	664	0	0	43	14	-	-	-
+/dev/nbd15	b	664	0	0	43	15	-	-	-
+/dev/null	c	666	0	0	1	3	-	-	-
+/dev/port	c	640	0	15	1	4	-	-	-
+/dev/ppp	c	640	0	0	108	0	-	-	-
+/dev/psaux	c	660	0	0	10	1	-	-	-
+/dev/ptmx	c	666	0	5	5	2	-	-	-
+/dev/ram0	b	644	0	0	1	0	0	1	4
+/dev/ram1	b	660	0	0	1	1	0	1	4
+/dev/ram2	b	660	0	0	1	2	0	1	4
+/dev/ram3	b	660	0	0	1	3	0	1	4
+/dev/random	c	444	0	0	1	8	-	-	-
+/dev/rtc	c	660	0	47	10	135	-	-	-
+/dev/sda	b	660	0	6	8	0	-	-	-
+/dev/sda1	b	660	0	6	8	1	-	-	-
+/dev/sda2	b	660	0	6	8	2	-	-	-
+/dev/sda3	b	660	0	6	8	3	-	-	-
+/dev/sda4	b	660	0	6	8	4	-	-	-
+/dev/tty	c	664	0	5	5	0	-	-	-
+/dev/ttyS0	c	660	0	5	4	64	0	1	2
+/dev/ttyS1	c	660	0	5	4	65	0	1	2
+/dev/ttyUSB	c	660	0	5	188	0	0	1	2
+/dev/urandom	c	644	0	0	1	9	-	-	-
+/dev/usbdev1.1_ep00	c	660	0	5	254	0	-	-	-
+/dev/usbdev1.1_ep81	c	660	0	5	254	1	-	-	-
+/dev/zero	c	644	0	0	1	5	-	-	-
diff --git a/recipes/busybox/busybox-1.13.2/ts75xx/defconfig b/recipes/busybox/busybox-1.13.2/ts75xx/defconfig
new file mode 100644
index 0000000..4b6658e
--- /dev/null
+++ b/recipes/busybox/busybox-1.13.2/ts75xx/defconfig
@@ -0,0 +1,986 @@ 
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.18.3
+# Thu Mar 24 13:42:39 2011
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_DESKTOP is not set
+# CONFIG_EXTRA_COMPAT is not set
+# CONFIG_INCLUDE_SUSv2 is not set
+# CONFIG_USE_PORTABLE_CODE is not set
+CONFIG_PLATFORM_LINUX=y
+CONFIG_FEATURE_BUFFERS_USE_MALLOC=y
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+CONFIG_FEATURE_COMPRESS_USAGE=y
+# CONFIG_FEATURE_INSTALLER is not set
+# CONFIG_INSTALL_NO_USR is not set
+CONFIG_LOCALE_SUPPORT=y
+CONFIG_UNICODE_SUPPORT=y
+# CONFIG_UNICODE_USING_LOCALE is not set
+# CONFIG_FEATURE_CHECK_UNICODE_IN_ENV is not set
+CONFIG_SUBST_WCHAR=63
+CONFIG_LAST_SUPPORTED_WCHAR=767
+# CONFIG_UNICODE_COMBINING_WCHARS is not set
+# CONFIG_UNICODE_WIDE_WCHARS is not set
+# CONFIG_UNICODE_BIDI_SUPPORT is not set
+# CONFIG_UNICODE_NEUTRAL_TABLE is not set
+# CONFIG_UNICODE_PRESERVE_BROKEN is not set
+CONFIG_LONG_OPTS=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+CONFIG_FEATURE_WTMP=y
+CONFIG_FEATURE_UTMP=y
+CONFIG_FEATURE_PIDFILE=y
+CONFIG_FEATURE_SUID=y
+CONFIG_FEATURE_SUID_CONFIG=y
+CONFIG_FEATURE_SUID_CONFIG_QUIET=y
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+# CONFIG_FEATURE_HAVE_RPC is not set
+
+#
+# Build Options
+#
+# CONFIG_STATIC is not set
+# CONFIG_PIE is not set
+# CONFIG_NOMMU is not set
+# CONFIG_BUILD_LIBBUSYBOX is not set
+# CONFIG_FEATURE_INDIVIDUAL is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+CONFIG_LFS=y
+CONFIG_CROSS_COMPILER_PREFIX=""
+CONFIG_EXTRA_CFLAGS=""
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_PESSIMIZE is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+
+#
+# Installation Options ("make install" behavior)
+#
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+# CONFIG_INSTALL_SH_APPLET_SYMLINK is not set
+# CONFIG_INSTALL_SH_APPLET_HARDLINK is not set
+# CONFIG_INSTALL_SH_APPLET_SCRIPT_WRAPPER is not set
+CONFIG_PREFIX="./_install"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SIZE_VS_SPEED=2
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+# CONFIG_FEATURE_EDITING_VI is not set
+CONFIG_FEATURE_EDITING_HISTORY=64
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+CONFIG_FEATURE_USERNAME_COMPLETION=y
+CONFIG_FEATURE_EDITING_FANCY_PROMPT=y
+# CONFIG_FEATURE_EDITING_ASK_TERMINAL is not set
+CONFIG_FEATURE_NON_POSIX_CP=y
+CONFIG_FEATURE_VERBOSE_CP_MESSAGE=y
+CONFIG_FEATURE_COPYBUF_KB=4
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
+CONFIG_FEATURE_HWIB=y
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+CONFIG_FEATURE_SEAMLESS_XZ=y
+# CONFIG_FEATURE_SEAMLESS_LZMA is not set
+CONFIG_FEATURE_SEAMLESS_BZ2=y
+CONFIG_FEATURE_SEAMLESS_GZ=y
+CONFIG_FEATURE_SEAMLESS_Z=y
+CONFIG_AR=y
+# CONFIG_FEATURE_AR_LONG_FILENAMES is not set
+CONFIG_FEATURE_AR_CREATE=y
+CONFIG_BUNZIP2=y
+# CONFIG_BZIP2 is not set
+CONFIG_CPIO=y
+# CONFIG_FEATURE_CPIO_O is not set
+# CONFIG_FEATURE_CPIO_P is not set
+# CONFIG_DPKG is not set
+# CONFIG_DPKG_DEB is not set
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+CONFIG_GUNZIP=y
+CONFIG_GZIP=y
+CONFIG_FEATURE_GZIP_LONG_OPTIONS=y
+CONFIG_LZOP=y
+# CONFIG_LZOP_COMPR_HIGH is not set
+# CONFIG_RPM2CPIO is not set
+# CONFIG_RPM is not set
+CONFIG_TAR=y
+CONFIG_FEATURE_TAR_CREATE=y
+CONFIG_FEATURE_TAR_AUTODETECT=y
+CONFIG_FEATURE_TAR_FROM=y
+CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY=y
+# CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY is not set
+CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
+CONFIG_FEATURE_TAR_LONG_OPTIONS=y
+CONFIG_FEATURE_TAR_TO_COMMAND=y
+CONFIG_FEATURE_TAR_UNAME_GNAME=y
+CONFIG_FEATURE_TAR_NOPRESERVE_TIME=y
+# CONFIG_FEATURE_TAR_SELINUX is not set
+# CONFIG_UNCOMPRESS is not set
+# CONFIG_UNLZMA is not set
+# CONFIG_FEATURE_LZMA_FAST is not set
+# CONFIG_LZMA is not set
+CONFIG_UNXZ=y
+CONFIG_XZ=y
+CONFIG_UNZIP=y
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+# CONFIG_FEATURE_DATE_NANO is not set
+CONFIG_FEATURE_DATE_COMPAT=y
+CONFIG_TEST=y
+# CONFIG_FEATURE_TEST_64 is not set
+CONFIG_TR=y
+CONFIG_FEATURE_TR_CLASSES=y
+# CONFIG_FEATURE_TR_EQUIV is not set
+# CONFIG_BASE64=y
+# CONFIG_CAL is not set
+# CONFIG_CATV is not set
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_FEATURE_CHOWN_LONG_OPTIONS=y
+CONFIG_CHROOT=y
+# CONFIG_CKSUM is not set
+# CONFIG_COMM is not set
+CONFIG_CP=y
+CONFIG_FEATURE_CP_LONG_OPTIONS=y
+CONFIG_CUT=y
+CONFIG_DD=y
+CONFIG_FEATURE_DD_SIGNAL_HANDLING=y
+CONFIG_FEATURE_DD_THIRD_STATUS_LINE=y
+# CONFIG_FEATURE_DD_IBS_OBS is not set
+CONFIG_DF=y
+CONFIG_FEATURE_DF_FANCY=y
+CONFIG_DIRNAME=y
+# CONFIG_DOS2UNIX is not set
+# CONFIG_UNIX2DOS is not set
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+CONFIG_FEATURE_ENV_LONG_OPTIONS=y
+# CONFIG_EXPAND is not set
+# CONFIG_FEATURE_EXPAND_LONG_OPTIONS is not set
+CONFIG_EXPR=y
+# CONFIG_EXPR_MATH_SUPPORT_64 is not set
+CONFIG_FALSE=y
+# CONFIG_FOLD is not set
+CONFIG_FSYNC=y
+CONFIG_HEAD=y
+CONFIG_FEATURE_FANCY_HEAD=y
+# CONFIG_HOSTID is not set
+CONFIG_ID=y
+# CONFIG_INSTALL is not set
+# CONFIG_FEATURE_INSTALL_LONG_OPTIONS is not set
+# CONFIG_LENGTH is not set
+CONFIG_LN=y
+CONFIG_LOGNAME=y
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+# CONFIG_FEATURE_LS_COLOR_IS_DEFAULT is not set
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+CONFIG_FEATURE_MKDIR_LONG_OPTIONS=y
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+CONFIG_FEATURE_MV_LONG_OPTIONS=y
+CONFIG_NICE=y
+CONFIG_NOHUP=y
+CONFIG_OD=y
+# CONFIG_PRINTENV is not set
+CONFIG_PRINTF=y
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+CONFIG_REALPATH=y
+CONFIG_RM=y
+CONFIG_RMDIR=y
+CONFIG_FEATURE_RMDIR_LONG_OPTIONS=y
+CONFIG_SEQ=y
+# CONFIG_SHA1SUM is not set
+CONFIG_SHA256SUM=y
+CONFIG_SHA512SUM=y
+CONFIG_SLEEP=y
+CONFIG_FEATURE_FANCY_SLEEP=y
+CONFIG_FEATURE_FLOAT_SLEEP=y
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+# CONFIG_SPLIT is not set
+# CONFIG_FEATURE_SPLIT_FANCY is not set
+# CONFIG_STAT is not set
+# CONFIG_FEATURE_STAT_FORMAT is not set
+CONFIG_STTY=y
+# CONFIG_SUM is not set
+CONFIG_SYNC=y
+# CONFIG_TAC is not set
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+CONFIG_TEE=y
+CONFIG_FEATURE_TEE_USE_BLOCK_IO=y
+CONFIG_TOUCH=y
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+# CONFIG_UNEXPAND is not set
+# CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS is not set
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+CONFIG_UUDECODE=y
+CONFIG_UUENCODE=y
+CONFIG_WC=y
+# CONFIG_FEATURE_WC_LARGE is not set
+CONFIG_WHO=y
+CONFIG_WHOAMI=y
+CONFIG_YES=y
+
+#
+# Common options for cp and mv
+#
+# CONFIG_FEATURE_PRESERVE_HARDLINKS is not set
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum, sha256sum, sha512sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+CONFIG_CHVT=y
+CONFIG_FGCONSOLE=y
+CONFIG_CLEAR=y
+CONFIG_DEALLOCVT=y
+CONFIG_DUMPKMAP=y
+# CONFIG_KBD_MODE is not set
+CONFIG_LOADFONT=y
+CONFIG_LOADKMAP=y
+CONFIG_OPENVT=y
+CONFIG_RESET=y
+# CONFIG_RESIZE is not set
+# CONFIG_FEATURE_RESIZE_PRINT is not set
+CONFIG_SETCONSOLE=y
+# CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS is not set
+CONFIG_SETFONT=y
+CONFIG_FEATURE_SETFONT_TEXTUAL_MAP=y
+CONFIG_DEFAULT_SETFONT_DIR=""
+# CONFIG_SETKEYCODES is not set
+# CONFIG_SETLOGCONS is not set
+CONFIG_SHOWKEY=y
+
+#
+# Common options for loadfont and setfont
+#
+CONFIG_FEATURE_LOADFONT_PSF2=y
+CONFIG_FEATURE_LOADFONT_RAW=y
+
+#
+# Debian Utilities
+#
+# CONFIG_MKTEMP is not set
+# CONFIG_PIPE_PROGRESS is not set
+# CONFIG_RUN_PARTS is not set
+# CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS is not set
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+# CONFIG_START_STOP_DAEMON is not set
+# CONFIG_FEATURE_START_STOP_DAEMON_FANCY is not set
+# CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS is not set
+# CONFIG_WHICH is not set
+
+#
+# Editors
+#
+# CONFIG_PATCH is not set
+# CONFIG_AWK is not set
+# CONFIG_FEATURE_AWK_LIBM is not set
+CONFIG_CMP=y
+# CONFIG_DIFF is not set
+# CONFIG_FEATURE_DIFF_LONG_OPTIONS is not set
+# CONFIG_FEATURE_DIFF_DIR is not set
+# CONFIG_ED is not set
+CONFIG_SED=y
+# CONFIG_VI is not set
+CONFIG_FEATURE_VI_MAX_LEN=0
+# CONFIG_FEATURE_VI_8BIT is not set
+# CONFIG_FEATURE_VI_COLON is not set
+# CONFIG_FEATURE_VI_YANKMARK is not set
+# CONFIG_FEATURE_VI_SEARCH is not set
+# CONFIG_FEATURE_VI_USE_SIGNALS is not set
+# CONFIG_FEATURE_VI_DOT_CMD is not set
+# CONFIG_FEATURE_VI_READONLY is not set
+# CONFIG_FEATURE_VI_SETOPTS is not set
+# CONFIG_FEATURE_VI_SET is not set
+# CONFIG_FEATURE_VI_WIN_RESIZE is not set
+# CONFIG_FEATURE_VI_ASK_TERMINAL is not set
+# CONFIG_FEATURE_VI_OPTIMIZE_CURSOR is not set
+# CONFIG_FEATURE_ALLOW_EXEC is not set
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_FEATURE_FIND_LINKS=y
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+CONFIG_XARGS=y
+# CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION is not set
+CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y
+CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y
+CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y
+
+#
+# Init Utilities
+#
+# CONFIG_BOOTCHARTD is not set
+# CONFIG_FEATURE_BOOTCHARTD_BLOATED_HEADER is not set
+# CONFIG_FEATURE_BOOTCHARTD_CONFIG_FILE is not set
+# CONFIG_HALT is not set
+# CONFIG_FEATURE_CALL_TELINIT is not set
+CONFIG_TELINIT_PATH=""
+# CONFIG_INIT is not set
+# CONFIG_FEATURE_USE_INITTAB is not set
+# CONFIG_FEATURE_KILL_REMOVED is not set
+CONFIG_FEATURE_KILL_DELAY=0
+# CONFIG_FEATURE_INIT_SCTTY is not set
+# CONFIG_FEATURE_INIT_SYSLOG is not set
+# CONFIG_FEATURE_EXTRA_QUIET is not set
+# CONFIG_FEATURE_INIT_COREDUMPS is not set
+# CONFIG_FEATURE_INITRD is not set
+CONFIG_INIT_TERMINAL_TYPE=""
+# CONFIG_MESG is not set
+
+#
+# Login/Password Management Utilities
+#
+# CONFIG_ADD_SHELL is not set
+# CONFIG_REMOVE_SHELL is not set
+# CONFIG_FEATURE_SHADOWPASSWDS is not set
+# CONFIG_USE_BB_PWD_GRP is not set
+# CONFIG_USE_BB_SHADOW is not set
+# CONFIG_USE_BB_CRYPT is not set
+# CONFIG_USE_BB_CRYPT_SHA is not set
+# CONFIG_ADDUSER is not set
+# CONFIG_FEATURE_ADDUSER_LONG_OPTIONS is not set
+# CONFIG_FEATURE_CHECK_NAMES is not set
+CONFIG_FIRST_SYSTEM_ID=0
+CONFIG_LAST_SYSTEM_ID=0
+# CONFIG_ADDGROUP is not set
+# CONFIG_FEATURE_ADDGROUP_LONG_OPTIONS is not set
+# CONFIG_FEATURE_ADDUSER_TO_GROUP is not set
+# CONFIG_DELUSER is not set
+# CONFIG_DELGROUP is not set
+# CONFIG_FEATURE_DEL_USER_FROM_GROUP is not set
+CONFIG_GETTY=y
+CONFIG_LOGIN=y
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+# CONFIG_PASSWD is not set
+# CONFIG_FEATURE_PASSWD_WEAK_CHECK is not set
+# CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
+# CONFIG_SU is not set
+# CONFIG_FEATURE_SU_SYSLOG is not set
+# CONFIG_FEATURE_SU_CHECKS_SHELLS is not set
+# CONFIG_SULOGIN is not set
+# CONFIG_VLOCK is not set
+
+#
+# Linux Ext2 FS Progs
+#
+CONFIG_CHATTR=y
+CONFIG_FSCK=y
+# CONFIG_LSATTR is not set
+# CONFIG_TUNE2FS is not set
+
+#
+# Linux Module Utilities
+#
+CONFIG_MODINFO=y
+# CONFIG_MODPROBE_SMALL is not set
+# CONFIG_FEATURE_MODPROBE_SMALL_OPTIONS_ON_CMDLINE is not set
+# CONFIG_FEATURE_MODPROBE_SMALL_CHECK_ALREADY_LOADED is not set
+CONFIG_INSMOD=y
+CONFIG_RMMOD=y
+CONFIG_LSMOD=y
+CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT=y
+CONFIG_MODPROBE=y
+CONFIG_FEATURE_MODPROBE_BLACKLIST=y
+# CONFIG_DEPMOD is not set
+
+#
+# Options common to multiple modutils
+#
+# CONFIG_FEATURE_2_4_MODULES is not set
+# CONFIG_FEATURE_INSMOD_TRY_MMAP is not set
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+# CONFIG_FEATURE_INSMOD_LOAD_MAP is not set
+# CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL is not set
+CONFIG_FEATURE_CHECK_TAINTED_MODULE=y
+CONFIG_FEATURE_MODUTILS_ALIAS=y
+CONFIG_FEATURE_MODUTILS_SYMBOLS=y
+CONFIG_DEFAULT_MODULES_DIR="/lib/modules"
+CONFIG_DEFAULT_DEPMOD_FILE="modules.dep"
+
+#
+# Linux System Utilities
+#
+# CONFIG_BLOCKDEV is not set
+# CONFIG_REV is not set
+# CONFIG_ACPID is not set
+# CONFIG_FEATURE_ACPID_COMPAT is not set
+# CONFIG_BLKID is not set
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+# CONFIG_FBSET is not set
+# CONFIG_FEATURE_FBSET_FANCY is not set
+# CONFIG_FEATURE_FBSET_READMODE is not set
+# CONFIG_FDFLUSH is not set
+# CONFIG_FDFORMAT is not set
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+CONFIG_FEATURE_FDISK_WRITABLE=y
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+CONFIG_FEATURE_OSF_LABEL=y
+# CONFIG_FEATURE_GPT_LABEL is not set
+CONFIG_FEATURE_FDISK_ADVANCED=y
+# CONFIG_FINDFS is not set
+# CONFIG_FLOCK is not set
+CONFIG_FREERAMDISK=y
+# CONFIG_FSCK_MINIX is not set
+CONFIG_MKFS_EXT2=y
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+# CONFIG_MKFS_REISER is not set
+CONFIG_MKFS_VFAT=y
+CONFIG_GETOPT=y
+CONFIG_FEATURE_GETOPT_LONG=y
+# CONFIG_HEXDUMP is not set
+# CONFIG_FEATURE_HEXDUMP_REVERSE is not set
+# CONFIG_HD is not set
+# CONFIG_HWCLOCK is not set
+# CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS is not set
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+# CONFIG_IPCRM is not set
+# CONFIG_IPCS is not set
+# CONFIG_LOSETUP is not set
+# CONFIG_LSPCI is not set
+# CONFIG_LSUSB is not set
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_RENAME=y
+CONFIG_FEATURE_MDEV_RENAME_REGEXP=y
+CONFIG_FEATURE_MDEV_EXEC=y
+CONFIG_FEATURE_MDEV_LOAD_FIRMWARE=y
+# CONFIG_MKSWAP is not set
+# CONFIG_FEATURE_MKSWAP_UUID is not set
+CONFIG_MORE=y
+CONFIG_MOUNT=y
+# CONFIG_FEATURE_MOUNT_FAKE is not set
+CONFIG_FEATURE_MOUNT_VERBOSE=y
+CONFIG_FEATURE_MOUNT_HELPERS=y
+# CONFIG_FEATURE_MOUNT_LABEL is not set
+# CONFIG_FEATURE_MOUNT_NFS is not set
+# CONFIG_FEATURE_MOUNT_CIFS is not set
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+CONFIG_PIVOT_ROOT=y
+# CONFIG_RDATE is not set
+# CONFIG_RDEV is not set
+# CONFIG_READPROFILE is not set
+# CONFIG_RTCWAKE is not set
+# CONFIG_SCRIPT is not set
+# CONFIG_SCRIPTREPLAY is not set
+# CONFIG_SETARCH is not set
+# CONFIG_SWAPONOFF is not set
+# CONFIG_FEATURE_SWAPON_PRI is not set
+CONFIG_SWITCH_ROOT=y
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+CONFIG_FEATURE_MOUNT_LOOP=y
+CONFIG_FEATURE_MOUNT_LOOP_CREATE=y
+# CONFIG_FEATURE_MTAB_SUPPORT is not set
+# CONFIG_VOLUMEID is not set
+# CONFIG_FEATURE_VOLUMEID_EXT is not set
+# CONFIG_FEATURE_VOLUMEID_BTRFS is not set
+# CONFIG_FEATURE_VOLUMEID_REISERFS is not set
+# CONFIG_FEATURE_VOLUMEID_FAT is not set
+# CONFIG_FEATURE_VOLUMEID_HFS is not set
+# CONFIG_FEATURE_VOLUMEID_JFS is not set
+# CONFIG_FEATURE_VOLUMEID_XFS is not set
+# CONFIG_FEATURE_VOLUMEID_NTFS is not set
+# CONFIG_FEATURE_VOLUMEID_ISO9660 is not set
+# CONFIG_FEATURE_VOLUMEID_UDF is not set
+# CONFIG_FEATURE_VOLUMEID_LUKS is not set
+# CONFIG_FEATURE_VOLUMEID_LINUXSWAP is not set
+# CONFIG_FEATURE_VOLUMEID_CRAMFS is not set
+# CONFIG_FEATURE_VOLUMEID_ROMFS is not set
+# CONFIG_FEATURE_VOLUMEID_SYSV is not set
+# CONFIG_FEATURE_VOLUMEID_OCFS2 is not set
+# CONFIG_FEATURE_VOLUMEID_LINUXRAID is not set
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_CONSPY is not set
+# CONFIG_NANDWRITE is not set
+# CONFIG_NANDDUMP is not set
+# CONFIG_UBIATTACH is not set
+# CONFIG_UBIDETACH is not set
+# CONFIG_ADJTIMEX is not set
+# CONFIG_BBCONFIG is not set
+# CONFIG_FEATURE_COMPRESS_BBCONFIG is not set
+# CONFIG_BEEP is not set
+CONFIG_FEATURE_BEEP_FREQ=0
+CONFIG_FEATURE_BEEP_LENGTH_MS=0
+# CONFIG_CHAT is not set
+# CONFIG_FEATURE_CHAT_NOFAIL is not set
+# CONFIG_FEATURE_CHAT_TTY_HIFI is not set
+# CONFIG_FEATURE_CHAT_IMPLICIT_CR is not set
+# CONFIG_FEATURE_CHAT_SWALLOW_OPTS is not set
+# CONFIG_FEATURE_CHAT_SEND_ESCAPES is not set
+# CONFIG_FEATURE_CHAT_VAR_ABORT_LEN is not set
+# CONFIG_FEATURE_CHAT_CLR_ABORT is not set
+# CONFIG_CHRT is not set
+# CONFIG_CROND is not set
+# CONFIG_FEATURE_CROND_D is not set
+# CONFIG_FEATURE_CROND_CALL_SENDMAIL is not set
+CONFIG_FEATURE_CROND_DIR=""
+# CONFIG_CRONTAB is not set
+# CONFIG_DC is not set
+# CONFIG_FEATURE_DC_LIBM is not set
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+CONFIG_DEVMEM=y
+# CONFIG_EJECT is not set
+# CONFIG_FEATURE_EJECT_SCSI is not set
+# CONFIG_FBSPLASH is not set
+# CONFIG_FLASHCP is not set
+# CONFIG_FLASH_LOCK is not set
+# CONFIG_FLASH_UNLOCK is not set
+# CONFIG_FLASH_ERASEALL is not set
+# CONFIG_IONICE is not set
+# CONFIG_INOTIFYD is not set
+# CONFIG_LAST is not set
+# CONFIG_FEATURE_LAST_SMALL is not set
+# CONFIG_FEATURE_LAST_FANCY is not set
+# CONFIG_LESS is not set
+CONFIG_FEATURE_LESS_MAXLINES=0
+# CONFIG_FEATURE_LESS_BRACKETS is not set
+# CONFIG_FEATURE_LESS_FLAGS is not set
+# CONFIG_FEATURE_LESS_MARKS is not set
+# CONFIG_FEATURE_LESS_REGEXP is not set
+# CONFIG_FEATURE_LESS_WINCH is not set
+# CONFIG_FEATURE_LESS_DASHCMD is not set
+# CONFIG_FEATURE_LESS_LINENUMS is not set
+# CONFIG_HDPARM is not set
+# CONFIG_FEATURE_HDPARM_GET_IDENTITY is not set
+# CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET is not set
+# CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA is not set
+# CONFIG_MAKEDEVS is not set
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+# CONFIG_FEATURE_MAKEDEVS_TABLE is not set
+# CONFIG_MAN is not set
+# CONFIG_MICROCOM is not set
+# CONFIG_MOUNTPOINT is not set
+# CONFIG_MT is not set
+# CONFIG_RAIDAUTORUN is not set
+CONFIG_READAHEAD=y
+# CONFIG_RFKILL is not set
+# CONFIG_RUNLEVEL is not set
+# CONFIG_RX is not set
+CONFIG_SETSID=y
+# CONFIG_STRINGS is not set
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+# CONFIG_TIME is not set
+# CONFIG_TIMEOUT is not set
+# CONFIG_TTYSIZE is not set
+# CONFIG_VOLNAME is not set
+# CONFIG_WALL is not set
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_NBDCLIENT=y
+# CONFIG_NC=y
+# CONFIG_NC_SERVER=y
+# CONFIG_NC_EXTRA=y
+# CONFIG_NC_110_COMPAT is not set
+CONFIG_FEATURE_IPV6=y
+# CONFIG_FEATURE_UNIX_LOCAL is not set
+CONFIG_FEATURE_PREFER_IPV4_ADDRESS=y
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+# CONFIG_ARP is not set
+# CONFIG_ARPING is not set
+# CONFIG_BRCTL is not set
+# CONFIG_FEATURE_BRCTL_FANCY is not set
+# CONFIG_FEATURE_BRCTL_SHOW is not set
+# CONFIG_DNSD is not set
+# CONFIG_ETHER_WAKE is not set
+# CONFIG_FAKEIDENTD is not set
+# CONFIG_FTPD=y
+# CONFIG_FEATURE_FTP_WRITE=y
+# CONFIG_FEATURE_FTPD_ACCEPT_BROKEN_LIST=y
+# CONFIG_FTPGET is not set
+# CONFIG_FTPPUT is not set
+# CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS is not set
+CONFIG_HOSTNAME=y
+# CONFIG_HTTPD=y
+# CONFIG_FEATURE_HTTPD_RANGES=y
+# CONFIG_FEATURE_HTTPD_USE_SENDFILE=y
+# CONFIG_FEATURE_HTTPD_SETUID=y
+# CONFIG_FEATURE_HTTPD_BASIC_AUTH=y
+# CONFIG_FEATURE_HTTPD_AUTH_MD5=y
+# CONFIG_FEATURE_HTTPD_CGI=y
+# CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR=y
+# CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV=y
+# CONFIG_FEATURE_HTTPD_ENCODE_URL_STR=y
+# CONFIG_FEATURE_HTTPD_ERROR_PAGES=y
+# CONFIG_FEATURE_HTTPD_PROXY=y
+# CONFIG_FEATURE_HTTPD_GZIP=y
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+# CONFIG_FEATURE_IFCONFIG_SLIP is not set
+# CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set
+CONFIG_FEATURE_IFCONFIG_HW=y
+CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS=y
+# CONFIG_IFENSLAVE is not set
+CONFIG_IFPLUGD=y
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+# CONFIG_FEATURE_IFUPDOWN_IP is not set
+# CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+CONFIG_FEATURE_IFUPDOWN_IPV6=y
+CONFIG_FEATURE_IFUPDOWN_MAPPING=y
+# CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP is not set
+# CONFIG_INETD is not set
+# CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO is not set
+# CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD is not set
+# CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME is not set
+# CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME is not set
+# CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN is not set
+# CONFIG_FEATURE_INETD_RPC is not set
+CONFIG_IP=y
+CONFIG_FEATURE_IP_ADDRESS=y
+CONFIG_FEATURE_IP_LINK=y
+CONFIG_FEATURE_IP_ROUTE=y
+CONFIG_FEATURE_IP_TUNNEL=y
+# CONFIG_FEATURE_IP_RULE is not set
+# CONFIG_FEATURE_IP_SHORT_FORMS is not set
+# CONFIG_FEATURE_IP_RARE_PROTOCOLS is not set
+# CONFIG_IPADDR is not set
+# CONFIG_IPLINK is not set
+# CONFIG_IPROUTE is not set
+# CONFIG_IPTUNNEL is not set
+# CONFIG_IPRULE is not set
+# CONFIG_IPCALC is not set
+# CONFIG_FEATURE_IPCALC_FANCY is not set
+# CONFIG_FEATURE_IPCALC_LONG_OPTIONS is not set
+# CONFIG_NAMEIF is not set
+# CONFIG_FEATURE_NAMEIF_EXTENDED is not set
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_FEATURE_NETSTAT_PRG=y
+CONFIG_NSLOOKUP=y
+CONFIG_NTPD=y
+CONFIG_FEATURE_NTPD_SERVER=y
+CONFIG_PING=y
+CONFIG_PING6=y
+CONFIG_FEATURE_FANCY_PING=y
+# CONFIG_PSCAN is not set
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+# CONFIG_TCPSVD is not set
+CONFIG_TELNET=y
+# CONFIG_FEATURE_TELNET_TTYPE is not set
+CONFIG_FEATURE_TELNET_AUTOLOGIN=y
+CONFIG_TELNETD=y
+# CONFIG_FEATURE_TELNETD_STANDALONE is not set
+# CONFIG_FEATURE_TELNETD_INETD_WAIT is not set
+# CONFIG_TFTP=y
+# CONFIG_TFTPD is not set
+
+#
+# Common options for tftp/tftpd
+#
+# CONFIG_FEATURE_TFTP_GET=y
+# CONFIG_FEATURE_TFTP_PUT=y
+# CONFIG_FEATURE_TFTP_BLOCKSIZE is not set
+# CONFIG_FEATURE_TFTP_PROGRESS_BAR is not set
+# CONFIG_TFTP_DEBUG is not set
+# CONFIG_TRACEROUTE=y
+# CONFIG_TRACEROUTE6=y
+# CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE=y
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP=y
+# CONFIG_TUNCTL=y
+CONFIG_FEATURE_TUNCTL_UG=y
+CONFIG_UDHCPD=y
+CONFIG_DHCPRELAY=y
+CONFIG_DUMPLEASES=y
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
+CONFIG_DHCPD_LEASES_FILE="/var/lib/misc/udhcpd.leases"
+CONFIG_UDHCPC=y
+CONFIG_FEATURE_UDHCPC_ARPING=y
+# CONFIG_FEATURE_UDHCP_PORT is not set
+CONFIG_UDHCP_DEBUG=9
+# CONFIG_FEATURE_UDHCP_RFC3397 is not set
+CONFIG_UDHCPC_DEFAULT_SCRIPT="@DATADIR@/udhcpc/default.script"
+CONFIG_UDHCPC_SLACK_FOR_BUGGY_SERVERS=80
+CONFIG_IFUPDOWN_UDHCPC_CMD_OPTIONS="-R -n"
+# CONFIG_UDPSVD is not set
+# CONFIG_VCONFIG is not set
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+CONFIG_FEATURE_WGET_LONG_OPTIONS=y
+CONFIG_FEATURE_WGET_TIMEOUT=y
+# CONFIG_ZCIP is not set
+
+#
+# Print Utilities
+#
+# CONFIG_LPD is not set
+# CONFIG_LPR is not set
+# CONFIG_LPQ is not set
+
+#
+# Mail Utilities
+#
+# CONFIG_MAKEMIME is not set
+CONFIG_FEATURE_MIME_CHARSET=""
+# CONFIG_POPMAILDIR is not set
+# CONFIG_FEATURE_POPMAILDIR_DELIVERY is not set
+# CONFIG_REFORMIME is not set
+# CONFIG_FEATURE_REFORMIME_COMPAT is not set
+# CONFIG_SENDMAIL is not set
+
+#
+# Process Utilities
+#
+# CONFIG_IOSTAT is not set
+# CONFIG_MPSTAT is not set
+# CONFIG_PMAP is not set
+# CONFIG_POWERTOP is not set
+# CONFIG_SMEMCAP is not set
+# CONFIG_FREE is not set
+# CONFIG_FUSER is not set
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+# CONFIG_KILLALL5 is not set
+# CONFIG_NMETER is not set
+# CONFIG_PGREP is not set
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+# CONFIG_PKILL is not set
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+# CONFIG_FEATURE_PS_TIME is not set
+# CONFIG_FEATURE_PS_ADDITIONAL_COLUMNS is not set
+# CONFIG_FEATURE_PS_UNUSUAL_SYSTEMS is not set
+# CONFIG_RENICE is not set
+# CONFIG_BB_SYSCTL is not set
+# CONFIG_TOP is not set
+# CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE is not set
+# CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS is not set
+# CONFIG_FEATURE_TOP_SMP_CPU is not set
+# CONFIG_FEATURE_TOP_DECIMALS is not set
+# CONFIG_FEATURE_TOP_SMP_PROCESS is not set
+# CONFIG_FEATURE_TOPMEM is not set
+# CONFIG_FEATURE_SHOW_THREADS is not set
+# CONFIG_UPTIME is not set
+# CONFIG_WATCH is not set
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_FEATURE_RUNSVDIR_LOG is not set
+# CONFIG_SV is not set
+CONFIG_SV_DEFAULT_SERVICE_DIR=""
+# CONFIG_SVLOGD is not set
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+# CONFIG_ENVDIR is not set
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+# CONFIG_SETSEBOOL is not set
+# CONFIG_SESTATUS is not set
+
+#
+# Shells
+#
+CONFIG_ASH=y
+CONFIG_ASH_BASH_COMPAT=y
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_GETOPTS=y
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_PRINTF=y
+CONFIG_ASH_BUILTIN_TEST=y
+# CONFIG_ASH_CMDCMD is not set
+# CONFIG_ASH_MAIL is not set
+# CONFIG_ASH_OPTIMIZE_FOR_SIZE is not set
+# CONFIG_ASH_RANDOM_SUPPORT is not set
+CONFIG_ASH_EXPAND_PRMT=y
+CONFIG_CTTYHACK=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_BASH_COMPAT is not set
+# CONFIG_HUSH_BRACE_EXPANSION is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_SAVEHISTORY is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_HUSH_CASE is not set
+# CONFIG_HUSH_FUNCTIONS is not set
+# CONFIG_HUSH_LOCAL is not set
+# CONFIG_HUSH_RANDOM_SUPPORT is not set
+# CONFIG_HUSH_EXPORT_N is not set
+# CONFIG_HUSH_MODE_X is not set
+# CONFIG_MSH is not set
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+# CONFIG_FEATURE_BASH_IS_ASH is not set
+# CONFIG_FEATURE_BASH_IS_HUSH is not set
+CONFIG_FEATURE_BASH_IS_NONE=y
+CONFIG_SH_MATH_SUPPORT=y
+CONFIG_SH_MATH_SUPPORT_64=y
+CONFIG_FEATURE_SH_EXTRA_QUIET=y
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_FEATURE_SH_NOFORK is not set
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+CONFIG_FEATURE_REMOTE_LOG=y
+CONFIG_FEATURE_SYSLOGD_DUP=y
+CONFIG_FEATURE_SYSLOGD_READ_BUFFER_SIZE=256
+CONFIG_FEATURE_IPC_SYSLOG=y
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=16
+CONFIG_LOGREAD=y
+CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING=y
+CONFIG_KLOGD=y
+CONFIG_FEATURE_KLOGD_KLOGCTL=y
+CONFIG_LOGGER=y
diff --git a/recipes/busybox/busybox-1.18.3/ts75xx/defconfig b/recipes/busybox/busybox-1.18.3/ts75xx/defconfig
new file mode 100644
index 0000000..4b6658e
--- /dev/null
+++ b/recipes/busybox/busybox-1.18.3/ts75xx/defconfig
@@ -0,0 +1,986 @@ 
+#
+# Automatically generated make config: don't edit
+# Busybox version: 1.18.3
+# Thu Mar 24 13:42:39 2011
+#
+CONFIG_HAVE_DOT_CONFIG=y
+
+#
+# Busybox Settings
+#
+
+#
+# General Configuration
+#
+# CONFIG_DESKTOP is not set
+# CONFIG_EXTRA_COMPAT is not set
+# CONFIG_INCLUDE_SUSv2 is not set
+# CONFIG_USE_PORTABLE_CODE is not set
+CONFIG_PLATFORM_LINUX=y
+CONFIG_FEATURE_BUFFERS_USE_MALLOC=y
+# CONFIG_FEATURE_BUFFERS_GO_ON_STACK is not set
+# CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set
+CONFIG_SHOW_USAGE=y
+CONFIG_FEATURE_VERBOSE_USAGE=y
+CONFIG_FEATURE_COMPRESS_USAGE=y
+# CONFIG_FEATURE_INSTALLER is not set
+# CONFIG_INSTALL_NO_USR is not set
+CONFIG_LOCALE_SUPPORT=y
+CONFIG_UNICODE_SUPPORT=y
+# CONFIG_UNICODE_USING_LOCALE is not set
+# CONFIG_FEATURE_CHECK_UNICODE_IN_ENV is not set
+CONFIG_SUBST_WCHAR=63
+CONFIG_LAST_SUPPORTED_WCHAR=767
+# CONFIG_UNICODE_COMBINING_WCHARS is not set
+# CONFIG_UNICODE_WIDE_WCHARS is not set
+# CONFIG_UNICODE_BIDI_SUPPORT is not set
+# CONFIG_UNICODE_NEUTRAL_TABLE is not set
+# CONFIG_UNICODE_PRESERVE_BROKEN is not set
+CONFIG_LONG_OPTS=y
+CONFIG_FEATURE_DEVPTS=y
+# CONFIG_FEATURE_CLEAN_UP is not set
+CONFIG_FEATURE_WTMP=y
+CONFIG_FEATURE_UTMP=y
+CONFIG_FEATURE_PIDFILE=y
+CONFIG_FEATURE_SUID=y
+CONFIG_FEATURE_SUID_CONFIG=y
+CONFIG_FEATURE_SUID_CONFIG_QUIET=y
+# CONFIG_SELINUX is not set
+# CONFIG_FEATURE_PREFER_APPLETS is not set
+CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe"
+CONFIG_FEATURE_SYSLOG=y
+# CONFIG_FEATURE_HAVE_RPC is not set
+
+#
+# Build Options
+#
+# CONFIG_STATIC is not set
+# CONFIG_PIE is not set
+# CONFIG_NOMMU is not set
+# CONFIG_BUILD_LIBBUSYBOX is not set
+# CONFIG_FEATURE_INDIVIDUAL is not set
+# CONFIG_FEATURE_SHARED_BUSYBOX is not set
+CONFIG_LFS=y
+CONFIG_CROSS_COMPILER_PREFIX=""
+CONFIG_EXTRA_CFLAGS=""
+
+#
+# Debugging Options
+#
+# CONFIG_DEBUG is not set
+# CONFIG_DEBUG_PESSIMIZE is not set
+# CONFIG_WERROR is not set
+CONFIG_NO_DEBUG_LIB=y
+# CONFIG_DMALLOC is not set
+# CONFIG_EFENCE is not set
+
+#
+# Installation Options ("make install" behavior)
+#
+CONFIG_INSTALL_APPLET_SYMLINKS=y
+# CONFIG_INSTALL_APPLET_HARDLINKS is not set
+# CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS is not set
+# CONFIG_INSTALL_APPLET_DONT is not set
+# CONFIG_INSTALL_SH_APPLET_SYMLINK is not set
+# CONFIG_INSTALL_SH_APPLET_HARDLINK is not set
+# CONFIG_INSTALL_SH_APPLET_SCRIPT_WRAPPER is not set
+CONFIG_PREFIX="./_install"
+
+#
+# Busybox Library Tuning
+#
+CONFIG_PASSWORD_MINLEN=6
+CONFIG_MD5_SIZE_VS_SPEED=2
+CONFIG_FEATURE_FAST_TOP=y
+# CONFIG_FEATURE_ETC_NETWORKS is not set
+CONFIG_FEATURE_USE_TERMIOS=y
+CONFIG_FEATURE_EDITING=y
+CONFIG_FEATURE_EDITING_MAX_LEN=1024
+# CONFIG_FEATURE_EDITING_VI is not set
+CONFIG_FEATURE_EDITING_HISTORY=64
+CONFIG_FEATURE_EDITING_SAVEHISTORY=y
+CONFIG_FEATURE_TAB_COMPLETION=y
+CONFIG_FEATURE_USERNAME_COMPLETION=y
+CONFIG_FEATURE_EDITING_FANCY_PROMPT=y
+# CONFIG_FEATURE_EDITING_ASK_TERMINAL is not set
+CONFIG_FEATURE_NON_POSIX_CP=y
+CONFIG_FEATURE_VERBOSE_CP_MESSAGE=y
+CONFIG_FEATURE_COPYBUF_KB=4
+CONFIG_MONOTONIC_SYSCALL=y
+CONFIG_IOCTL_HEX2STR_ERROR=y
+CONFIG_FEATURE_HWIB=y
+
+#
+# Applets
+#
+
+#
+# Archival Utilities
+#
+CONFIG_FEATURE_SEAMLESS_XZ=y
+# CONFIG_FEATURE_SEAMLESS_LZMA is not set
+CONFIG_FEATURE_SEAMLESS_BZ2=y
+CONFIG_FEATURE_SEAMLESS_GZ=y
+CONFIG_FEATURE_SEAMLESS_Z=y
+CONFIG_AR=y
+# CONFIG_FEATURE_AR_LONG_FILENAMES is not set
+CONFIG_FEATURE_AR_CREATE=y
+CONFIG_BUNZIP2=y
+# CONFIG_BZIP2 is not set
+CONFIG_CPIO=y
+# CONFIG_FEATURE_CPIO_O is not set
+# CONFIG_FEATURE_CPIO_P is not set
+# CONFIG_DPKG is not set
+# CONFIG_DPKG_DEB is not set
+# CONFIG_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set
+CONFIG_GUNZIP=y
+CONFIG_GZIP=y
+CONFIG_FEATURE_GZIP_LONG_OPTIONS=y
+CONFIG_LZOP=y
+# CONFIG_LZOP_COMPR_HIGH is not set
+# CONFIG_RPM2CPIO is not set
+# CONFIG_RPM is not set
+CONFIG_TAR=y
+CONFIG_FEATURE_TAR_CREATE=y
+CONFIG_FEATURE_TAR_AUTODETECT=y
+CONFIG_FEATURE_TAR_FROM=y
+CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY=y
+# CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY is not set
+CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y
+CONFIG_FEATURE_TAR_LONG_OPTIONS=y
+CONFIG_FEATURE_TAR_TO_COMMAND=y
+CONFIG_FEATURE_TAR_UNAME_GNAME=y
+CONFIG_FEATURE_TAR_NOPRESERVE_TIME=y
+# CONFIG_FEATURE_TAR_SELINUX is not set
+# CONFIG_UNCOMPRESS is not set
+# CONFIG_UNLZMA is not set
+# CONFIG_FEATURE_LZMA_FAST is not set
+# CONFIG_LZMA is not set
+CONFIG_UNXZ=y
+CONFIG_XZ=y
+CONFIG_UNZIP=y
+
+#
+# Coreutils
+#
+CONFIG_BASENAME=y
+CONFIG_CAT=y
+CONFIG_DATE=y
+CONFIG_FEATURE_DATE_ISOFMT=y
+# CONFIG_FEATURE_DATE_NANO is not set
+CONFIG_FEATURE_DATE_COMPAT=y
+CONFIG_TEST=y
+# CONFIG_FEATURE_TEST_64 is not set
+CONFIG_TR=y
+CONFIG_FEATURE_TR_CLASSES=y
+# CONFIG_FEATURE_TR_EQUIV is not set
+# CONFIG_BASE64=y
+# CONFIG_CAL is not set
+# CONFIG_CATV is not set
+CONFIG_CHGRP=y
+CONFIG_CHMOD=y
+CONFIG_CHOWN=y
+CONFIG_FEATURE_CHOWN_LONG_OPTIONS=y
+CONFIG_CHROOT=y
+# CONFIG_CKSUM is not set
+# CONFIG_COMM is not set
+CONFIG_CP=y
+CONFIG_FEATURE_CP_LONG_OPTIONS=y
+CONFIG_CUT=y
+CONFIG_DD=y
+CONFIG_FEATURE_DD_SIGNAL_HANDLING=y
+CONFIG_FEATURE_DD_THIRD_STATUS_LINE=y
+# CONFIG_FEATURE_DD_IBS_OBS is not set
+CONFIG_DF=y
+CONFIG_FEATURE_DF_FANCY=y
+CONFIG_DIRNAME=y
+# CONFIG_DOS2UNIX is not set
+# CONFIG_UNIX2DOS is not set
+CONFIG_DU=y
+CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y
+CONFIG_ECHO=y
+CONFIG_FEATURE_FANCY_ECHO=y
+CONFIG_ENV=y
+CONFIG_FEATURE_ENV_LONG_OPTIONS=y
+# CONFIG_EXPAND is not set
+# CONFIG_FEATURE_EXPAND_LONG_OPTIONS is not set
+CONFIG_EXPR=y
+# CONFIG_EXPR_MATH_SUPPORT_64 is not set
+CONFIG_FALSE=y
+# CONFIG_FOLD is not set
+CONFIG_FSYNC=y
+CONFIG_HEAD=y
+CONFIG_FEATURE_FANCY_HEAD=y
+# CONFIG_HOSTID is not set
+CONFIG_ID=y
+# CONFIG_INSTALL is not set
+# CONFIG_FEATURE_INSTALL_LONG_OPTIONS is not set
+# CONFIG_LENGTH is not set
+CONFIG_LN=y
+CONFIG_LOGNAME=y
+CONFIG_LS=y
+CONFIG_FEATURE_LS_FILETYPES=y
+CONFIG_FEATURE_LS_FOLLOWLINKS=y
+CONFIG_FEATURE_LS_RECURSIVE=y
+CONFIG_FEATURE_LS_SORTFILES=y
+CONFIG_FEATURE_LS_TIMESTAMPS=y
+CONFIG_FEATURE_LS_USERNAME=y
+CONFIG_FEATURE_LS_COLOR=y
+# CONFIG_FEATURE_LS_COLOR_IS_DEFAULT is not set
+CONFIG_MD5SUM=y
+CONFIG_MKDIR=y
+CONFIG_FEATURE_MKDIR_LONG_OPTIONS=y
+CONFIG_MKFIFO=y
+CONFIG_MKNOD=y
+CONFIG_MV=y
+CONFIG_FEATURE_MV_LONG_OPTIONS=y
+CONFIG_NICE=y
+CONFIG_NOHUP=y
+CONFIG_OD=y
+# CONFIG_PRINTENV is not set
+CONFIG_PRINTF=y
+CONFIG_PWD=y
+CONFIG_READLINK=y
+CONFIG_FEATURE_READLINK_FOLLOW=y
+CONFIG_REALPATH=y
+CONFIG_RM=y
+CONFIG_RMDIR=y
+CONFIG_FEATURE_RMDIR_LONG_OPTIONS=y
+CONFIG_SEQ=y
+# CONFIG_SHA1SUM is not set
+CONFIG_SHA256SUM=y
+CONFIG_SHA512SUM=y
+CONFIG_SLEEP=y
+CONFIG_FEATURE_FANCY_SLEEP=y
+CONFIG_FEATURE_FLOAT_SLEEP=y
+CONFIG_SORT=y
+CONFIG_FEATURE_SORT_BIG=y
+# CONFIG_SPLIT is not set
+# CONFIG_FEATURE_SPLIT_FANCY is not set
+# CONFIG_STAT is not set
+# CONFIG_FEATURE_STAT_FORMAT is not set
+CONFIG_STTY=y
+# CONFIG_SUM is not set
+CONFIG_SYNC=y
+# CONFIG_TAC is not set
+CONFIG_TAIL=y
+CONFIG_FEATURE_FANCY_TAIL=y
+CONFIG_TEE=y
+CONFIG_FEATURE_TEE_USE_BLOCK_IO=y
+CONFIG_TOUCH=y
+CONFIG_TRUE=y
+CONFIG_TTY=y
+CONFIG_UNAME=y
+# CONFIG_UNEXPAND is not set
+# CONFIG_FEATURE_UNEXPAND_LONG_OPTIONS is not set
+CONFIG_UNIQ=y
+CONFIG_USLEEP=y
+CONFIG_UUDECODE=y
+CONFIG_UUENCODE=y
+CONFIG_WC=y
+# CONFIG_FEATURE_WC_LARGE is not set
+CONFIG_WHO=y
+CONFIG_WHOAMI=y
+CONFIG_YES=y
+
+#
+# Common options for cp and mv
+#
+# CONFIG_FEATURE_PRESERVE_HARDLINKS is not set
+
+#
+# Common options for ls, more and telnet
+#
+CONFIG_FEATURE_AUTOWIDTH=y
+
+#
+# Common options for df, du, ls
+#
+CONFIG_FEATURE_HUMAN_READABLE=y
+
+#
+# Common options for md5sum, sha1sum, sha256sum, sha512sum
+#
+CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y
+
+#
+# Console Utilities
+#
+CONFIG_CHVT=y
+CONFIG_FGCONSOLE=y
+CONFIG_CLEAR=y
+CONFIG_DEALLOCVT=y
+CONFIG_DUMPKMAP=y
+# CONFIG_KBD_MODE is not set
+CONFIG_LOADFONT=y
+CONFIG_LOADKMAP=y
+CONFIG_OPENVT=y
+CONFIG_RESET=y
+# CONFIG_RESIZE is not set
+# CONFIG_FEATURE_RESIZE_PRINT is not set
+CONFIG_SETCONSOLE=y
+# CONFIG_FEATURE_SETCONSOLE_LONG_OPTIONS is not set
+CONFIG_SETFONT=y
+CONFIG_FEATURE_SETFONT_TEXTUAL_MAP=y
+CONFIG_DEFAULT_SETFONT_DIR=""
+# CONFIG_SETKEYCODES is not set
+# CONFIG_SETLOGCONS is not set
+CONFIG_SHOWKEY=y
+
+#
+# Common options for loadfont and setfont
+#
+CONFIG_FEATURE_LOADFONT_PSF2=y
+CONFIG_FEATURE_LOADFONT_RAW=y
+
+#
+# Debian Utilities
+#
+# CONFIG_MKTEMP is not set
+# CONFIG_PIPE_PROGRESS is not set
+# CONFIG_RUN_PARTS is not set
+# CONFIG_FEATURE_RUN_PARTS_LONG_OPTIONS is not set
+# CONFIG_FEATURE_RUN_PARTS_FANCY is not set
+# CONFIG_START_STOP_DAEMON is not set
+# CONFIG_FEATURE_START_STOP_DAEMON_FANCY is not set
+# CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS is not set
+# CONFIG_WHICH is not set
+
+#
+# Editors
+#
+# CONFIG_PATCH is not set
+# CONFIG_AWK is not set
+# CONFIG_FEATURE_AWK_LIBM is not set
+CONFIG_CMP=y
+# CONFIG_DIFF is not set
+# CONFIG_FEATURE_DIFF_LONG_OPTIONS is not set
+# CONFIG_FEATURE_DIFF_DIR is not set
+# CONFIG_ED is not set
+CONFIG_SED=y
+# CONFIG_VI is not set
+CONFIG_FEATURE_VI_MAX_LEN=0
+# CONFIG_FEATURE_VI_8BIT is not set
+# CONFIG_FEATURE_VI_COLON is not set
+# CONFIG_FEATURE_VI_YANKMARK is not set
+# CONFIG_FEATURE_VI_SEARCH is not set
+# CONFIG_FEATURE_VI_USE_SIGNALS is not set
+# CONFIG_FEATURE_VI_DOT_CMD is not set
+# CONFIG_FEATURE_VI_READONLY is not set
+# CONFIG_FEATURE_VI_SETOPTS is not set
+# CONFIG_FEATURE_VI_SET is not set
+# CONFIG_FEATURE_VI_WIN_RESIZE is not set
+# CONFIG_FEATURE_VI_ASK_TERMINAL is not set
+# CONFIG_FEATURE_VI_OPTIMIZE_CURSOR is not set
+# CONFIG_FEATURE_ALLOW_EXEC is not set
+
+#
+# Finding Utilities
+#
+CONFIG_FIND=y
+CONFIG_FEATURE_FIND_PRINT0=y
+CONFIG_FEATURE_FIND_MTIME=y
+CONFIG_FEATURE_FIND_MMIN=y
+CONFIG_FEATURE_FIND_PERM=y
+CONFIG_FEATURE_FIND_TYPE=y
+CONFIG_FEATURE_FIND_XDEV=y
+CONFIG_FEATURE_FIND_MAXDEPTH=y
+CONFIG_FEATURE_FIND_NEWER=y
+CONFIG_FEATURE_FIND_INUM=y
+CONFIG_FEATURE_FIND_EXEC=y
+CONFIG_FEATURE_FIND_USER=y
+CONFIG_FEATURE_FIND_GROUP=y
+CONFIG_FEATURE_FIND_NOT=y
+CONFIG_FEATURE_FIND_DEPTH=y
+CONFIG_FEATURE_FIND_PAREN=y
+CONFIG_FEATURE_FIND_SIZE=y
+CONFIG_FEATURE_FIND_PRUNE=y
+CONFIG_FEATURE_FIND_DELETE=y
+CONFIG_FEATURE_FIND_PATH=y
+CONFIG_FEATURE_FIND_REGEX=y
+# CONFIG_FEATURE_FIND_CONTEXT is not set
+CONFIG_FEATURE_FIND_LINKS=y
+CONFIG_GREP=y
+CONFIG_FEATURE_GREP_EGREP_ALIAS=y
+CONFIG_FEATURE_GREP_FGREP_ALIAS=y
+CONFIG_FEATURE_GREP_CONTEXT=y
+CONFIG_XARGS=y
+# CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION is not set
+CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y
+CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y
+CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y
+
+#
+# Init Utilities
+#
+# CONFIG_BOOTCHARTD is not set
+# CONFIG_FEATURE_BOOTCHARTD_BLOATED_HEADER is not set
+# CONFIG_FEATURE_BOOTCHARTD_CONFIG_FILE is not set
+# CONFIG_HALT is not set
+# CONFIG_FEATURE_CALL_TELINIT is not set
+CONFIG_TELINIT_PATH=""
+# CONFIG_INIT is not set
+# CONFIG_FEATURE_USE_INITTAB is not set
+# CONFIG_FEATURE_KILL_REMOVED is not set
+CONFIG_FEATURE_KILL_DELAY=0
+# CONFIG_FEATURE_INIT_SCTTY is not set
+# CONFIG_FEATURE_INIT_SYSLOG is not set
+# CONFIG_FEATURE_EXTRA_QUIET is not set
+# CONFIG_FEATURE_INIT_COREDUMPS is not set
+# CONFIG_FEATURE_INITRD is not set
+CONFIG_INIT_TERMINAL_TYPE=""
+# CONFIG_MESG is not set
+
+#
+# Login/Password Management Utilities
+#
+# CONFIG_ADD_SHELL is not set
+# CONFIG_REMOVE_SHELL is not set
+# CONFIG_FEATURE_SHADOWPASSWDS is not set
+# CONFIG_USE_BB_PWD_GRP is not set
+# CONFIG_USE_BB_SHADOW is not set
+# CONFIG_USE_BB_CRYPT is not set
+# CONFIG_USE_BB_CRYPT_SHA is not set
+# CONFIG_ADDUSER is not set
+# CONFIG_FEATURE_ADDUSER_LONG_OPTIONS is not set
+# CONFIG_FEATURE_CHECK_NAMES is not set
+CONFIG_FIRST_SYSTEM_ID=0
+CONFIG_LAST_SYSTEM_ID=0
+# CONFIG_ADDGROUP is not set
+# CONFIG_FEATURE_ADDGROUP_LONG_OPTIONS is not set
+# CONFIG_FEATURE_ADDUSER_TO_GROUP is not set
+# CONFIG_DELUSER is not set
+# CONFIG_DELGROUP is not set
+# CONFIG_FEATURE_DEL_USER_FROM_GROUP is not set
+CONFIG_GETTY=y
+CONFIG_LOGIN=y
+# CONFIG_PAM is not set
+CONFIG_LOGIN_SCRIPTS=y
+CONFIG_FEATURE_NOLOGIN=y
+CONFIG_FEATURE_SECURETTY=y
+# CONFIG_PASSWD is not set
+# CONFIG_FEATURE_PASSWD_WEAK_CHECK is not set
+# CONFIG_CRYPTPW is not set
+# CONFIG_CHPASSWD is not set
+# CONFIG_SU is not set
+# CONFIG_FEATURE_SU_SYSLOG is not set
+# CONFIG_FEATURE_SU_CHECKS_SHELLS is not set
+# CONFIG_SULOGIN is not set
+# CONFIG_VLOCK is not set
+
+#
+# Linux Ext2 FS Progs
+#
+CONFIG_CHATTR=y
+CONFIG_FSCK=y
+# CONFIG_LSATTR is not set
+# CONFIG_TUNE2FS is not set
+
+#
+# Linux Module Utilities
+#
+CONFIG_MODINFO=y
+# CONFIG_MODPROBE_SMALL is not set
+# CONFIG_FEATURE_MODPROBE_SMALL_OPTIONS_ON_CMDLINE is not set
+# CONFIG_FEATURE_MODPROBE_SMALL_CHECK_ALREADY_LOADED is not set
+CONFIG_INSMOD=y
+CONFIG_RMMOD=y
+CONFIG_LSMOD=y
+CONFIG_FEATURE_LSMOD_PRETTY_2_6_OUTPUT=y
+CONFIG_MODPROBE=y
+CONFIG_FEATURE_MODPROBE_BLACKLIST=y
+# CONFIG_DEPMOD is not set
+
+#
+# Options common to multiple modutils
+#
+# CONFIG_FEATURE_2_4_MODULES is not set
+# CONFIG_FEATURE_INSMOD_TRY_MMAP is not set
+# CONFIG_FEATURE_INSMOD_VERSION_CHECKING is not set
+# CONFIG_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set
+# CONFIG_FEATURE_INSMOD_LOADINKMEM is not set
+# CONFIG_FEATURE_INSMOD_LOAD_MAP is not set
+# CONFIG_FEATURE_INSMOD_LOAD_MAP_FULL is not set
+CONFIG_FEATURE_CHECK_TAINTED_MODULE=y
+CONFIG_FEATURE_MODUTILS_ALIAS=y
+CONFIG_FEATURE_MODUTILS_SYMBOLS=y
+CONFIG_DEFAULT_MODULES_DIR="/lib/modules"
+CONFIG_DEFAULT_DEPMOD_FILE="modules.dep"
+
+#
+# Linux System Utilities
+#
+# CONFIG_BLOCKDEV is not set
+# CONFIG_REV is not set
+# CONFIG_ACPID is not set
+# CONFIG_FEATURE_ACPID_COMPAT is not set
+# CONFIG_BLKID is not set
+CONFIG_DMESG=y
+CONFIG_FEATURE_DMESG_PRETTY=y
+# CONFIG_FBSET is not set
+# CONFIG_FEATURE_FBSET_FANCY is not set
+# CONFIG_FEATURE_FBSET_READMODE is not set
+# CONFIG_FDFLUSH is not set
+# CONFIG_FDFORMAT is not set
+CONFIG_FDISK=y
+CONFIG_FDISK_SUPPORT_LARGE_DISKS=y
+CONFIG_FEATURE_FDISK_WRITABLE=y
+# CONFIG_FEATURE_AIX_LABEL is not set
+# CONFIG_FEATURE_SGI_LABEL is not set
+# CONFIG_FEATURE_SUN_LABEL is not set
+CONFIG_FEATURE_OSF_LABEL=y
+# CONFIG_FEATURE_GPT_LABEL is not set
+CONFIG_FEATURE_FDISK_ADVANCED=y
+# CONFIG_FINDFS is not set
+# CONFIG_FLOCK is not set
+CONFIG_FREERAMDISK=y
+# CONFIG_FSCK_MINIX is not set
+CONFIG_MKFS_EXT2=y
+# CONFIG_MKFS_MINIX is not set
+# CONFIG_FEATURE_MINIX2 is not set
+# CONFIG_MKFS_REISER is not set
+CONFIG_MKFS_VFAT=y
+CONFIG_GETOPT=y
+CONFIG_FEATURE_GETOPT_LONG=y
+# CONFIG_HEXDUMP is not set
+# CONFIG_FEATURE_HEXDUMP_REVERSE is not set
+# CONFIG_HD is not set
+# CONFIG_HWCLOCK is not set
+# CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS is not set
+# CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set
+# CONFIG_IPCRM is not set
+# CONFIG_IPCS is not set
+# CONFIG_LOSETUP is not set
+# CONFIG_LSPCI is not set
+# CONFIG_LSUSB is not set
+CONFIG_MDEV=y
+CONFIG_FEATURE_MDEV_CONF=y
+CONFIG_FEATURE_MDEV_RENAME=y
+CONFIG_FEATURE_MDEV_RENAME_REGEXP=y
+CONFIG_FEATURE_MDEV_EXEC=y
+CONFIG_FEATURE_MDEV_LOAD_FIRMWARE=y
+# CONFIG_MKSWAP is not set
+# CONFIG_FEATURE_MKSWAP_UUID is not set
+CONFIG_MORE=y
+CONFIG_MOUNT=y
+# CONFIG_FEATURE_MOUNT_FAKE is not set
+CONFIG_FEATURE_MOUNT_VERBOSE=y
+CONFIG_FEATURE_MOUNT_HELPERS=y
+# CONFIG_FEATURE_MOUNT_LABEL is not set
+# CONFIG_FEATURE_MOUNT_NFS is not set
+# CONFIG_FEATURE_MOUNT_CIFS is not set
+CONFIG_FEATURE_MOUNT_FLAGS=y
+CONFIG_FEATURE_MOUNT_FSTAB=y
+CONFIG_PIVOT_ROOT=y
+# CONFIG_RDATE is not set
+# CONFIG_RDEV is not set
+# CONFIG_READPROFILE is not set
+# CONFIG_RTCWAKE is not set
+# CONFIG_SCRIPT is not set
+# CONFIG_SCRIPTREPLAY is not set
+# CONFIG_SETARCH is not set
+# CONFIG_SWAPONOFF is not set
+# CONFIG_FEATURE_SWAPON_PRI is not set
+CONFIG_SWITCH_ROOT=y
+CONFIG_UMOUNT=y
+CONFIG_FEATURE_UMOUNT_ALL=y
+
+#
+# Common options for mount/umount
+#
+CONFIG_FEATURE_MOUNT_LOOP=y
+CONFIG_FEATURE_MOUNT_LOOP_CREATE=y
+# CONFIG_FEATURE_MTAB_SUPPORT is not set
+# CONFIG_VOLUMEID is not set
+# CONFIG_FEATURE_VOLUMEID_EXT is not set
+# CONFIG_FEATURE_VOLUMEID_BTRFS is not set
+# CONFIG_FEATURE_VOLUMEID_REISERFS is not set
+# CONFIG_FEATURE_VOLUMEID_FAT is not set
+# CONFIG_FEATURE_VOLUMEID_HFS is not set
+# CONFIG_FEATURE_VOLUMEID_JFS is not set
+# CONFIG_FEATURE_VOLUMEID_XFS is not set
+# CONFIG_FEATURE_VOLUMEID_NTFS is not set
+# CONFIG_FEATURE_VOLUMEID_ISO9660 is not set
+# CONFIG_FEATURE_VOLUMEID_UDF is not set
+# CONFIG_FEATURE_VOLUMEID_LUKS is not set
+# CONFIG_FEATURE_VOLUMEID_LINUXSWAP is not set
+# CONFIG_FEATURE_VOLUMEID_CRAMFS is not set
+# CONFIG_FEATURE_VOLUMEID_ROMFS is not set
+# CONFIG_FEATURE_VOLUMEID_SYSV is not set
+# CONFIG_FEATURE_VOLUMEID_OCFS2 is not set
+# CONFIG_FEATURE_VOLUMEID_LINUXRAID is not set
+
+#
+# Miscellaneous Utilities
+#
+# CONFIG_CONSPY is not set
+# CONFIG_NANDWRITE is not set
+# CONFIG_NANDDUMP is not set
+# CONFIG_UBIATTACH is not set
+# CONFIG_UBIDETACH is not set
+# CONFIG_ADJTIMEX is not set
+# CONFIG_BBCONFIG is not set
+# CONFIG_FEATURE_COMPRESS_BBCONFIG is not set
+# CONFIG_BEEP is not set
+CONFIG_FEATURE_BEEP_FREQ=0
+CONFIG_FEATURE_BEEP_LENGTH_MS=0
+# CONFIG_CHAT is not set
+# CONFIG_FEATURE_CHAT_NOFAIL is not set
+# CONFIG_FEATURE_CHAT_TTY_HIFI is not set
+# CONFIG_FEATURE_CHAT_IMPLICIT_CR is not set
+# CONFIG_FEATURE_CHAT_SWALLOW_OPTS is not set
+# CONFIG_FEATURE_CHAT_SEND_ESCAPES is not set
+# CONFIG_FEATURE_CHAT_VAR_ABORT_LEN is not set
+# CONFIG_FEATURE_CHAT_CLR_ABORT is not set
+# CONFIG_CHRT is not set
+# CONFIG_CROND is not set
+# CONFIG_FEATURE_CROND_D is not set
+# CONFIG_FEATURE_CROND_CALL_SENDMAIL is not set
+CONFIG_FEATURE_CROND_DIR=""
+# CONFIG_CRONTAB is not set
+# CONFIG_DC is not set
+# CONFIG_FEATURE_DC_LIBM is not set
+# CONFIG_DEVFSD is not set
+# CONFIG_DEVFSD_MODLOAD is not set
+# CONFIG_DEVFSD_FG_NP is not set
+# CONFIG_DEVFSD_VERBOSE is not set
+# CONFIG_FEATURE_DEVFS is not set
+CONFIG_DEVMEM=y
+# CONFIG_EJECT is not set
+# CONFIG_FEATURE_EJECT_SCSI is not set
+# CONFIG_FBSPLASH is not set
+# CONFIG_FLASHCP is not set
+# CONFIG_FLASH_LOCK is not set
+# CONFIG_FLASH_UNLOCK is not set
+# CONFIG_FLASH_ERASEALL is not set
+# CONFIG_IONICE is not set
+# CONFIG_INOTIFYD is not set
+# CONFIG_LAST is not set
+# CONFIG_FEATURE_LAST_SMALL is not set
+# CONFIG_FEATURE_LAST_FANCY is not set
+# CONFIG_LESS is not set
+CONFIG_FEATURE_LESS_MAXLINES=0
+# CONFIG_FEATURE_LESS_BRACKETS is not set
+# CONFIG_FEATURE_LESS_FLAGS is not set
+# CONFIG_FEATURE_LESS_MARKS is not set
+# CONFIG_FEATURE_LESS_REGEXP is not set
+# CONFIG_FEATURE_LESS_WINCH is not set
+# CONFIG_FEATURE_LESS_DASHCMD is not set
+# CONFIG_FEATURE_LESS_LINENUMS is not set
+# CONFIG_HDPARM is not set
+# CONFIG_FEATURE_HDPARM_GET_IDENTITY is not set
+# CONFIG_FEATURE_HDPARM_HDIO_SCAN_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_DRIVE_RESET is not set
+# CONFIG_FEATURE_HDPARM_HDIO_TRISTATE_HWIF is not set
+# CONFIG_FEATURE_HDPARM_HDIO_GETSET_DMA is not set
+# CONFIG_MAKEDEVS is not set
+# CONFIG_FEATURE_MAKEDEVS_LEAF is not set
+# CONFIG_FEATURE_MAKEDEVS_TABLE is not set
+# CONFIG_MAN is not set
+# CONFIG_MICROCOM is not set
+# CONFIG_MOUNTPOINT is not set
+# CONFIG_MT is not set
+# CONFIG_RAIDAUTORUN is not set
+CONFIG_READAHEAD=y
+# CONFIG_RFKILL is not set
+# CONFIG_RUNLEVEL is not set
+# CONFIG_RX is not set
+CONFIG_SETSID=y
+# CONFIG_STRINGS is not set
+# CONFIG_TASKSET is not set
+# CONFIG_FEATURE_TASKSET_FANCY is not set
+# CONFIG_TIME is not set
+# CONFIG_TIMEOUT is not set
+# CONFIG_TTYSIZE is not set
+# CONFIG_VOLNAME is not set
+# CONFIG_WALL is not set
+CONFIG_WATCHDOG=y
+
+#
+# Networking Utilities
+#
+CONFIG_NBDCLIENT=y
+# CONFIG_NC=y
+# CONFIG_NC_SERVER=y
+# CONFIG_NC_EXTRA=y
+# CONFIG_NC_110_COMPAT is not set
+CONFIG_FEATURE_IPV6=y
+# CONFIG_FEATURE_UNIX_LOCAL is not set
+CONFIG_FEATURE_PREFER_IPV4_ADDRESS=y
+# CONFIG_VERBOSE_RESOLUTION_ERRORS is not set
+# CONFIG_ARP is not set
+# CONFIG_ARPING is not set
+# CONFIG_BRCTL is not set
+# CONFIG_FEATURE_BRCTL_FANCY is not set
+# CONFIG_FEATURE_BRCTL_SHOW is not set
+# CONFIG_DNSD is not set
+# CONFIG_ETHER_WAKE is not set
+# CONFIG_FAKEIDENTD is not set
+# CONFIG_FTPD=y
+# CONFIG_FEATURE_FTP_WRITE=y
+# CONFIG_FEATURE_FTPD_ACCEPT_BROKEN_LIST=y
+# CONFIG_FTPGET is not set
+# CONFIG_FTPPUT is not set
+# CONFIG_FEATURE_FTPGETPUT_LONG_OPTIONS is not set
+CONFIG_HOSTNAME=y
+# CONFIG_HTTPD=y
+# CONFIG_FEATURE_HTTPD_RANGES=y
+# CONFIG_FEATURE_HTTPD_USE_SENDFILE=y
+# CONFIG_FEATURE_HTTPD_SETUID=y
+# CONFIG_FEATURE_HTTPD_BASIC_AUTH=y
+# CONFIG_FEATURE_HTTPD_AUTH_MD5=y
+# CONFIG_FEATURE_HTTPD_CGI=y
+# CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR=y
+# CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV=y
+# CONFIG_FEATURE_HTTPD_ENCODE_URL_STR=y
+# CONFIG_FEATURE_HTTPD_ERROR_PAGES=y
+# CONFIG_FEATURE_HTTPD_PROXY=y
+# CONFIG_FEATURE_HTTPD_GZIP=y
+CONFIG_IFCONFIG=y
+CONFIG_FEATURE_IFCONFIG_STATUS=y
+# CONFIG_FEATURE_IFCONFIG_SLIP is not set
+# CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set
+CONFIG_FEATURE_IFCONFIG_HW=y
+CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS=y
+# CONFIG_IFENSLAVE is not set
+CONFIG_IFPLUGD=y
+CONFIG_IFUPDOWN=y
+CONFIG_IFUPDOWN_IFSTATE_PATH="/var/run/ifstate"
+# CONFIG_FEATURE_IFUPDOWN_IP is not set
+# CONFIG_FEATURE_IFUPDOWN_IP_BUILTIN is not set
+CONFIG_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN=y
+CONFIG_FEATURE_IFUPDOWN_IPV4=y
+CONFIG_FEATURE_IFUPDOWN_IPV6=y
+CONFIG_FEATURE_IFUPDOWN_MAPPING=y
+# CONFIG_FEATURE_IFUPDOWN_EXTERNAL_DHCP is not set
+# CONFIG_INETD is not set
+# CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_ECHO is not set
+# CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD is not set
+# CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_TIME is not set
+# CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME is not set
+# CONFIG_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN is not set
+# CONFIG_FEATURE_INETD_RPC is not set
+CONFIG_IP=y
+CONFIG_FEATURE_IP_ADDRESS=y
+CONFIG_FEATURE_IP_LINK=y
+CONFIG_FEATURE_IP_ROUTE=y
+CONFIG_FEATURE_IP_TUNNEL=y
+# CONFIG_FEATURE_IP_RULE is not set
+# CONFIG_FEATURE_IP_SHORT_FORMS is not set
+# CONFIG_FEATURE_IP_RARE_PROTOCOLS is not set
+# CONFIG_IPADDR is not set
+# CONFIG_IPLINK is not set
+# CONFIG_IPROUTE is not set
+# CONFIG_IPTUNNEL is not set
+# CONFIG_IPRULE is not set
+# CONFIG_IPCALC is not set
+# CONFIG_FEATURE_IPCALC_FANCY is not set
+# CONFIG_FEATURE_IPCALC_LONG_OPTIONS is not set
+# CONFIG_NAMEIF is not set
+# CONFIG_FEATURE_NAMEIF_EXTENDED is not set
+CONFIG_NETSTAT=y
+CONFIG_FEATURE_NETSTAT_WIDE=y
+CONFIG_FEATURE_NETSTAT_PRG=y
+CONFIG_NSLOOKUP=y
+CONFIG_NTPD=y
+CONFIG_FEATURE_NTPD_SERVER=y
+CONFIG_PING=y
+CONFIG_PING6=y
+CONFIG_FEATURE_FANCY_PING=y
+# CONFIG_PSCAN is not set
+CONFIG_ROUTE=y
+# CONFIG_SLATTACH is not set
+# CONFIG_TCPSVD is not set
+CONFIG_TELNET=y
+# CONFIG_FEATURE_TELNET_TTYPE is not set
+CONFIG_FEATURE_TELNET_AUTOLOGIN=y
+CONFIG_TELNETD=y
+# CONFIG_FEATURE_TELNETD_STANDALONE is not set
+# CONFIG_FEATURE_TELNETD_INETD_WAIT is not set
+# CONFIG_TFTP=y
+# CONFIG_TFTPD is not set
+
+#
+# Common options for tftp/tftpd
+#
+# CONFIG_FEATURE_TFTP_GET=y
+# CONFIG_FEATURE_TFTP_PUT=y
+# CONFIG_FEATURE_TFTP_BLOCKSIZE is not set
+# CONFIG_FEATURE_TFTP_PROGRESS_BAR is not set
+# CONFIG_TFTP_DEBUG is not set
+# CONFIG_TRACEROUTE=y
+# CONFIG_TRACEROUTE6=y
+# CONFIG_FEATURE_TRACEROUTE_VERBOSE=y
+# CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE=y
+# CONFIG_FEATURE_TRACEROUTE_USE_ICMP=y
+# CONFIG_TUNCTL=y
+CONFIG_FEATURE_TUNCTL_UG=y
+CONFIG_UDHCPD=y
+CONFIG_DHCPRELAY=y
+CONFIG_DUMPLEASES=y
+# CONFIG_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set
+CONFIG_DHCPD_LEASES_FILE="/var/lib/misc/udhcpd.leases"
+CONFIG_UDHCPC=y
+CONFIG_FEATURE_UDHCPC_ARPING=y
+# CONFIG_FEATURE_UDHCP_PORT is not set
+CONFIG_UDHCP_DEBUG=9
+# CONFIG_FEATURE_UDHCP_RFC3397 is not set
+CONFIG_UDHCPC_DEFAULT_SCRIPT="@DATADIR@/udhcpc/default.script"
+CONFIG_UDHCPC_SLACK_FOR_BUGGY_SERVERS=80
+CONFIG_IFUPDOWN_UDHCPC_CMD_OPTIONS="-R -n"
+# CONFIG_UDPSVD is not set
+# CONFIG_VCONFIG is not set
+CONFIG_WGET=y
+CONFIG_FEATURE_WGET_STATUSBAR=y
+CONFIG_FEATURE_WGET_AUTHENTICATION=y
+CONFIG_FEATURE_WGET_LONG_OPTIONS=y
+CONFIG_FEATURE_WGET_TIMEOUT=y
+# CONFIG_ZCIP is not set
+
+#
+# Print Utilities
+#
+# CONFIG_LPD is not set
+# CONFIG_LPR is not set
+# CONFIG_LPQ is not set
+
+#
+# Mail Utilities
+#
+# CONFIG_MAKEMIME is not set
+CONFIG_FEATURE_MIME_CHARSET=""
+# CONFIG_POPMAILDIR is not set
+# CONFIG_FEATURE_POPMAILDIR_DELIVERY is not set
+# CONFIG_REFORMIME is not set
+# CONFIG_FEATURE_REFORMIME_COMPAT is not set
+# CONFIG_SENDMAIL is not set
+
+#
+# Process Utilities
+#
+# CONFIG_IOSTAT is not set
+# CONFIG_MPSTAT is not set
+# CONFIG_PMAP is not set
+# CONFIG_POWERTOP is not set
+# CONFIG_SMEMCAP is not set
+# CONFIG_FREE is not set
+# CONFIG_FUSER is not set
+CONFIG_KILL=y
+CONFIG_KILLALL=y
+# CONFIG_KILLALL5 is not set
+# CONFIG_NMETER is not set
+# CONFIG_PGREP is not set
+CONFIG_PIDOF=y
+CONFIG_FEATURE_PIDOF_SINGLE=y
+CONFIG_FEATURE_PIDOF_OMIT=y
+# CONFIG_PKILL is not set
+CONFIG_PS=y
+CONFIG_FEATURE_PS_WIDE=y
+# CONFIG_FEATURE_PS_TIME is not set
+# CONFIG_FEATURE_PS_ADDITIONAL_COLUMNS is not set
+# CONFIG_FEATURE_PS_UNUSUAL_SYSTEMS is not set
+# CONFIG_RENICE is not set
+# CONFIG_BB_SYSCTL is not set
+# CONFIG_TOP is not set
+# CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE is not set
+# CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS is not set
+# CONFIG_FEATURE_TOP_SMP_CPU is not set
+# CONFIG_FEATURE_TOP_DECIMALS is not set
+# CONFIG_FEATURE_TOP_SMP_PROCESS is not set
+# CONFIG_FEATURE_TOPMEM is not set
+# CONFIG_FEATURE_SHOW_THREADS is not set
+# CONFIG_UPTIME is not set
+# CONFIG_WATCH is not set
+
+#
+# Runit Utilities
+#
+# CONFIG_RUNSV is not set
+# CONFIG_RUNSVDIR is not set
+# CONFIG_FEATURE_RUNSVDIR_LOG is not set
+# CONFIG_SV is not set
+CONFIG_SV_DEFAULT_SERVICE_DIR=""
+# CONFIG_SVLOGD is not set
+# CONFIG_CHPST is not set
+# CONFIG_SETUIDGID is not set
+# CONFIG_ENVUIDGID is not set
+# CONFIG_ENVDIR is not set
+# CONFIG_SOFTLIMIT is not set
+# CONFIG_CHCON is not set
+# CONFIG_FEATURE_CHCON_LONG_OPTIONS is not set
+# CONFIG_GETENFORCE is not set
+# CONFIG_GETSEBOOL is not set
+# CONFIG_LOAD_POLICY is not set
+# CONFIG_MATCHPATHCON is not set
+# CONFIG_RESTORECON is not set
+# CONFIG_RUNCON is not set
+# CONFIG_FEATURE_RUNCON_LONG_OPTIONS is not set
+# CONFIG_SELINUXENABLED is not set
+# CONFIG_SETENFORCE is not set
+# CONFIG_SETFILES is not set
+# CONFIG_FEATURE_SETFILES_CHECK_OPTION is not set
+# CONFIG_SETSEBOOL is not set
+# CONFIG_SESTATUS is not set
+
+#
+# Shells
+#
+CONFIG_ASH=y
+CONFIG_ASH_BASH_COMPAT=y
+CONFIG_ASH_JOB_CONTROL=y
+CONFIG_ASH_ALIAS=y
+CONFIG_ASH_GETOPTS=y
+CONFIG_ASH_BUILTIN_ECHO=y
+CONFIG_ASH_BUILTIN_PRINTF=y
+CONFIG_ASH_BUILTIN_TEST=y
+# CONFIG_ASH_CMDCMD is not set
+# CONFIG_ASH_MAIL is not set
+# CONFIG_ASH_OPTIMIZE_FOR_SIZE is not set
+# CONFIG_ASH_RANDOM_SUPPORT is not set
+CONFIG_ASH_EXPAND_PRMT=y
+CONFIG_CTTYHACK=y
+# CONFIG_HUSH is not set
+# CONFIG_HUSH_BASH_COMPAT is not set
+# CONFIG_HUSH_BRACE_EXPANSION is not set
+# CONFIG_HUSH_HELP is not set
+# CONFIG_HUSH_INTERACTIVE is not set
+# CONFIG_HUSH_SAVEHISTORY is not set
+# CONFIG_HUSH_JOB is not set
+# CONFIG_HUSH_TICK is not set
+# CONFIG_HUSH_IF is not set
+# CONFIG_HUSH_LOOPS is not set
+# CONFIG_HUSH_CASE is not set
+# CONFIG_HUSH_FUNCTIONS is not set
+# CONFIG_HUSH_LOCAL is not set
+# CONFIG_HUSH_RANDOM_SUPPORT is not set
+# CONFIG_HUSH_EXPORT_N is not set
+# CONFIG_HUSH_MODE_X is not set
+# CONFIG_MSH is not set
+CONFIG_FEATURE_SH_IS_ASH=y
+# CONFIG_FEATURE_SH_IS_HUSH is not set
+# CONFIG_FEATURE_SH_IS_NONE is not set
+# CONFIG_FEATURE_BASH_IS_ASH is not set
+# CONFIG_FEATURE_BASH_IS_HUSH is not set
+CONFIG_FEATURE_BASH_IS_NONE=y
+CONFIG_SH_MATH_SUPPORT=y
+CONFIG_SH_MATH_SUPPORT_64=y
+CONFIG_FEATURE_SH_EXTRA_QUIET=y
+# CONFIG_FEATURE_SH_STANDALONE is not set
+# CONFIG_FEATURE_SH_NOFORK is not set
+
+#
+# System Logging Utilities
+#
+CONFIG_SYSLOGD=y
+CONFIG_FEATURE_ROTATE_LOGFILE=y
+CONFIG_FEATURE_REMOTE_LOG=y
+CONFIG_FEATURE_SYSLOGD_DUP=y
+CONFIG_FEATURE_SYSLOGD_READ_BUFFER_SIZE=256
+CONFIG_FEATURE_IPC_SYSLOG=y
+CONFIG_FEATURE_IPC_SYSLOG_BUFFER_SIZE=16
+CONFIG_LOGREAD=y
+CONFIG_FEATURE_LOGREAD_REDUCED_LOCKING=y
+CONFIG_KLOGD=y
+CONFIG_FEATURE_KLOGD_KLOGCTL=y
+CONFIG_LOGGER=y
diff --git a/recipes/images/ts75xx-initrd-image.bb b/recipes/images/ts75xx-initrd-image.bb
new file mode 100644
index 0000000..306bf3a
--- /dev/null
+++ b/recipes/images/ts75xx-initrd-image.bb
@@ -0,0 +1,89 @@ 
+# This is an initrd recipe for the Technologic Systems TS7500 board
+#
+# The generated initrd image will be very similar to stock initrd
+# that can be downloaded from:
+# ftp://ftp.embeddedarm.com/ts-arm-sbc/ts-7500-linux/binaries/ts-images/
+# with a few changes:
+# 1. All the linuxrc and ts-bitstreams have been moved to the ts7500 directory
+# 2. The linuxrc scripts have been modified to mount the third partition 
+#    of the SD card as root (/) and the fourth partition as /var
+# 3. All the ts utilities included in /sbin now use the EABI, so the OABI
+#    support in the kernel is no longer needed
+# 4. Unionfs is not built into the kernel, so it no longer needs to be
+#    loaded as a module.
+
+# Use a newer version of busybox since it includes the nbd-client applet.
+# We no longer need to build the nbd-client program since we enable this.
+DEPENDS = "busybox-1.18.3"
+
+IMAGE_INSTALL = "busybox canctl dioctl dmxctl spictl ts-utils ts-initrd \
+	      kernel-module-crash \
+	      kernel-module-ehci-hcd \
+	      kernel-module-input-core \
+	      kernel-module-inthandler \
+	      kernel-module-scsi-mod \
+	      kernel-module-scsi-wait-scan \
+	      kernel-module-sd-mod \
+	      kernel-module-sg \
+	      kernel-module-usbcore \
+	      kernel-module-usb-storage \
+	      "
+IMAGE_LINGUAS = ""
+
+# We don't need a login manager or init scripts 
+IMAGE_LOGIN_MANAGER = ""
+
+# Include minimum init and init scripts
+IMAGE_DEV_MANAGER = "busybox-mdev"
+IMAGE_INIT_MANAGER = ""
+IMAGE_INITSCRIPTS = ""
+
+# This should build all the correct device tables.
+IMAGE_DEVICE_TABLES = "files/device_table-ts75xx.txt"
+
+fix_image () {
+	  echo "Fixing Image... ${IMAGE_ROOTFS}"
+	  # Delete extra files
+	  for file in "${IMAGE_ROOTFS}/usr/bin/opkg* \
+	      ${IMAGE_ROOTFS}/usr/bin/update-alternatives \
+	      ${IMAGE_ROOTFS}/usr/lib/* \
+	      ${IMAGE_ROOTFS}/usr/share/* \
+	      ${IMAGE_ROOTFS}/var/lib/opkg \
+	      ${IMAGE_ROOTFS}/sbin/diotest* \
+	      ${IMAGE_ROOTFS}/sbin/dioctl \
+	      ${IMAGE_ROOTFS}/lib/libdioctl.so.1.0.1 \
+	      ${IMAGE_ROOTFS}/lib/modules \
+	      ${IMAGE_ROOTFS}/etc/* \
+	      ${IMAGE_ROOTFS}/var/*" ; 
+          do rm -r ${file} ; done
+	  
+	  # Make extra nodes
+	  for file in "${IMAGE_ROOTFS}/mnt/root \
+	      ${IMAGE_ROOTFS}/mnt/root/var \
+	      ${IMAGE_ROOTFS}/lib/modules \
+	      ${IMAGE_ROOTFS}/proc \
+	      ${IMAGE_ROOTFS}/sys \
+	      ${IMAGE_ROOTFS}/var/run \
+	      ${IMAGE_ROOTFS}/var/lock" ; 
+          do mkdir -p ${file} ; done
+	  
+	  # Copy over the linuxrc scripts
+	  cp ${IMAGE_ROOTFS}/ts7500/linuxrc-sdroot-readonly ${IMAGE_ROOTFS}/linuxrc
+}
+
+create_modules_gz () {
+	  OLDPWD=`pwd`
+	  cd ${IMAGE_ROOTFS}
+	  tar cvzf ${IMAGE_ROOTFS}/modules.tar.gz lib/modules
+	  cd $OLDPWD
+}
+
+# Remove any kernel-image that the kernel-module-* packages may have pulled in.
+PACKAGE_REMOVE = "kernel-image-* update-modules"
+ROOTFS_POSTPROCESS_COMMAND += "create_modules_gz ; opkg-cl ${IPKG_ARGS} -force-depends \
+                                remove ${PACKAGE_REMOVE}; "
+
+IMAGE_PREPROCESS_COMMAND += "fix_image ; "
+
+export IMAGE_BASENAME = "ts75xx-initrd-image"
+inherit image
diff --git a/recipes/images/ts75xx-rootfs-image.bb b/recipes/images/ts75xx-rootfs-image.bb
new file mode 100644
index 0000000..689d264
--- /dev/null
+++ b/recipes/images/ts75xx-rootfs-image.bb
@@ -0,0 +1,206 @@ 
+# This is an rootfs recipe for the Technologic Systems TS7500 board
+#
+# The TS7500 boards are meant to be booted using an initrd 
+# partition - so most of the init scripts in the rcS.d directory
+# and not needed. This image deletes those unneeded scripts. 
+# See the ts75xx-initrd-image.bb for the recipe for
+# building the initrd image. 
+#
+# This recipe also includes java. Feel free to disable it if not needed.
+
+IMAGE_PREPROCESS_COMMAND = "create_etc_timestamp ; "
+IMAGE_INIT_MANAGER = "sysvinit"
+DISTRO_SSH_DAEMON = "openssh"
+BUILD_ALL_DEPS = "1"
+
+IMAGE_DEVICE_TABLES = "files/device_table-ts75xx.txt"
+
+DEPENDS = "\
+	task-proper-tools \
+	${DISTRO_SSH_DAEMON} \
+	${@base_contains('MACHINE_FEATURES', 'ext2', 'task-base-ext2', '', d)} \
+	${@base_contains('MACHINE_FEATURES', 'usbhost', 'task-base-usbhost', '', d)} \
+	canctl dioctl dmxctl spictl ts-utils ts-initrd \
+	coreutils \
+	findutils \
+	bash \
+	python \
+	ntp \
+	cron \
+	nano \
+	task-java \
+	dhclient \
+	dhcpcd \
+	"
+
+KERNEL_MODULES = "\
+     	kernel-module-aes-generic \
+     	kernel-module-ansi-cprng \
+	kernel-module-arptable-filter \
+     	kernel-module-arp-tables \
+     	kernel-module-arpt-mangle \
+     	kernel-module-atkbd \
+     	kernel-module-cn \
+     	kernel-module-crash \
+     	kernel-module-crc-itu-t \
+     	kernel-module-ehci-hcd \
+     	kernel-module-firmware-class \
+     	kernel-module-hid \
+     	kernel-module-input-core \
+     	kernel-module-inthandler \
+     	kernel-module-ip-queue \
+     	kernel-module-iptable-filter \
+     	kernel-module-iptable-mangle \
+     	kernel-module-iptable-nat \
+     	kernel-module-iptable-raw \
+     	kernel-module-ip-tables \
+     	kernel-module-ipt-addrtype \
+     	kernel-module-ipt-ah \
+     	kernel-module-ipt-ecn \
+     	kernel-module-ipt-log \
+     	kernel-module-ipt-masquerade \
+    	kernel-module-ipt-netmap \
+     	kernel-module-ipt-redirect \
+     	kernel-module-ipt-reject \
+     	kernel-module-ipt-ulog \
+     	kernel-module-ipv6 \
+     	kernel-module-libps2 \
+     	kernel-module-michael-mic \
+     	kernel-module-mousedev \
+     	kernel-module-nf-conntrack \
+     	kernel-module-nf-conntrack-ipv4 \
+     	kernel-module-nf-conntrack-pptp \
+     	kernel-module-nf-conntrack-proto-gre \
+     	kernel-module-nf-defrag-ipv4 \
+     	kernel-module-nf-nat \
+     	kernel-module-nf-nat-pptp \
+     	kernel-module-nf-nat-proto-gre \
+     	kernel-module-nfnetlink \
+     	kernel-module-nfnetlink-log \
+     	kernel-module-nfnetlink-queue \
+     	kernel-module-ohci-hcd \
+     	kernel-module-psmouse \
+     	kernel-module-r8a66597-udc \
+     	kernel-module-rng-core \
+     	kernel-modules \
+     	kernel-module-scsi-mod \
+     	kernel-module-scsi-wait-scan \
+     	kernel-module-sd-mod \
+     	kernel-module-serio \
+     	kernel-module-serport \
+     	kernel-module-sg \
+     	kernel-module-sha1-generic \
+     	kernel-module-sit \
+     	kernel-module-ssb \
+     	kernel-module-ts-bm \
+     	kernel-module-ts-fsm \
+     	kernel-module-ts-kmp \
+     	kernel-module-tunnel4 \
+     	kernel-module-uhci-hcd \
+     	kernel-module-usbcore \
+     	kernel-module-usbhid \
+     	kernel-module-usbserial \
+     	kernel-module-usb-storage \
+     	kernel-module-xfrm6-mode-beet \
+     	kernel-module-xfrm6-mode-transport \
+     	kernel-module-xfrm6-mode-tunnel \
+     	kernel-module-x-tables \
+     	kernel-module-xt-classify \
+     	kernel-module-xt-comment \
+     	kernel-module-xt-connbytes \
+     	kernel-module-xt-conntrack \
+     	kernel-module-xt-dccp \
+     	kernel-module-xt-helper \
+     	kernel-module-xt-hl \
+     	kernel-module-xt-iprange \
+     	kernel-module-xt-length \
+     	kernel-module-xt-limit \
+     	kernel-module-xt-mac \
+	kernel-module-xt-mark \
+     	kernel-module-xt-nflog \
+     	kernel-module-xt-nfqueue \
+     	kernel-module-xt-notrack \
+     	kernel-module-xt-pkttype \
+     	kernel-module-xt-realm \
+     	kernel-module-xt-sctp \
+     	kernel-module-xt-state \
+     	kernel-module-xt-string \
+     	kernel-module-xt-tcpmss \
+     	kernel-module-xt-tcpudp \
+	"
+
+IMAGE_INSTALL = "\
+	task-proper-tools \
+	${DISTRO_SSH_DAEMON} \
+	${@base_contains('MACHINE_FEATURES', 'ext2', 'task-base-ext2', '', d)} \
+	${@base_contains('MACHINE_FEATURES', 'usbhost', 'task-base-usbhost', '', d)} \
+	kernel-image \
+	${KERNEL_MODULES} \
+	canctl dioctl dmxctl spictl ts-utils ts-initrd \
+	bash \
+	python \
+	ntp \
+	cron \
+	nano \
+	screen \
+	wget \
+	curl \	
+	file \
+	task-java \
+	openjdk-6-vm-cacao \
+        openjdk-6-vm-shark \
+        openjdk-6-vm-zero \
+        openjdk-6-java \
+        openjdk-6-jdk \
+        openjdk-6-jre \
+        iptables \
+	dhclient \	
+	dhcpcd \
+	"
+
+fix_image () {
+          echo "Fixing Image... ${IMAGE_ROOTFS}"
+          # Delete extra files
+          for file in "${IMAGE_ROOTFS}/etc/rcS.d/S03udev \
+	      ${IMAGE_ROOTFS}/etc/rcS.d/S03sysfs \
+	      ${IMAGE_ROOTFS}/etc/rcS.d/S06alignment \
+	      ${IMAGE_ROOTFS}/etc/rcS.d/S10checkroot \
+	      ${IMAGE_ROOTFS}/etc/rcS.d/S12udev-cache \
+	      ${IMAGE_ROOTFS}/etc/rcS.d/S30procps.sh \
+	      ${IMAGE_ROOTFS}/etc/rcS.d/S30ramdisk \
+	      ${IMAGE_ROOTFS}/etc/rcS.d/S35mountall.sh \
+	      ${IMAGE_ROOTFS}/etc/rcS.d/S37populate-volatile.sh \
+	      ${IMAGE_ROOTFS}/etc/rcS.d/S38devpts.sh \
+	      ${IMAGE_ROOTFS}/etc/rcS.d/S39ifup \
+	      ${IMAGE_ROOTFS}/etc/rcS.d/S40configure \
+	      ${IMAGE_ROOTFS}/etc/rcS.d/S45mountnfs.sh \
+	      ${IMAGE_ROOTFS}/etc/rcS.d/S55bootmisc.sh \
+              ${IMAGE_ROOTFS}/var/*" ; 
+          do rm -r ${file} ; done
+          
+          # Make extra nodes
+          for file in "${IMAGE_ROOTFS}/proc \
+              ${IMAGE_ROOTFS}/sys \
+	      ${IMAGE_ROOTFS}/home/root \
+	      ${IMAGE_ROOTFS}/home/v2g \
+	      ${IMAGE_ROOTFS}/tmp" ; 
+          do mkdir -p ${file} ; done
+          
+	  # Fix the opkg-config
+	  echo "src/gz base http://chinook.ceoe.udel.edu/v2g/downloads/ts7500/glibc/ipk/armv4" > ${IMAGE_ROOTFS}/etc/opkg/base-feed.conf
+	  echo "src/gz noarch http://chinook.ceoe.udel.edu/v2g/downloads/ts7500/glibc/ipk/all" > ${IMAGE_ROOTFS}/etc/opkg/noarch-feed.conf
+	  echo "src/gz ts75xx http://chinook.ceoe.udel.edu/v2g/downloads/ts7500/glibc/ipk/ts75xx" > ${IMAGE_ROOTFS}/etc/opkg/ts75xx-feed.conf
+	  
+	  # Fix the non-existent sh link
+	  ln -s /bin/bash ${IMAGE_ROOTFS}/bin/sh
+}
+
+# ROOTFS_POSTPROCESS_COMMAND += "depmod -a ; opkg-cl configure ; "
+
+IMAGE_PREPROCESS_COMMAND += "fix_image ; "
+
+
+export IMAGE_BASENAME = "ts75xx-rootfs-image"
+IMAGE_LINGUAS = ""
+
+inherit image
diff --git a/recipes/linux/linux-ts75xx-2.6.35/ts75xx/cavium-userspace-irq-2.6.35.patch b/recipes/linux/linux-ts75xx-2.6.35/ts75xx/cavium-userspace-irq-2.6.35.patch
new file mode 100644
index 0000000..5240ca9
--- /dev/null
+++ b/recipes/linux/linux-ts75xx-2.6.35/ts75xx/cavium-userspace-irq-2.6.35.patch
@@ -0,0 +1,181 @@ 
+--- linux-2.6.35/kernel/irq/proc.c	2010-08-01 18:11:14.000000000 -0400
++++ linux-2.6.35.11-ts7500/kernel/irq/proc.c	2011-02-27 01:18:59.000000000 -0500
+@@ -11,6 +11,7 @@
+ #include <linux/proc_fs.h>
+ #include <linux/seq_file.h>
+ #include <linux/interrupt.h>
++#include <linux/poll.h>
+ 
+ #include "internals.h"
+ 
+@@ -265,21 +266,165 @@
+ 
+ #define MAX_NAMELEN 10
+ 
++struct irq_proc {
++  unsigned long irq;
++  wait_queue_head_t q;
++  atomic_t count;
++  char devname[TASK_COMM_LEN];
++};
++
++static irqreturn_t irq_proc_irq_handler(int irq, void *vidp)
++{
++  struct irq_proc *idp = (struct irq_proc *)vidp;
++  unsigned long stamp;
++
++  BUG_ON(idp->irq != irq);
++  
++  disable_irq_nosync(irq);
++  atomic_inc(&idp->count);
++  
++  wake_up(&idp->q);
++  return IRQ_HANDLED;
++}
++
++
++/*
++ * Signal to userspace an interrupt has occured.
++ */
++static ssize_t irq_proc_read(struct file *filp, char  __user *bufp, size_t len, loff_t *ppos)
++{
++  struct irq_proc *ip = (struct irq_proc *)filp->private_data;
++  struct irq_desc *idp = irq_desc + ip->irq; 
++  int pending;
++
++  DEFINE_WAIT(wait);
++
++  if (len < sizeof(int))
++    return -EINVAL;
++
++  pending = atomic_read(&ip->count);
++  if (pending == 0) {
++    if (idp->status & IRQ_DISABLED)
++      enable_irq(ip->irq);
++    if (filp->f_flags & O_NONBLOCK)
++      return -EWOULDBLOCK;
++  }
++
++  while (pending == 0) {
++    prepare_to_wait(&ip->q, &wait, TASK_INTERRUPTIBLE);
++    pending = atomic_read(&ip->count);
++    if (pending == 0)
++      schedule();
++    finish_wait(&ip->q, &wait);
++    if (signal_pending(current))
++      return -ERESTARTSYS;
++  }
++
++  if (copy_to_user(bufp, &pending, sizeof pending))
++    return -EFAULT;
++
++  *ppos += sizeof pending;
++
++  atomic_sub(pending, &ip->count);
++  return sizeof pending;
++}
++
++
++static int irq_proc_open(struct inode *inop, struct file *filp)
++{
++  struct irq_proc *ip;
++  struct proc_dir_entry *ent = PDE(inop);
++  int error;
++
++  ip = kmalloc(sizeof *ip, GFP_KERNEL);
++  if (ip == NULL)
++    return -ENOMEM;
++
++  memset(ip, 0, sizeof(*ip));
++  strcpy(ip->devname, current->comm);
++  init_waitqueue_head(&ip->q);
++  atomic_set(&ip->count, 0);
++  ip->irq = (unsigned long)ent->data;
++
++  error = request_irq(ip->irq,
++		      irq_proc_irq_handler,
++		      0,
++		      ip->devname,
++		      ip);
++  if (error < 0) {
++    kfree(ip);
++    return error;
++  }
++  filp->private_data = (void *)ip;
++
++  return 0;
++}
++
++static int irq_proc_release(struct inode *inop, struct file *filp)
++{
++  struct irq_proc *ip = (struct irq_proc *)filp->private_data;
++
++  free_irq(ip->irq, ip);
++  filp->private_data = NULL;
++  kfree(ip);
++  return 0;
++}
++
++static unsigned int irq_proc_poll(struct file *filp, struct poll_table_struct *wait)
++{
++  struct irq_proc *ip = (struct irq_proc *)filp->private_data;
++  struct irq_desc *idp = irq_desc + ip->irq;    
++
++  if (atomic_read(&ip->count) > 0)
++    return POLLIN | POLLRDNORM; /* readable */
++
++  /* if interrupts disabled and we don't have one to process... */
++  if (idp->status & IRQ_DISABLED)
++    enable_irq(ip->irq);
++
++  poll_wait(filp, &ip->q, wait);
++
++  if (atomic_read(&ip->count) > 0)
++    return POLLIN | POLLRDNORM; /* readable */
++
++  return 0;
++}
++
++static struct file_operations irq_proc_file_operations = {
++  .read = irq_proc_read,
++  .open = irq_proc_open,
++  .release = irq_proc_release,
++  .poll = irq_proc_poll,
++};
++
+ void register_irq_proc(unsigned int irq, struct irq_desc *desc)
+ {
++	struct proc_dir_entry *entry;
+ 	char name [MAX_NAMELEN];
+ 
+-	if (!root_irq_dir || (desc->chip == &no_irq_chip) || desc->dir)
++	if (!root_irq_dir)
+ 		return;
+ 
+ 	memset(name, 0, MAX_NAMELEN);
+ 	sprintf(name, "%d", irq);
+ 
+ 	/* create /proc/irq/1234 */
+-	desc->dir = proc_mkdir(name, root_irq_dir);
+-	if (!desc->dir)
+-		return;
+-
++	if (!irq_desc[irq].dir) {
++		/* create /proc/irq/1234 */
++		irq_desc[irq].dir = proc_mkdir(name, root_irq_dir);
++		
++		/*
++		 * Create handles for user-mode interrupt handlers
++		 * if the kernel hasn't already grabbed the IRQ
++		 */
++		entry = create_proc_entry("irq", 0600, irq_desc[irq].dir);
++ 		if (entry) {
++ 			entry->data = (void *)(unsigned long)irq;
++ 			entry->read_proc = NULL;
++ 			entry->write_proc = NULL;
++ 			entry->proc_fops = &irq_proc_file_operations;
++ 		}
++	}
+ #ifdef CONFIG_SMP
+ 	/* create /proc/irq/<irq>/smp_affinity */
+ 	proc_create_data("smp_affinity", 0600, desc->dir,
diff --git a/recipes/linux/linux-ts75xx-2.6.35/ts75xx/defconfig b/recipes/linux/linux-ts75xx-2.6.35/ts75xx/defconfig
new file mode 100644
index 0000000..3423e40
--- /dev/null
+++ b/recipes/linux/linux-ts75xx-2.6.35/ts75xx/defconfig
@@ -0,0 +1,1603 @@ 
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.35.11
+# Wed Mar 23 14:22:38 2011
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_TIME=y
+# CONFIG_ARCH_USES_GETTIMEOFFSET is not set
+CONFIG_HAVE_PROC_CPU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION="${LOCALVERSION}"
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+CONFIG_BLK_DEV_BSG=y
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_STR9100 is not set
+CONFIG_ARCH_STR8100=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_VEXPRESS is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CNS3XXX is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_NUC93X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_SHMOBILE is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P6440 is not set
+# CONFIG_ARCH_S5P6442 is not set
+# CONFIG_ARCH_S5PC100 is not set
+# CONFIG_ARCH_S5PV210 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_PLAT_SPEAR is not set
+CONFIG_CONSOLE_BAUD_RATE=115200
+
+#
+# STR8100 Options
+#
+CONFIG_VIC_INTERRUPT=y
+# CONFIG_STR8100_DRAM_16M is not set
+# CONFIG_STR8100_DRAM_32M is not set
+CONFIG_STR8100_DRAM_64M=y
+CONFIG_STR8100_PCI33M=y
+# CONFIG_STR8100_PCI66M is not set
+# CONFIG_STR8100_DMA is not set
+# CONFIG_STR8100_HSDMA is not set
+CONFIG_STR8100_INFO=y
+# CONFIG_STR8100_USBD_REBOOT_INTHANDLER is not set
+# CONFIG_STR8100_I2S is not set
+# CONFIG_STR8100_I2S_DEMO is not set
+# CONFIG_STR8100_I2S_WM8772_DEMO is not set
+# CONFIG_LE88221_CONTROL is not set
+# CONFIG_STR8100_PCM_LEGERITY_2PHONE_DEMO is not set
+# CONFIG_STR8100_RTC is not set
+CONFIG_STR8100_GPIO=y
+CONFIG_STR8100_GPIO_INTERRUPT=y
+# CONFIG_STR8100_GPIO_GENERIC_INTERFACE is not set
+
+#
+# Flash MAP
+#
+# CONFIG_STR8100_FLASH_PART is not set
+
+#
+# Third Party Support
+#
+# CONFIG_STR8100_EWC_SUPPORT is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_FA526=y
+CONFIG_CPU_32v4=y
+CONFIG_CPU_ABRT_EV4=y
+CONFIG_CPU_PABRT_LEGACY=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_CACHE_FA=y
+CONFIG_CPU_COPY_FA=y
+CONFIG_CPU_TLB_FA=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+CONFIG_CPU_FA_BTB=y
+# CONFIG_CPU_FA_WB_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+
+#
+# Bus support
+#
+CONFIG_PCI=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCI_IOV is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="root=/dev/ram0 init=/linuxrc console=/dev/ttyS0,115200 lpj=958464 debug"
+# CONFIG_CMDLINE_FORCE is not set
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+CONFIG_FPE_FASTFPE=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=m
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_LRO=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+# CONFIG_IPV6_SIT_6RD is not set
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+
+#
+# Core Netfilter Configuration
+#
+CONFIG_NETFILTER_NETLINK=m
+CONFIG_NETFILTER_NETLINK_QUEUE=m
+CONFIG_NETFILTER_NETLINK_LOG=m
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CT_ACCT=y
+CONFIG_NF_CONNTRACK_MARK=y
+CONFIG_NF_CONNTRACK_EVENTS=y
+# CONFIG_NF_CT_PROTO_DCCP is not set
+CONFIG_NF_CT_PROTO_GRE=m
+# CONFIG_NF_CT_PROTO_SCTP is not set
+# CONFIG_NF_CT_PROTO_UDPLITE is not set
+# CONFIG_NF_CONNTRACK_AMANDA is not set
+# CONFIG_NF_CONNTRACK_FTP is not set
+# CONFIG_NF_CONNTRACK_H323 is not set
+# CONFIG_NF_CONNTRACK_IRC is not set
+# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
+CONFIG_NF_CONNTRACK_PPTP=m
+# CONFIG_NF_CONNTRACK_SANE is not set
+# CONFIG_NF_CONNTRACK_SIP is not set
+# CONFIG_NF_CONNTRACK_TFTP is not set
+# CONFIG_NF_CT_NETLINK is not set
+# CONFIG_NETFILTER_TPROXY is not set
+CONFIG_NETFILTER_XTABLES=m
+
+#
+# Xtables combined modules
+#
+CONFIG_NETFILTER_XT_MARK=m
+# CONFIG_NETFILTER_XT_CONNMARK is not set
+
+#
+# Xtables targets
+#
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_CT is not set
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+CONFIG_NETFILTER_XT_TARGET_HL=m
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFLOG=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
+# CONFIG_NETFILTER_XT_TARGET_TEE is not set
+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
+
+#
+# Xtables matches
+#
+# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set
+# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_DCCP=m
+# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
+# CONFIG_NETFILTER_XT_MATCH_ESP is not set
+# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_HL=m
+CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
+# CONFIG_NETFILTER_XT_MATCH_OSF is not set
+# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
+# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
+# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+# CONFIG_NETFILTER_XT_MATCH_RECENT is not set
+CONFIG_NETFILTER_XT_MATCH_SCTP=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+# CONFIG_NETFILTER_XT_MATCH_TIME is not set
+# CONFIG_NETFILTER_XT_MATCH_U32 is not set
+# CONFIG_IP_VS is not set
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_NF_DEFRAG_IPV4=m
+CONFIG_NF_CONNTRACK_IPV4=m
+CONFIG_NF_CONNTRACK_PROC_COMPAT=y
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_MATCH_AH=m
+CONFIG_IP_NF_MATCH_ECN=m
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_NF_NAT=m
+CONFIG_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+# CONFIG_NF_NAT_SNMP_BASIC is not set
+CONFIG_NF_NAT_PROTO_GRE=m
+# CONFIG_NF_NAT_FTP is not set
+# CONFIG_NF_NAT_IRC is not set
+# CONFIG_NF_NAT_TFTP is not set
+# CONFIG_NF_NAT_AMANDA is not set
+CONFIG_NF_NAT_PPTP=m
+# CONFIG_NF_NAT_H323 is not set
+# CONFIG_NF_NAT_SIP is not set
+CONFIG_IP_NF_MANGLE=m
+# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration
+#
+# CONFIG_NF_CONNTRACK_IPV6 is not set
+# CONFIG_IP6_NF_QUEUE is not set
+# CONFIG_IP6_NF_IPTABLES is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+CONFIG_NET_CLS_ROUTE=y
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+# CONFIG_LIB80211 is not set
+
+#
+# CFG80211 needs to be enabled for MAC80211
+#
+
+#
+# Some wireless drivers require a rate control algorithm
+#
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH=""
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=m
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=m
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_DRBD is not set
+CONFIG_BLK_DEV_NBD=y
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=4
+CONFIG_BLK_DEV_RAM_SIZE=16384
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=m
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=m
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=m
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=m
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# The newer stack is recommended.
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_FAST_BRIDGE is not set
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
+# CONFIG_JME is not set
+CONFIG_NETDEV_10000=y
+# CONFIG_CHELSIO_T1 is not set
+CONFIG_CHELSIO_T3_DEPENDS=y
+# CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
+# CONFIG_ENIC is not set
+# CONFIG_IXGBE is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
+# CONFIG_MYRI10GE is not set
+# CONFIG_NETXEN_NIC is not set
+# CONFIG_NIU is not set
+# CONFIG_MLX4_EN is not set
+# CONFIG_MLX4_CORE is not set
+# CONFIG_TEHUTI is not set
+# CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
+# CONFIG_QLGE is not set
+# CONFIG_SFC is not set
+# CONFIG_BE2NET is not set
+
+#
+# CNS2100 NIC support
+#
+CONFIG_STAR_NIC=y
+CONFIG_STAR_NIC_PHY_INTERNAL_PHY=y
+# CONFIG_STAR_NIC_PHY_VSC8601 is not set
+# CONFIG_STAR_NIC_PHY_IP101A is not set
+# CONFIG_STAR_NIC_PHY_IP1001 is not set
+# CONFIG_TR is not set
+CONFIG_WLAN=y
+# CONFIG_ATMEL is not set
+# CONFIG_PRISM54 is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_HOSTAP is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+CONFIG_PPP=y
+# CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=y
+CONFIG_PPP_SYNC_TTY=y
+CONFIG_PPP_DEFLATE=y
+# CONFIG_PPP_BSDCOMP is not set
+# CONFIG_PPP_MPPE is not set
+# CONFIG_PPPOE is not set
+CONFIG_SLIP=y
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLHC=y
+CONFIG_SLIP_SMART=y
+# CONFIG_SLIP_MODE_SLIP6 is not set
+# CONFIG_NET_FC is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_VMXNET3 is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=m
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=m
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=m
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_SENTELIC is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=m
+CONFIG_SERIO_SERPORT=m
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=m
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_PCI is not set
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_SERIAL_8250_CTSRTS is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=m
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+# CONFIG_RAMOOPS is not set
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_STR8100=y
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB=m
+CONFIG_SSB_SPROM=y
+CONFIG_SSB_PCIHOST_POSSIBLE=y
+CONFIG_SSB_PCIHOST=y
+# CONFIG_SSB_B43_PCI_BRIDGE is not set
+# CONFIG_SSB_SILENT is not set
+# CONFIG_SSB_DEBUG is not set
+CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
+CONFIG_SSB_DRIVER_PCICORE=y
+CONFIG_MFD_SUPPORT=y
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_ABX500_CORE is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_AB8500_CORE is not set
+# CONFIG_LPC_SCH is not set
+# CONFIG_MFD_RDC321X is not set
+# CONFIG_MFD_JANZ_CMODIO is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGA_ARB is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=m
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=m
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_3M_PCT is not set
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CANDO is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EGALAX is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MOSART is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_QUANTA is not set
+# CONFIG_HID_ROCCAT is not set
+# CONFIG_HID_ROCCAT_KONE is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_STANTUM is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_ZEROPLUS is not set
+# CONFIG_HID_ZYDACRON is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=m
+# CONFIG_USB_DEBUG is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_XHCI_HCD is not set
+CONFIG_USB_EHCI_HCD=m
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=m
+# CONFIG_USB_OHCI_HCD_SSB is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+CONFIG_USB_UHCI_HCD=m
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=m
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+CONFIG_USB_SERIAL=m
+# CONFIG_USB_EZUSB is not set
+CONFIG_USB_SERIAL_GENERIC=y
+# CONFIG_USB_SERIAL_AIRCABLE is not set
+# CONFIG_USB_SERIAL_ARK3116 is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_CH341 is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_CP210X is not set
+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_FUNSOFT is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IPAQ is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
+# CONFIG_USB_SERIAL_GARMIN is not set
+# CONFIG_USB_SERIAL_IPW is not set
+# CONFIG_USB_SERIAL_IUU is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KLSI is not set
+# CONFIG_USB_SERIAL_KOBIL_SCT is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_MOS7720 is not set
+# CONFIG_USB_SERIAL_MOS7840 is not set
+# CONFIG_USB_SERIAL_MOTOROLA is not set
+# CONFIG_USB_SERIAL_NAVMAN is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_QCAUX is not set
+# CONFIG_USB_SERIAL_QUALCOMM is not set
+# CONFIG_USB_SERIAL_SPCP8X5 is not set
+# CONFIG_USB_SERIAL_HP4X is not set
+# CONFIG_USB_SERIAL_SAFE is not set
+# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
+# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
+# CONFIG_USB_SERIAL_SYMBOL is not set
+# CONFIG_USB_SERIAL_TI is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+# CONFIG_USB_SERIAL_OPTION is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+# CONFIG_USB_SERIAL_OPTICON is not set
+# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set
+# CONFIG_USB_SERIAL_ZIO is not set
+# CONFIG_USB_SERIAL_DEBUG is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+CONFIG_USB_GADGET_R8A66597=y
+CONFIG_USB_R8A66597=m
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FUNCTIONFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_MASS_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_NOKIA is not set
+# CONFIG_USB_G_MULTI is not set
+# CONFIG_USB_G_HID is not set
+# CONFIG_USB_G_WEBCAM is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_ULPI is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_UWB is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+CONFIG_EXT2_FS_XIP=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_FS_XIP=y
+CONFIG_JBD=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+# CONFIG_DNOTIFY is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+CONFIG_UNION_FS=m
+# CONFIG_UNION_FS_XATTR is not set
+# CONFIG_UNION_FS_DEBUG is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_ROOT_NFS is not set
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+CONFIG_STRIP_ASM_SYMS=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_ARM_UNWIND=y
+# CONFIG_DEBUG_USER is not set
+# CONFIG_OC_ETM is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=m
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=m
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_MANAGER_TESTS=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+CONFIG_CRYPTO_MICHAEL_MIC=m
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=m
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+CONFIG_CRYPTO_ANSI_CPRNG=m
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_TEXTSEARCH=y
+CONFIG_TEXTSEARCH_KMP=m
+CONFIG_TEXTSEARCH_BM=m
+CONFIG_TEXTSEARCH_FSM=m
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
diff --git a/recipes/linux/linux-ts75xx-2.6.35/ts75xx/defconfig.bak b/recipes/linux/linux-ts75xx-2.6.35/ts75xx/defconfig.bak
new file mode 100644
index 0000000..71a3a82
--- /dev/null
+++ b/recipes/linux/linux-ts75xx-2.6.35/ts75xx/defconfig.bak
@@ -0,0 +1,1521 @@ 
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.35.11
+# Sat Feb 26 21:00:50 2011
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_TIME=y
+# CONFIG_ARCH_USES_GETTIMEOFFSET is not set
+CONFIG_HAVE_PROC_CPU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TREE_PREEMPT_RCU is not set
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+# CONFIG_RD_LZO is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_DEADLINE=y
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="deadline"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_STR9100 is not set
+CONFIG_ARCH_STR8100=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_VEXPRESS is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CNS3XXX is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_NUC93X is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_SHMOBILE is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P6440 is not set
+# CONFIG_ARCH_S5P6442 is not set
+# CONFIG_ARCH_S5PC100 is not set
+# CONFIG_ARCH_S5PV210 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_PLAT_SPEAR is not set
+CONFIG_CONSOLE_BAUD_RATE=115200
+
+#
+# STR8100 Options
+#
+CONFIG_VIC_INTERRUPT=y
+# CONFIG_STR8100_DRAM_16M is not set
+# CONFIG_STR8100_DRAM_32M is not set
+CONFIG_STR8100_DRAM_64M=y
+CONFIG_STR8100_PCI33M=y
+# CONFIG_STR8100_PCI66M is not set
+# CONFIG_STR8100_DMA is not set
+# CONFIG_STR8100_HSDMA is not set
+CONFIG_STR8100_INFO=y
+# CONFIG_STR8100_USBD_REBOOT_INTHANDLER is not set
+# CONFIG_STR8100_I2S is not set
+# CONFIG_STR8100_I2S_DEMO is not set
+# CONFIG_STR8100_I2S_WM8772_DEMO is not set
+# CONFIG_LE88221_CONTROL is not set
+# CONFIG_STR8100_PCM_LEGERITY_2PHONE_DEMO is not set
+# CONFIG_STR8100_RTC is not set
+CONFIG_STR8100_GPIO=y
+CONFIG_STR8100_GPIO_INTERRUPT=y
+# CONFIG_STR8100_GPIO_GENERIC_INTERFACE is not set
+
+#
+# Flash MAP
+#
+# CONFIG_STR8100_FLASH_PART is not set
+
+#
+# Third Party Support
+#
+# CONFIG_STR8100_EWC_SUPPORT is not set
+
+#
+# Processor Type
+#
+CONFIG_CPU_FA526=y
+CONFIG_CPU_32v4=y
+CONFIG_CPU_ABRT_EV4=y
+CONFIG_CPU_PABRT_LEGACY=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_CACHE_FA=y
+CONFIG_CPU_COPY_FA=y
+CONFIG_CPU_TLB_FA=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
+CONFIG_CPU_FA_BTB=y
+# CONFIG_CPU_FA_WB_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+
+#
+# Bus support
+#
+CONFIG_PCI=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCI_IOV is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="root=/dev/ram0 init=/linuxrc lpj=958464 console=null"
+# CONFIG_CMDLINE_FORCE is not set
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+# CONFIG_FPE_NWFPE is not set
+CONFIG_FPE_FASTFPE=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=m
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_LRO=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+# CONFIG_IPV6_SIT_6RD is not set
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+CONFIG_NETFILTER=y
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK is not set
+CONFIG_NETFILTER_XTABLES=m
+CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
+CONFIG_NETFILTER_XT_TARGET_MARK=m
+CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
+CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
+CONFIG_NETFILTER_XT_MATCH_COMMENT=m
+CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_DCCP=m
+# CONFIG_NETFILTER_XT_MATCH_ESP is not set
+CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_LENGTH=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=m
+CONFIG_NETFILTER_XT_MATCH_MAC=m
+CONFIG_NETFILTER_XT_MATCH_MARK=m
+# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
+# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
+CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
+CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
+CONFIG_NETFILTER_XT_MATCH_REALM=m
+CONFIG_NETFILTER_XT_MATCH_SCTP=m
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NETFILTER_XT_MATCH_STRING=m
+CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_IP_NF_CONNTRACK=m
+CONFIG_IP_NF_CT_ACCT=y
+# CONFIG_IP_NF_CONNTRACK_MARK is not set
+# CONFIG_IP_NF_CONNTRACK_EVENTS is not set
+CONFIG_IP_NF_CT_PROTO_SCTP=m
+CONFIG_IP_NF_FTP=m
+CONFIG_IP_NF_IRC=m
+# CONFIG_IP_NF_NETBIOS_NS is not set
+CONFIG_IP_NF_TFTP=m
+CONFIG_IP_NF_AMANDA=m
+# CONFIG_IP_NF_PPTP is not set
+# CONFIG_IP_NF_H323 is not set
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_IPRANGE=m
+CONFIG_IP_NF_MATCH_TOS=m
+CONFIG_IP_NF_MATCH_RECENT=m
+CONFIG_IP_NF_MATCH_ECN=m
+# CONFIG_IP_NF_MATCH_DSCP is not set
+# CONFIG_IP_NF_MATCH_AH is not set
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_MATCH_OWNER=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_MATCH_HASHLIMIT=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+# CONFIG_IP_NF_TARGET_TCPMSS is not set
+CONFIG_IP_NF_NAT=m
+CONFIG_IP_NF_NAT_NEEDED=y
+CONFIG_IP_NF_TARGET_MASQUERADE=m
+CONFIG_IP_NF_TARGET_REDIRECT=m
+CONFIG_IP_NF_TARGET_NETMAP=m
+CONFIG_IP_NF_TARGET_SAME=m
+CONFIG_IP_NF_NAT_SNMP_BASIC=m
+CONFIG_IP_NF_NAT_IRC=m
+CONFIG_IP_NF_NAT_FTP=m
+CONFIG_IP_NF_NAT_TFTP=m
+CONFIG_IP_NF_NAT_AMANDA=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_TOS=m
+CONFIG_IP_NF_TARGET_ECN=m
+CONFIG_IP_NF_TARGET_DSCP=m
+CONFIG_IP_NF_TARGET_TTL=m
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+# CONFIG_LIB80211 is not set
+
+#
+# CFG80211 needs to be enabled for MAC80211
+#
+
+#
+# Some wireless drivers require a rate control algorithm
+#
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=m
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=m
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_DRBD is not set
+CONFIG_BLK_DEV_NBD=y
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=4
+CONFIG_BLK_DEV_RAM_SIZE=16384
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=m
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=m
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=m
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=m
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# You can enable one or both FireWire driver stacks.
+#
+
+#
+# The newer stack is recommended.
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_FAST_BRIDGE is not set
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_CNIC is not set
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
+# CONFIG_JME is not set
+CONFIG_NETDEV_10000=y
+# CONFIG_CHELSIO_T1 is not set
+CONFIG_CHELSIO_T3_DEPENDS=y
+# CONFIG_CHELSIO_T3 is not set
+CONFIG_CHELSIO_T4_DEPENDS=y
+# CONFIG_CHELSIO_T4 is not set
+# CONFIG_ENIC is not set
+# CONFIG_IXGBE is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
+# CONFIG_MYRI10GE is not set
+# CONFIG_NETXEN_NIC is not set
+# CONFIG_NIU is not set
+# CONFIG_MLX4_EN is not set
+# CONFIG_MLX4_CORE is not set
+# CONFIG_TEHUTI is not set
+# CONFIG_BNX2X is not set
+# CONFIG_QLCNIC is not set
+# CONFIG_QLGE is not set
+# CONFIG_SFC is not set
+# CONFIG_BE2NET is not set
+
+#
+# CNS2100 NIC support
+#
+CONFIG_STAR_NIC=y
+CONFIG_STAR_NIC_PHY_INTERNAL_PHY=y
+# CONFIG_STAR_NIC_PHY_VSC8601 is not set
+# CONFIG_STAR_NIC_PHY_IP101A is not set
+# CONFIG_STAR_NIC_PHY_IP1001 is not set
+# CONFIG_TR is not set
+CONFIG_WLAN=y
+# CONFIG_ATMEL is not set
+# CONFIG_PRISM54 is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_HOSTAP is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_IPHETH is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+CONFIG_PPP=y
+# CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=y
+CONFIG_PPP_SYNC_TTY=y
+CONFIG_PPP_DEFLATE=y
+# CONFIG_PPP_BSDCOMP is not set
+# CONFIG_PPP_MPPE is not set
+# CONFIG_PPPOE is not set
+CONFIG_SLIP=y
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLHC=y
+CONFIG_SLIP_SMART=y
+# CONFIG_SLIP_MODE_SLIP6 is not set
+# CONFIG_NET_FC is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_VMXNET3 is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=m
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=m
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=m
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_SENTELIC is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=m
+CONFIG_SERIO_SERPORT=m
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=m
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_PCI is not set
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+# CONFIG_SERIAL_8250_EXTENDED is not set
+# CONFIG_SERIAL_8250_CTSRTS is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=m
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+# CONFIG_RAMOOPS is not set
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_STR8100=y
+# CONFIG_SPI_XILINX is not set
+# CONFIG_SPI_DESIGNWARE is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB=m
+CONFIG_SSB_SPROM=y
+CONFIG_SSB_PCIHOST_POSSIBLE=y
+CONFIG_SSB_PCIHOST=y
+# CONFIG_SSB_B43_PCI_BRIDGE is not set
+# CONFIG_SSB_SILENT is not set
+# CONFIG_SSB_DEBUG is not set
+CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
+CONFIG_SSB_DRIVER_PCICORE=y
+CONFIG_MFD_SUPPORT=y
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_MC13783 is not set
+# CONFIG_ABX500_CORE is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_AB8500_CORE is not set
+# CONFIG_LPC_SCH is not set
+# CONFIG_MFD_RDC321X is not set
+# CONFIG_MFD_JANZ_CMODIO is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGA_ARB is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=m
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=m
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_3M_PCT is not set
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CANDO is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EGALAX is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MOSART is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_ORTEK is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_QUANTA is not set
+# CONFIG_HID_ROCCAT is not set
+# CONFIG_HID_ROCCAT_KONE is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_STANTUM is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_ZEROPLUS is not set
+# CONFIG_HID_ZYDACRON is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=m
+# CONFIG_USB_DEBUG is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_XHCI_HCD is not set
+CONFIG_USB_EHCI_HCD=m
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=m
+# CONFIG_USB_OHCI_HCD_SSB is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+CONFIG_USB_UHCI_HCD=m
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=m
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+CONFIG_USB_SERIAL=m
+# CONFIG_USB_EZUSB is not set
+CONFIG_USB_SERIAL_GENERIC=y
+# CONFIG_USB_SERIAL_AIRCABLE is not set
+# CONFIG_USB_SERIAL_ARK3116 is not set
+# CONFIG_USB_SERIAL_BELKIN is not set
+# CONFIG_USB_SERIAL_CH341 is not set
+# CONFIG_USB_SERIAL_WHITEHEAT is not set
+# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
+# CONFIG_USB_SERIAL_CP210X is not set
+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
+# CONFIG_USB_SERIAL_EMPEG is not set
+# CONFIG_USB_SERIAL_FTDI_SIO is not set
+# CONFIG_USB_SERIAL_FUNSOFT is not set
+# CONFIG_USB_SERIAL_VISOR is not set
+# CONFIG_USB_SERIAL_IPAQ is not set
+# CONFIG_USB_SERIAL_IR is not set
+# CONFIG_USB_SERIAL_EDGEPORT is not set
+# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
+# CONFIG_USB_SERIAL_GARMIN is not set
+# CONFIG_USB_SERIAL_IPW is not set
+# CONFIG_USB_SERIAL_IUU is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+# CONFIG_USB_SERIAL_KLSI is not set
+# CONFIG_USB_SERIAL_KOBIL_SCT is not set
+# CONFIG_USB_SERIAL_MCT_U232 is not set
+# CONFIG_USB_SERIAL_MOS7720 is not set
+# CONFIG_USB_SERIAL_MOS7840 is not set
+# CONFIG_USB_SERIAL_MOTOROLA is not set
+# CONFIG_USB_SERIAL_NAVMAN is not set
+# CONFIG_USB_SERIAL_PL2303 is not set
+# CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_QCAUX is not set
+# CONFIG_USB_SERIAL_QUALCOMM is not set
+# CONFIG_USB_SERIAL_SPCP8X5 is not set
+# CONFIG_USB_SERIAL_HP4X is not set
+# CONFIG_USB_SERIAL_SAFE is not set
+# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
+# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
+# CONFIG_USB_SERIAL_SYMBOL is not set
+# CONFIG_USB_SERIAL_TI is not set
+# CONFIG_USB_SERIAL_CYBERJACK is not set
+# CONFIG_USB_SERIAL_XIRCOM is not set
+# CONFIG_USB_SERIAL_OPTION is not set
+# CONFIG_USB_SERIAL_OMNINET is not set
+# CONFIG_USB_SERIAL_OPTICON is not set
+# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set
+# CONFIG_USB_SERIAL_ZIO is not set
+# CONFIG_USB_SERIAL_DEBUG is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+CONFIG_USB_GADGET_R8A66597=y
+CONFIG_USB_R8A66597=m
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FUNCTIONFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_MASS_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_NOKIA is not set
+# CONFIG_USB_G_MULTI is not set
+# CONFIG_USB_G_HID is not set
+# CONFIG_USB_G_WEBCAM is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_ULPI is not set
+# CONFIG_NOP_USB_XCEIV is not set
+# CONFIG_UWB is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+CONFIG_EXT2_FS_XIP=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_FS_XIP=y
+CONFIG_JBD=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_FSNOTIFY is not set
+# CONFIG_DNOTIFY is not set
+CONFIG_INOTIFY=y
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_ROOT_NFS is not set
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+CONFIG_STRIP_ASM_SYMS=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_ARM_UNWIND=y
+# CONFIG_DEBUG_USER is not set
+# CONFIG_OC_ETM is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=m
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=m
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_MANAGER_TESTS=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+CONFIG_CRYPTO_MICHAEL_MIC=m
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=m
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+CONFIG_CRYPTO_ANSI_CPRNG=m
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
diff --git a/recipes/linux/linux-ts75xx-2.6.35/ts75xx/ts7500-2.6.35.11.patch b/recipes/linux/linux-ts75xx-2.6.35/ts75xx/ts7500-2.6.35.11.patch
new file mode 100644
index 0000000..97fcd7b
--- /dev/null
+++ b/recipes/linux/linux-ts75xx-2.6.35/ts75xx/ts7500-2.6.35.11.patch
@@ -0,0 +1,85527 @@ 
+diff -rupN linux-2.6.35.11/arch/arm/boot/bootp/bootp.lds linux-2.6.35.11-ts7500/arch/arm/boot/bootp/bootp.lds
+--- linux-2.6.35.11/arch/arm/boot/bootp/bootp.lds	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/boot/bootp/bootp.lds	2011-03-14 11:18:24.000000000 -0400
+@@ -17,6 +17,8 @@ SECTIONS
+    *(.start)
+    *(.text)
+    initrd_size = initrd_end - initrd_start;
++/* scott.kernel */
++   kernel_size = kernel_end - kernel_start;   
+    _etext = .;
+   }
+ 
+diff -rupN linux-2.6.35.11/arch/arm/boot/bootp/init.S linux-2.6.35.11-ts7500/arch/arm/boot/bootp/init.S
+--- linux-2.6.35.11/arch/arm/boot/bootp/init.S	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/boot/bootp/init.S	2011-03-14 11:18:24.000000000 -0400
+@@ -22,9 +22,13 @@
+ 
+ _start:		add	lr, pc, #-0x8		@ lr = current load addr
+ 		adr	r13, data
+-		ldmia	r13!, {r4-r6}		@ r5 = dest, r6 = length
++		ldmia	r13!, {r4-r6}		@ r5 = initrd_phys, r6 = initrd_size
+ 		add	r4, r4, lr		@ r4 = initrd_start + load addr
+ 		bl	move			@ move the initrd
++		ldmia	r13!, {r4-r6}		@ r5 = kernel_phys, r6 = kernel_size
++		add	r4, r4, lr		@ r4 = kernel_start + load addr
++		mov	r12, r5			@ save kernel_phys to r12
++		bl	move			@ move the kernel
+ 
+ /*
+  * Setup the initrd parameters to pass to the kernel.  This can only be
+@@ -49,7 +53,7 @@ _start:		add	lr, pc, #-0x8		@ lr = curre
+ /*
+  * find the end of the tag list, and then add an INITRD tag on the end.
+  * If there is already an INITRD tag, then we ignore it; the last INITRD
+- * tag takes precedence.
++ * tag takes precidence.
+  */
+ taglist:	ldr	r10, [r9, #0]		@ tag length
+ 		teq	r10, #0			@ last tag (zero length)?
+@@ -58,7 +62,11 @@ taglist:	ldr	r10, [r9, #0]		@ tag length
+ 
+ 		mov	r5, #4			@ Size of initrd tag (4 words)
+ 		stmia	r9, {r5, r6, r7, r8, r10}
++/* scott.kernel */
++		mov	pc, r12
++/* scott.kernel 
+ 		b	kernel_start		@ call kernel
++*/
+ 
+ /*
+  * Move the block of memory length r6 from address r4 to address r5
+@@ -77,6 +85,10 @@ move:		ldmia	r4!, {r7 - r10}		@ move 32-
+ data:		.word	initrd_start		@ source initrd address
+ 		.word	initrd_phys		@ destination initrd address
+ 		.word	initrd_size		@ initrd size
++/* scott.kernel */
++		.word	kernel_start		@ source kernel address
++		.word	kernel_phys		@ destination kernel address
++		.word	kernel_size		@ kernel size
+ 
+ 		.word	0x54410001		@ r5 = ATAG_CORE
+ 		.word	0x54420005		@ r6 = ATAG_INITRD2
+diff -rupN linux-2.6.35.11/arch/arm/boot/bootp/init.S.old linux-2.6.35.11-ts7500/arch/arm/boot/bootp/init.S.old
+--- linux-2.6.35.11/arch/arm/boot/bootp/init.S.old	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/boot/bootp/init.S.old	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,86 @@
++/*
++ *  linux/arch/arm/boot/bootp/init.S
++ *
++ *  Copyright (C) 2000-2003 Russell King.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ *  "Header" file for splitting kernel + initrd.  Note that we pass
++ *  r0 through to r3 straight through.
++ *
++ *  This demonstrates how to append code to the start of the kernel
++ *  zImage, and boot the kernel without copying it around.  This
++ *  example would be simpler; if we didn't have an object of unknown
++ *  size immediately following the kernel, we could build this into
++ *  a binary blob, and concatenate the zImage using the cat command.
++ */
++		.section .start,#alloc,#execinstr
++		.type	_start, #function
++		.globl	_start
++
++_start:		add	lr, pc, #-0x8		@ lr = current load addr
++		adr	r13, data
++		ldmia	r13!, {r4-r6}		@ r5 = dest, r6 = length
++		add	r4, r4, lr		@ r4 = initrd_start + load addr
++		bl	move			@ move the initrd
++
++/*
++ * Setup the initrd parameters to pass to the kernel.  This can only be
++ * passed in via the tagged list.
++ */
++		ldmia	r13, {r5-r9}		@ get size and addr of initrd
++						@ r5 = ATAG_CORE
++						@ r6 = ATAG_INITRD2
++						@ r7 = initrd start
++						@ r8 = initrd end
++						@ r9 = param_struct address
++
++		ldr	r10, [r9, #4]		@ get first tag
++		teq	r10, r5			@ is it ATAG_CORE?
++/*
++ * If we didn't find a valid tag list, create a dummy ATAG_CORE entry.
++ */
++		movne	r10, #0			@ terminator
++		movne	r4, #2			@ Size of this entry (2 words)
++		stmneia	r9, {r4, r5, r10}	@ Size, ATAG_CORE, terminator
++
++/*
++ * find the end of the tag list, and then add an INITRD tag on the end.
++ * If there is already an INITRD tag, then we ignore it; the last INITRD
++ * tag takes precedence.
++ */
++taglist:	ldr	r10, [r9, #0]		@ tag length
++		teq	r10, #0			@ last tag (zero length)?
++		addne	r9, r9, r10, lsl #2
++		bne	taglist
++
++		mov	r5, #4			@ Size of initrd tag (4 words)
++		stmia	r9, {r5, r6, r7, r8, r10}
++		b	kernel_start		@ call kernel
++
++/*
++ * Move the block of memory length r6 from address r4 to address r5
++ */
++move:		ldmia	r4!, {r7 - r10}		@ move 32-bytes at a time
++		stmia	r5!, {r7 - r10}
++		ldmia	r4!, {r7 - r10}
++		stmia	r5!, {r7 - r10}
++		subs	r6, r6, #8 * 4
++		bcs	move
++		mov	pc, lr
++
++		.size	_start, . - _start
++
++		.type	data,#object
++data:		.word	initrd_start		@ source initrd address
++		.word	initrd_phys		@ destination initrd address
++		.word	initrd_size		@ initrd size
++
++		.word	0x54410001		@ r5 = ATAG_CORE
++		.word	0x54420005		@ r6 = ATAG_INITRD2
++		.word	initrd_phys		@ r7
++		.word	initrd_size		@ r8
++		.word	params_phys		@ r9
++		.size	data, . - data
+diff -rupN linux-2.6.35.11/arch/arm/boot/bootp/Makefile linux-2.6.35.11-ts7500/arch/arm/boot/bootp/Makefile
+--- linux-2.6.35.11/arch/arm/boot/bootp/Makefile	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/boot/bootp/Makefile	2011-03-14 11:18:24.000000000 -0400
+@@ -7,6 +7,7 @@
+ 
+ LDFLAGS_bootp	:=-p --no-undefined -X \
+ 		 --defsym initrd_phys=$(INITRD_PHYS) \
++ 		 --defsym kernel_phys=$(KERNEL_PHYS) \
+ 		 --defsym params_phys=$(PARAMS_PHYS) -T
+ AFLAGS_initrd.o :=-DINITRD=\"$(INITRD)\"
+ 
+diff -rupN linux-2.6.35.11/arch/arm/boot/compressed/head.S linux-2.6.35.11-ts7500/arch/arm/boot/compressed/head.S
+--- linux-2.6.35.11/arch/arm/boot/compressed/head.S	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/boot/compressed/head.S	2011-03-14 11:18:24.000000000 -0400
+@@ -71,6 +71,21 @@ wait:		mrc	p14, 0, pc, c0, c1, 0
+ 		mov	\rb, #0x50000000
+ 		add	\rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT
+ 		.endm
++#elif defined(CONFIG_ARCH_STR9100)
++		.macro	loadsp, rb
++		mov	\rb, #0x78000000
++		.endm
++		.macro	writeb, rb
++		strb	\rb, [r3, #0]
++		.endm
++#elif defined(CONFIG_ARCH_STR8100)
++		.macro	loadsp, rb
++		mov	\rb, #0x78000000		
++		.endm      
++		
++		.macro	writeb, rb
++		strb	\rb, [r3, #0]
++		.endm      
+ #else
+ 		.macro	loadsp,	rb, tmp
+ 		addruart \rb, \tmp
+@@ -444,6 +459,15 @@ __setup_mmu:	sub	r3, r4, #16384		@ Page
+ 		mov	pc, lr
+ ENDPROC(__setup_mmu)
+ 
++
++/* added by ivan wang for no cache support */
++__armv4_no_mmu_cache:
++		orr	r0,r0,#0
++		orr	r0,r0,#0
++		mov	pc,lr
++		orr	r0,r0,#0
++		orr	r0,r0,#0
++
+ __armv4_mmu_cache_on:
+ 		mov	r12, lr
+ #ifdef CONFIG_MMU
+@@ -530,6 +554,13 @@ __common_mmu_cache_on:
+ 		.align	5			@ cache line aligned
+ 1:		mcr	p15, 0, r0, c1, c0, 0	@ load control register
+ 		mrc	p15, 0, r0, c1, c0, 0	@ and read it back to
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++		/* FA520/FA526 need > 2 nops */
++		mov     r0,r0
++		mov     r0,r0
++      mov     r0,r0
++		mov     r0,r0
++#endif      
+ 		sub	pc, lr, r0, lsr #32	@ properly flush pipeline
+ #endif
+ 
+@@ -712,12 +743,13 @@ proc_types:
+ 		b	__armv5tej_mmu_cache_flush
+ #endif
+ 
++#if (0)
+ 		.word	0x66015261		@ FA526
+ 		.word	0xff01fff1
+ 		W(b)	__fa526_cache_on
+ 		W(b)	__armv4_mmu_cache_off
+ 		W(b)	__fa526_cache_flush
+-
++#endif
+ 		@ These match on the architecture ID
+ 
+ 		.word	0x00020000		@ ARMv4T
+@@ -726,6 +758,18 @@ proc_types:
+ 		W(b)	__armv4_mmu_cache_off
+ 		W(b)	__armv4_mmu_cache_flush
+ 
++#if (1)      
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++		.word	0x66015261		@ FA526, ARMv4
++		.word	0xff01fff1
++		W(b)	__armv4_mmu_cache_on
++      @W(b)	__fa526_cache_on
++		W(b)	__armv4_mmu_cache_off
++		W(b)	__armv4_mmu_cache_flush
++      @W(b)	__fa526_cache_flush 
++#endif      
++#endif
++
+ 		.word	0x00050000		@ ARMv5TE
+ 		.word	0x000f0000
+ 		W(b)	__armv4_mmu_cache_on
+@@ -801,6 +845,13 @@ __armv4_mmu_cache_off:
+ 		mrc	p15, 0, r0, c1, c0
+ 		bic	r0, r0, #0x000d
+ 		mcr	p15, 0, r0, c1, c0	@ turn MMU and cache off
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++		/* FA520/FA526 need > 2 nops */
++		mov	r0,r0
++		mov	r0,r0
++      mov     r0,r0
++		mov     r0,r0
++#endif      
+ 		mov	r0, #0
+ 		mcr	p15, 0, r0, c7, c7	@ invalidate whole cache v4
+ 		mcr	p15, 0, r0, c8, c7	@ invalidate whole TLB v4
+@@ -970,6 +1021,10 @@ __armv4_mmu_cache_flush:
+ 		mov	r11, #8
+ 		mov	r11, r11, lsl r3	@ cache line size in bytes
+ no_cache_id:
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++		mov	r1,#0
++		mcr	p15, 0, r1, c7, c10, 0	@ clean D cache
++#endif
+ 		mov	r1, pc
+ 		bic	r1, r1, #63		@ align to longest cache line
+ 		add	r2, r1, r2
+diff -rupN linux-2.6.35.11/arch/arm/boot/compressed/head.S.orig linux-2.6.35.11-ts7500/arch/arm/boot/compressed/head.S.orig
+--- linux-2.6.35.11/arch/arm/boot/compressed/head.S.orig	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/boot/compressed/head.S.orig	2011-02-06 14:04:07.000000000 -0500
+@@ -0,0 +1,1072 @@
++/*
++ *  linux/arch/arm/boot/compressed/head.S
++ *
++ *  Copyright (C) 1996-2002 Russell King
++ *  Copyright (C) 2004 Hyok S. Choi (MPU support)
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/linkage.h>
++
++/*
++ * Debugging stuff
++ *
++ * Note that these macros must not contain any code which is not
++ * 100% relocatable.  Any attempt to do so will result in a crash.
++ * Please select one of the following when turning on debugging.
++ */
++#ifdef DEBUG
++
++#if defined(CONFIG_DEBUG_ICEDCC)
++
++#ifdef CONFIG_CPU_V6
++		.macro	loadsp, rb, tmp
++		.endm
++		.macro	writeb, ch, rb
++		mcr	p14, 0, \ch, c0, c5, 0
++		.endm
++#elif defined(CONFIG_CPU_V7)
++		.macro	loadsp, rb, tmp
++		.endm
++		.macro	writeb, ch, rb
++wait:		mrc	p14, 0, pc, c0, c1, 0
++		bcs	wait
++		mcr	p14, 0, \ch, c0, c5, 0
++		.endm
++#elif defined(CONFIG_CPU_XSCALE)
++		.macro	loadsp, rb, tmp
++		.endm
++		.macro	writeb, ch, rb
++		mcr	p14, 0, \ch, c8, c0, 0
++		.endm
++#else
++		.macro	loadsp, rb, tmp
++		.endm
++		.macro	writeb, ch, rb
++		mcr	p14, 0, \ch, c1, c0, 0
++		.endm
++#endif
++
++#else
++
++#include <mach/debug-macro.S>
++
++		.macro	writeb,	ch, rb
++		senduart \ch, \rb
++		.endm
++
++#if defined(CONFIG_ARCH_SA1100)
++		.macro	loadsp, rb, tmp
++		mov	\rb, #0x80000000	@ physical base address
++#ifdef CONFIG_DEBUG_LL_SER3
++		add	\rb, \rb, #0x00050000	@ Ser3
++#else
++		add	\rb, \rb, #0x00010000	@ Ser1
++#endif
++		.endm
++#elif defined(CONFIG_ARCH_S3C2410)
++		.macro loadsp, rb, tmp
++		mov	\rb, #0x50000000
++		add	\rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT
++		.endm
++#else
++		.macro	loadsp,	rb, tmp
++		addruart \rb, \tmp
++		.endm
++#endif
++#endif
++#endif
++
++		.macro	kputc,val
++		mov	r0, \val
++		bl	putc
++		.endm
++
++		.macro	kphex,val,len
++		mov	r0, \val
++		mov	r1, #\len
++		bl	phex
++		.endm
++
++		.macro	debug_reloc_start
++#ifdef DEBUG
++		kputc	#'\n'
++		kphex	r6, 8		/* processor id */
++		kputc	#':'
++		kphex	r7, 8		/* architecture id */
++#ifdef CONFIG_CPU_CP15
++		kputc	#':'
++		mrc	p15, 0, r0, c1, c0
++		kphex	r0, 8		/* control reg */
++#endif
++		kputc	#'\n'
++		kphex	r5, 8		/* decompressed kernel start */
++		kputc	#'-'
++		kphex	r9, 8		/* decompressed kernel end  */
++		kputc	#'>'
++		kphex	r4, 8		/* kernel execution address */
++		kputc	#'\n'
++#endif
++		.endm
++
++		.macro	debug_reloc_end
++#ifdef DEBUG
++		kphex	r5, 8		/* end of kernel */
++		kputc	#'\n'
++		mov	r0, r4
++		bl	memdump		/* dump 256 bytes at start of kernel */
++#endif
++		.endm
++
++		.section ".start", #alloc, #execinstr
++/*
++ * sort out different calling conventions
++ */
++		.align
++start:
++		.type	start,#function
++		.rept	8
++		mov	r0, r0
++		.endr
++
++		b	1f
++		.word	0x016f2818		@ Magic numbers to help the loader
++		.word	start			@ absolute load/run zImage address
++		.word	_edata			@ zImage end address
++1:		mov	r7, r1			@ save architecture ID
++		mov	r8, r2			@ save atags pointer
++
++#ifndef __ARM_ARCH_2__
++		/*
++		 * Booting from Angel - need to enter SVC mode and disable
++		 * FIQs/IRQs (numeric definitions from angel arm.h source).
++		 * We only do this if we were in user mode on entry.
++		 */
++		mrs	r2, cpsr		@ get current mode
++		tst	r2, #3			@ not user?
++		bne	not_angel
++		mov	r0, #0x17		@ angel_SWIreason_EnterSVC
++ ARM(		swi	0x123456	)	@ angel_SWI_ARM
++ THUMB(		svc	0xab		)	@ angel_SWI_THUMB
++not_angel:
++		mrs	r2, cpsr		@ turn off interrupts to
++		orr	r2, r2, #0xc0		@ prevent angel from running
++		msr	cpsr_c, r2
++#else
++		teqp	pc, #0x0c000003		@ turn off interrupts
++#endif
++
++		/*
++		 * Note that some cache flushing and other stuff may
++		 * be needed here - is there an Angel SWI call for this?
++		 */
++
++		/*
++		 * some architecture specific code can be inserted
++		 * by the linker here, but it should preserve r7, r8, and r9.
++		 */
++
++		.text
++		adr	r0, LC0
++ ARM(		ldmia	r0, {r1, r2, r3, r4, r5, r6, r11, ip, sp})
++ THUMB(		ldmia	r0, {r1, r2, r3, r4, r5, r6, r11, ip}	)
++ THUMB(		ldr	sp, [r0, #32]				)
++		subs	r0, r0, r1		@ calculate the delta offset
++
++						@ if delta is zero, we are
++		beq	not_relocated		@ running at the address we
++						@ were linked at.
++
++		/*
++		 * We're running at a different address.  We need to fix
++		 * up various pointers:
++		 *   r5 - zImage base address (_start)
++		 *   r6 - size of decompressed image
++		 *   r11 - GOT start
++		 *   ip - GOT end
++		 */
++		add	r5, r5, r0
++		add	r11, r11, r0
++		add	ip, ip, r0
++
++#ifndef CONFIG_ZBOOT_ROM
++		/*
++		 * If we're running fully PIC === CONFIG_ZBOOT_ROM = n,
++		 * we need to fix up pointers into the BSS region.
++		 *   r2 - BSS start
++		 *   r3 - BSS end
++		 *   sp - stack pointer
++		 */
++		add	r2, r2, r0
++		add	r3, r3, r0
++		add	sp, sp, r0
++
++		/*
++		 * Relocate all entries in the GOT table.
++		 */
++1:		ldr	r1, [r11, #0]		@ relocate entries in the GOT
++		add	r1, r1, r0		@ table.  This fixes up the
++		str	r1, [r11], #4		@ C references.
++		cmp	r11, ip
++		blo	1b
++#else
++
++		/*
++		 * Relocate entries in the GOT table.  We only relocate
++		 * the entries that are outside the (relocated) BSS region.
++		 */
++1:		ldr	r1, [r11, #0]		@ relocate entries in the GOT
++		cmp	r1, r2			@ entry < bss_start ||
++		cmphs	r3, r1			@ _end < entry
++		addlo	r1, r1, r0		@ table.  This fixes up the
++		str	r1, [r11], #4		@ C references.
++		cmp	r11, ip
++		blo	1b
++#endif
++
++not_relocated:	mov	r0, #0
++1:		str	r0, [r2], #4		@ clear bss
++		str	r0, [r2], #4
++		str	r0, [r2], #4
++		str	r0, [r2], #4
++		cmp	r2, r3
++		blo	1b
++
++		/*
++		 * The C runtime environment should now be setup
++		 * sufficiently.  Turn the cache on, set up some
++		 * pointers, and start decompressing.
++		 */
++		bl	cache_on
++
++		mov	r1, sp			@ malloc space above stack
++		add	r2, sp, #0x10000	@ 64k max
++
++/*
++ * Check to see if we will overwrite ourselves.
++ *   r4 = final kernel address
++ *   r5 = start of this image
++ *   r6 = size of decompressed image
++ *   r2 = end of malloc space (and therefore this image)
++ * We basically want:
++ *   r4 >= r2 -> OK
++ *   r4 + image length <= r5 -> OK
++ */
++		cmp	r4, r2
++		bhs	wont_overwrite
++		add	r0, r4, r6
++		cmp	r0, r5
++		bls	wont_overwrite
++
++		mov	r5, r2			@ decompress after malloc space
++		mov	r0, r5
++		mov	r3, r7
++		bl	decompress_kernel
++
++		add	r0, r0, #127 + 128	@ alignment + stack
++		bic	r0, r0, #127		@ align the kernel length
++/*
++ * r0     = decompressed kernel length
++ * r1-r3  = unused
++ * r4     = kernel execution address
++ * r5     = decompressed kernel start
++ * r7     = architecture ID
++ * r8     = atags pointer
++ * r9-r12,r14 = corrupted
++ */
++		add	r1, r5, r0		@ end of decompressed kernel
++		adr	r2, reloc_start
++		ldr	r3, LC1
++		add	r3, r2, r3
++1:		ldmia	r2!, {r9 - r12, r14}	@ copy relocation code
++		stmia	r1!, {r9 - r12, r14}
++		ldmia	r2!, {r9 - r12, r14}
++		stmia	r1!, {r9 - r12, r14}
++		cmp	r2, r3
++		blo	1b
++		mov	sp, r1
++		add	sp, sp, #128		@ relocate the stack
++
++		bl	cache_clean_flush
++ ARM(		add	pc, r5, r0		) @ call relocation code
++ THUMB(		add	r12, r5, r0		)
++ THUMB(		mov	pc, r12			) @ call relocation code
++
++/*
++ * We're not in danger of overwriting ourselves.  Do this the simple way.
++ *
++ * r4     = kernel execution address
++ * r7     = architecture ID
++ */
++wont_overwrite:	mov	r0, r4
++		mov	r3, r7
++		bl	decompress_kernel
++		b	call_kernel
++
++		.align	2
++		.type	LC0, #object
++LC0:		.word	LC0			@ r1
++		.word	__bss_start		@ r2
++		.word	_end			@ r3
++		.word	zreladdr		@ r4
++		.word	_start			@ r5
++		.word	_image_size		@ r6
++		.word	_got_start		@ r11
++		.word	_got_end		@ ip
++		.word	user_stack+4096		@ sp
++LC1:		.word	reloc_end - reloc_start
++		.size	LC0, . - LC0
++
++#ifdef CONFIG_ARCH_RPC
++		.globl	params
++params:		ldr	r0, =params_phys
++		mov	pc, lr
++		.ltorg
++		.align
++#endif
++
++/*
++ * Turn on the cache.  We need to setup some page tables so that we
++ * can have both the I and D caches on.
++ *
++ * We place the page tables 16k down from the kernel execution address,
++ * and we hope that nothing else is using it.  If we're using it, we
++ * will go pop!
++ *
++ * On entry,
++ *  r4 = kernel execution address
++ *  r7 = architecture number
++ *  r8 = atags pointer
++ *  r9 = run-time address of "start"  (???)
++ * On exit,
++ *  r1, r2, r3, r9, r10, r12 corrupted
++ * This routine must preserve:
++ *  r4, r5, r6, r7, r8
++ */
++		.align	5
++cache_on:	mov	r3, #8			@ cache_on function
++		b	call_cache_fn
++
++/*
++ * Initialize the highest priority protection region, PR7
++ * to cover all 32bit address and cacheable and bufferable.
++ */
++__armv4_mpu_cache_on:
++		mov	r0, #0x3f		@ 4G, the whole
++		mcr	p15, 0, r0, c6, c7, 0	@ PR7 Area Setting
++		mcr 	p15, 0, r0, c6, c7, 1
++
++		mov	r0, #0x80		@ PR7
++		mcr	p15, 0, r0, c2, c0, 0	@ D-cache on
++		mcr	p15, 0, r0, c2, c0, 1	@ I-cache on
++		mcr	p15, 0, r0, c3, c0, 0	@ write-buffer on
++
++		mov	r0, #0xc000
++		mcr	p15, 0, r0, c5, c0, 1	@ I-access permission
++		mcr	p15, 0, r0, c5, c0, 0	@ D-access permission
++
++		mov	r0, #0
++		mcr	p15, 0, r0, c7, c10, 4	@ drain write buffer
++		mcr	p15, 0, r0, c7, c5, 0	@ flush(inval) I-Cache
++		mcr	p15, 0, r0, c7, c6, 0	@ flush(inval) D-Cache
++		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
++						@ ...I .... ..D. WC.M
++		orr	r0, r0, #0x002d		@ .... .... ..1. 11.1
++		orr	r0, r0, #0x1000		@ ...1 .... .... ....
++
++		mcr	p15, 0, r0, c1, c0, 0	@ write control reg
++
++		mov	r0, #0
++		mcr	p15, 0, r0, c7, c5, 0	@ flush(inval) I-Cache
++		mcr	p15, 0, r0, c7, c6, 0	@ flush(inval) D-Cache
++		mov	pc, lr
++
++__armv3_mpu_cache_on:
++		mov	r0, #0x3f		@ 4G, the whole
++		mcr	p15, 0, r0, c6, c7, 0	@ PR7 Area Setting
++
++		mov	r0, #0x80		@ PR7
++		mcr	p15, 0, r0, c2, c0, 0	@ cache on
++		mcr	p15, 0, r0, c3, c0, 0	@ write-buffer on
++
++		mov	r0, #0xc000
++		mcr	p15, 0, r0, c5, c0, 0	@ access permission
++
++		mov	r0, #0
++		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3
++		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
++						@ .... .... .... WC.M
++		orr	r0, r0, #0x000d		@ .... .... .... 11.1
++		mov	r0, #0
++		mcr	p15, 0, r0, c1, c0, 0	@ write control reg
++
++		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3
++		mov	pc, lr
++
++__setup_mmu:	sub	r3, r4, #16384		@ Page directory size
++		bic	r3, r3, #0xff		@ Align the pointer
++		bic	r3, r3, #0x3f00
++/*
++ * Initialise the page tables, turning on the cacheable and bufferable
++ * bits for the RAM area only.
++ */
++		mov	r0, r3
++		mov	r9, r0, lsr #18
++		mov	r9, r9, lsl #18		@ start of RAM
++		add	r10, r9, #0x10000000	@ a reasonable RAM size
++		mov	r1, #0x12
++		orr	r1, r1, #3 << 10
++		add	r2, r3, #16384
++1:		cmp	r1, r9			@ if virt > start of RAM
++		orrhs	r1, r1, #0x0c		@ set cacheable, bufferable
++		cmp	r1, r10			@ if virt > end of RAM
++		bichs	r1, r1, #0x0c		@ clear cacheable, bufferable
++		str	r1, [r0], #4		@ 1:1 mapping
++		add	r1, r1, #1048576
++		teq	r0, r2
++		bne	1b
++/*
++ * If ever we are running from Flash, then we surely want the cache
++ * to be enabled also for our execution instance...  We map 2MB of it
++ * so there is no map overlap problem for up to 1 MB compressed kernel.
++ * If the execution is in RAM then we would only be duplicating the above.
++ */
++		mov	r1, #0x1e
++		orr	r1, r1, #3 << 10
++		mov	r2, pc, lsr #20
++		orr	r1, r1, r2, lsl #20
++		add	r0, r3, r2, lsl #2
++		str	r1, [r0], #4
++		add	r1, r1, #1048576
++		str	r1, [r0]
++		mov	pc, lr
++ENDPROC(__setup_mmu)
++
++__armv4_mmu_cache_on:
++		mov	r12, lr
++#ifdef CONFIG_MMU
++		bl	__setup_mmu
++		mov	r0, #0
++		mcr	p15, 0, r0, c7, c10, 4	@ drain write buffer
++		mcr	p15, 0, r0, c8, c7, 0	@ flush I,D TLBs
++		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
++		orr	r0, r0, #0x5000		@ I-cache enable, RR cache replacement
++		orr	r0, r0, #0x0030
++#ifdef CONFIG_CPU_ENDIAN_BE8
++		orr	r0, r0, #1 << 25	@ big-endian page tables
++#endif
++		bl	__common_mmu_cache_on
++		mov	r0, #0
++		mcr	p15, 0, r0, c8, c7, 0	@ flush I,D TLBs
++#endif
++		mov	pc, r12
++
++__armv7_mmu_cache_on:
++		mov	r12, lr
++#ifdef CONFIG_MMU
++		mrc	p15, 0, r11, c0, c1, 4	@ read ID_MMFR0
++		tst	r11, #0xf		@ VMSA
++		blne	__setup_mmu
++		mov	r0, #0
++		mcr	p15, 0, r0, c7, c10, 4	@ drain write buffer
++		tst	r11, #0xf		@ VMSA
++		mcrne	p15, 0, r0, c8, c7, 0	@ flush I,D TLBs
++#endif
++		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
++		orr	r0, r0, #0x5000		@ I-cache enable, RR cache replacement
++		orr	r0, r0, #0x003c		@ write buffer
++#ifdef CONFIG_MMU
++#ifdef CONFIG_CPU_ENDIAN_BE8
++		orr	r0, r0, #1 << 25	@ big-endian page tables
++#endif
++		orrne	r0, r0, #1		@ MMU enabled
++		movne	r1, #-1
++		mcrne	p15, 0, r3, c2, c0, 0	@ load page table pointer
++		mcrne	p15, 0, r1, c3, c0, 0	@ load domain access control
++#endif
++		mcr	p15, 0, r0, c1, c0, 0	@ load control register
++		mrc	p15, 0, r0, c1, c0, 0	@ and read it back
++		mov	r0, #0
++		mcr	p15, 0, r0, c7, c5, 4	@ ISB
++		mov	pc, r12
++
++__fa526_cache_on:
++		mov	r12, lr
++		bl	__setup_mmu
++		mov	r0, #0
++		mcr	p15, 0, r0, c7, c7, 0	@ Invalidate whole cache
++		mcr	p15, 0, r0, c7, c10, 4	@ drain write buffer
++		mcr	p15, 0, r0, c8, c7, 0	@ flush UTLB
++		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
++		orr	r0, r0, #0x1000		@ I-cache enable
++		bl	__common_mmu_cache_on
++		mov	r0, #0
++		mcr	p15, 0, r0, c8, c7, 0	@ flush UTLB
++		mov	pc, r12
++
++__arm6_mmu_cache_on:
++		mov	r12, lr
++		bl	__setup_mmu
++		mov	r0, #0
++		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3
++		mcr	p15, 0, r0, c5, c0, 0	@ invalidate whole TLB v3
++		mov	r0, #0x30
++		bl	__common_mmu_cache_on
++		mov	r0, #0
++		mcr	p15, 0, r0, c5, c0, 0	@ invalidate whole TLB v3
++		mov	pc, r12
++
++__common_mmu_cache_on:
++#ifndef CONFIG_THUMB2_KERNEL
++#ifndef DEBUG
++		orr	r0, r0, #0x000d		@ Write buffer, mmu
++#endif
++		mov	r1, #-1
++		mcr	p15, 0, r3, c2, c0, 0	@ load page table pointer
++		mcr	p15, 0, r1, c3, c0, 0	@ load domain access control
++		b	1f
++		.align	5			@ cache line aligned
++1:		mcr	p15, 0, r0, c1, c0, 0	@ load control register
++		mrc	p15, 0, r0, c1, c0, 0	@ and read it back to
++		sub	pc, lr, r0, lsr #32	@ properly flush pipeline
++#endif
++
++/*
++ * All code following this line is relocatable.  It is relocated by
++ * the above code to the end of the decompressed kernel image and
++ * executed there.  During this time, we have no stacks.
++ *
++ * r0     = decompressed kernel length
++ * r1-r3  = unused
++ * r4     = kernel execution address
++ * r5     = decompressed kernel start
++ * r7     = architecture ID
++ * r8     = atags pointer
++ * r9-r12,r14 = corrupted
++ */
++		.align	5
++reloc_start:	add	r9, r5, r0
++		sub	r9, r9, #128		@ do not copy the stack
++		debug_reloc_start
++		mov	r1, r4
++1:
++		.rept	4
++		ldmia	r5!, {r0, r2, r3, r10 - r12, r14}	@ relocate kernel
++		stmia	r1!, {r0, r2, r3, r10 - r12, r14}
++		.endr
++
++		cmp	r5, r9
++		blo	1b
++		mov	sp, r1
++		add	sp, sp, #128		@ relocate the stack
++		debug_reloc_end
++
++call_kernel:	bl	cache_clean_flush
++		bl	cache_off
++		mov	r0, #0			@ must be zero
++		mov	r1, r7			@ restore architecture number
++		mov	r2, r8			@ restore atags pointer
++		mov	pc, r4			@ call kernel
++
++/*
++ * Here follow the relocatable cache support functions for the
++ * various processors.  This is a generic hook for locating an
++ * entry and jumping to an instruction at the specified offset
++ * from the start of the block.  Please note this is all position
++ * independent code.
++ *
++ *  r1  = corrupted
++ *  r2  = corrupted
++ *  r3  = block offset
++ *  r9  = corrupted
++ *  r12 = corrupted
++ */
++
++call_cache_fn:	adr	r12, proc_types
++#ifdef CONFIG_CPU_CP15
++		mrc	p15, 0, r9, c0, c0	@ get processor ID
++#else
++		ldr	r9, =CONFIG_PROCESSOR_ID
++#endif
++1:		ldr	r1, [r12, #0]		@ get value
++		ldr	r2, [r12, #4]		@ get mask
++		eor	r1, r1, r9		@ (real ^ match)
++		tst	r1, r2			@       & mask
++ ARM(		addeq	pc, r12, r3		) @ call cache function
++ THUMB(		addeq	r12, r3			)
++ THUMB(		moveq	pc, r12			) @ call cache function
++		add	r12, r12, #4*5
++		b	1b
++
++/*
++ * Table for cache operations.  This is basically:
++ *   - CPU ID match
++ *   - CPU ID mask
++ *   - 'cache on' method instruction
++ *   - 'cache off' method instruction
++ *   - 'cache flush' method instruction
++ *
++ * We match an entry using: ((real_id ^ match) & mask) == 0
++ *
++ * Writethrough caches generally only need 'on' and 'off'
++ * methods.  Writeback caches _must_ have the flush method
++ * defined.
++ */
++		.align	2
++		.type	proc_types,#object
++proc_types:
++		.word	0x41560600		@ ARM6/610
++		.word	0xffffffe0
++		W(b)	__arm6_mmu_cache_off	@ works, but slow
++		W(b)	__arm6_mmu_cache_off
++		mov	pc, lr
++ THUMB(		nop				)
++@		b	__arm6_mmu_cache_on		@ untested
++@		b	__arm6_mmu_cache_off
++@		b	__armv3_mmu_cache_flush
++
++		.word	0x00000000		@ old ARM ID
++		.word	0x0000f000
++		mov	pc, lr
++ THUMB(		nop				)
++		mov	pc, lr
++ THUMB(		nop				)
++		mov	pc, lr
++ THUMB(		nop				)
++
++		.word	0x41007000		@ ARM7/710
++		.word	0xfff8fe00
++		W(b)	__arm7_mmu_cache_off
++		W(b)	__arm7_mmu_cache_off
++		mov	pc, lr
++ THUMB(		nop				)
++
++		.word	0x41807200		@ ARM720T (writethrough)
++		.word	0xffffff00
++		W(b)	__armv4_mmu_cache_on
++		W(b)	__armv4_mmu_cache_off
++		mov	pc, lr
++ THUMB(		nop				)
++
++		.word	0x41007400		@ ARM74x
++		.word	0xff00ff00
++		W(b)	__armv3_mpu_cache_on
++		W(b)	__armv3_mpu_cache_off
++		W(b)	__armv3_mpu_cache_flush
++		
++		.word	0x41009400		@ ARM94x
++		.word	0xff00ff00
++		W(b)	__armv4_mpu_cache_on
++		W(b)	__armv4_mpu_cache_off
++		W(b)	__armv4_mpu_cache_flush
++
++		.word	0x00007000		@ ARM7 IDs
++		.word	0x0000f000
++		mov	pc, lr
++ THUMB(		nop				)
++		mov	pc, lr
++ THUMB(		nop				)
++		mov	pc, lr
++ THUMB(		nop				)
++
++		@ Everything from here on will be the new ID system.
++
++		.word	0x4401a100		@ sa110 / sa1100
++		.word	0xffffffe0
++		W(b)	__armv4_mmu_cache_on
++		W(b)	__armv4_mmu_cache_off
++		W(b)	__armv4_mmu_cache_flush
++
++		.word	0x6901b110		@ sa1110
++		.word	0xfffffff0
++		W(b)	__armv4_mmu_cache_on
++		W(b)	__armv4_mmu_cache_off
++		W(b)	__armv4_mmu_cache_flush
++
++		.word	0x56056900
++		.word	0xffffff00		@ PXA9xx
++		W(b)	__armv4_mmu_cache_on
++		W(b)	__armv4_mmu_cache_off
++		W(b)	__armv4_mmu_cache_flush
++
++		.word	0x56158000		@ PXA168
++		.word	0xfffff000
++		W(b)	__armv4_mmu_cache_on
++		W(b)	__armv4_mmu_cache_off
++		W(b)	__armv5tej_mmu_cache_flush
++
++		.word	0x56050000		@ Feroceon
++		.word	0xff0f0000
++		W(b)	__armv4_mmu_cache_on
++		W(b)	__armv4_mmu_cache_off
++		W(b)	__armv5tej_mmu_cache_flush
++
++#ifdef CONFIG_CPU_FEROCEON_OLD_ID
++		/* this conflicts with the standard ARMv5TE entry */
++		.long	0x41009260		@ Old Feroceon
++		.long	0xff00fff0
++		b	__armv4_mmu_cache_on
++		b	__armv4_mmu_cache_off
++		b	__armv5tej_mmu_cache_flush
++#endif
++
++		.word	0x66015261		@ FA526
++		.word	0xff01fff1
++		W(b)	__fa526_cache_on
++		W(b)	__armv4_mmu_cache_off
++		W(b)	__fa526_cache_flush
++
++		@ These match on the architecture ID
++
++		.word	0x00020000		@ ARMv4T
++		.word	0x000f0000
++		W(b)	__armv4_mmu_cache_on
++		W(b)	__armv4_mmu_cache_off
++		W(b)	__armv4_mmu_cache_flush
++
++		.word	0x00050000		@ ARMv5TE
++		.word	0x000f0000
++		W(b)	__armv4_mmu_cache_on
++		W(b)	__armv4_mmu_cache_off
++		W(b)	__armv4_mmu_cache_flush
++
++		.word	0x00060000		@ ARMv5TEJ
++		.word	0x000f0000
++		W(b)	__armv4_mmu_cache_on
++		W(b)	__armv4_mmu_cache_off
++		W(b)	__armv5tej_mmu_cache_flush
++
++		.word	0x0007b000		@ ARMv6
++		.word	0x000ff000
++		W(b)	__armv4_mmu_cache_on
++		W(b)	__armv4_mmu_cache_off
++		W(b)	__armv6_mmu_cache_flush
++
++		.word	0x560f5810		@ Marvell PJ4 ARMv6
++		.word	0xff0ffff0
++		W(b)	__armv4_mmu_cache_on
++		W(b)	__armv4_mmu_cache_off
++		W(b)	__armv6_mmu_cache_flush
++
++		.word	0x000f0000		@ new CPU Id
++		.word	0x000f0000
++		W(b)	__armv7_mmu_cache_on
++		W(b)	__armv7_mmu_cache_off
++		W(b)	__armv7_mmu_cache_flush
++
++		.word	0			@ unrecognised type
++		.word	0
++		mov	pc, lr
++ THUMB(		nop				)
++		mov	pc, lr
++ THUMB(		nop				)
++		mov	pc, lr
++ THUMB(		nop				)
++
++		.size	proc_types, . - proc_types
++
++/*
++ * Turn off the Cache and MMU.  ARMv3 does not support
++ * reading the control register, but ARMv4 does.
++ *
++ * On exit, r0, r1, r2, r3, r9, r12 corrupted
++ * This routine must preserve: r4, r6, r7
++ */
++		.align	5
++cache_off:	mov	r3, #12			@ cache_off function
++		b	call_cache_fn
++
++__armv4_mpu_cache_off:
++		mrc	p15, 0, r0, c1, c0
++		bic	r0, r0, #0x000d
++		mcr	p15, 0, r0, c1, c0	@ turn MPU and cache off
++		mov	r0, #0
++		mcr	p15, 0, r0, c7, c10, 4	@ drain write buffer
++		mcr	p15, 0, r0, c7, c6, 0	@ flush D-Cache
++		mcr	p15, 0, r0, c7, c5, 0	@ flush I-Cache
++		mov	pc, lr
++
++__armv3_mpu_cache_off:
++		mrc	p15, 0, r0, c1, c0
++		bic	r0, r0, #0x000d
++		mcr	p15, 0, r0, c1, c0, 0	@ turn MPU and cache off
++		mov	r0, #0
++		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3
++		mov	pc, lr
++
++__armv4_mmu_cache_off:
++#ifdef CONFIG_MMU
++		mrc	p15, 0, r0, c1, c0
++		bic	r0, r0, #0x000d
++		mcr	p15, 0, r0, c1, c0	@ turn MMU and cache off
++		mov	r0, #0
++		mcr	p15, 0, r0, c7, c7	@ invalidate whole cache v4
++		mcr	p15, 0, r0, c8, c7	@ invalidate whole TLB v4
++#endif
++		mov	pc, lr
++
++__armv7_mmu_cache_off:
++		mrc	p15, 0, r0, c1, c0
++#ifdef CONFIG_MMU
++		bic	r0, r0, #0x000d
++#else
++		bic	r0, r0, #0x000c
++#endif
++		mcr	p15, 0, r0, c1, c0	@ turn MMU and cache off
++		mov	r12, lr
++		bl	__armv7_mmu_cache_flush
++		mov	r0, #0
++#ifdef CONFIG_MMU
++		mcr	p15, 0, r0, c8, c7, 0	@ invalidate whole TLB
++#endif
++		mcr	p15, 0, r0, c7, c5, 6	@ invalidate BTC
++		mcr	p15, 0, r0, c7, c10, 4	@ DSB
++		mcr	p15, 0, r0, c7, c5, 4	@ ISB
++		mov	pc, r12
++
++__arm6_mmu_cache_off:
++		mov	r0, #0x00000030		@ ARM6 control reg.
++		b	__armv3_mmu_cache_off
++
++__arm7_mmu_cache_off:
++		mov	r0, #0x00000070		@ ARM7 control reg.
++		b	__armv3_mmu_cache_off
++
++__armv3_mmu_cache_off:
++		mcr	p15, 0, r0, c1, c0, 0	@ turn MMU and cache off
++		mov	r0, #0
++		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3
++		mcr	p15, 0, r0, c5, c0, 0	@ invalidate whole TLB v3
++		mov	pc, lr
++
++/*
++ * Clean and flush the cache to maintain consistency.
++ *
++ * On exit,
++ *  r1, r2, r3, r9, r11, r12 corrupted
++ * This routine must preserve:
++ *  r0, r4, r5, r6, r7
++ */
++		.align	5
++cache_clean_flush:
++		mov	r3, #16
++		b	call_cache_fn
++
++__armv4_mpu_cache_flush:
++		mov	r2, #1
++		mov	r3, #0
++		mcr	p15, 0, ip, c7, c6, 0	@ invalidate D cache
++		mov	r1, #7 << 5		@ 8 segments
++1:		orr	r3, r1, #63 << 26	@ 64 entries
++2:		mcr	p15, 0, r3, c7, c14, 2	@ clean & invalidate D index
++		subs	r3, r3, #1 << 26
++		bcs	2b			@ entries 63 to 0
++		subs 	r1, r1, #1 << 5
++		bcs	1b			@ segments 7 to 0
++
++		teq	r2, #0
++		mcrne	p15, 0, ip, c7, c5, 0	@ invalidate I cache
++		mcr	p15, 0, ip, c7, c10, 4	@ drain WB
++		mov	pc, lr
++		
++__fa526_cache_flush:
++		mov	r1, #0
++		mcr	p15, 0, r1, c7, c14, 0	@ clean and invalidate D cache
++		mcr	p15, 0, r1, c7, c5, 0	@ flush I cache
++		mcr	p15, 0, r1, c7, c10, 4	@ drain WB
++		mov	pc, lr
++
++__armv6_mmu_cache_flush:
++		mov	r1, #0
++		mcr	p15, 0, r1, c7, c14, 0	@ clean+invalidate D
++		mcr	p15, 0, r1, c7, c5, 0	@ invalidate I+BTB
++		mcr	p15, 0, r1, c7, c15, 0	@ clean+invalidate unified
++		mcr	p15, 0, r1, c7, c10, 4	@ drain WB
++		mov	pc, lr
++
++__armv7_mmu_cache_flush:
++		mrc	p15, 0, r10, c0, c1, 5	@ read ID_MMFR1
++		tst	r10, #0xf << 16		@ hierarchical cache (ARMv7)
++		mov	r10, #0
++		beq	hierarchical
++		mcr	p15, 0, r10, c7, c14, 0	@ clean+invalidate D
++		b	iflush
++hierarchical:
++		mcr	p15, 0, r10, c7, c10, 5	@ DMB
++		stmfd	sp!, {r0-r7, r9-r11}
++		mrc	p15, 1, r0, c0, c0, 1	@ read clidr
++		ands	r3, r0, #0x7000000	@ extract loc from clidr
++		mov	r3, r3, lsr #23		@ left align loc bit field
++		beq	finished		@ if loc is 0, then no need to clean
++		mov	r10, #0			@ start clean at cache level 0
++loop1:
++		add	r2, r10, r10, lsr #1	@ work out 3x current cache level
++		mov	r1, r0, lsr r2		@ extract cache type bits from clidr
++		and	r1, r1, #7		@ mask of the bits for current cache only
++		cmp	r1, #2			@ see what cache we have at this level
++		blt	skip			@ skip if no cache, or just i-cache
++		mcr	p15, 2, r10, c0, c0, 0	@ select current cache level in cssr
++		mcr	p15, 0, r10, c7, c5, 4	@ isb to sych the new cssr&csidr
++		mrc	p15, 1, r1, c0, c0, 0	@ read the new csidr
++		and	r2, r1, #7		@ extract the length of the cache lines
++		add	r2, r2, #4		@ add 4 (line length offset)
++		ldr	r4, =0x3ff
++		ands	r4, r4, r1, lsr #3	@ find maximum number on the way size
++		clz	r5, r4			@ find bit position of way size increment
++		ldr	r7, =0x7fff
++		ands	r7, r7, r1, lsr #13	@ extract max number of the index size
++loop2:
++		mov	r9, r4			@ create working copy of max way size
++loop3:
++ ARM(		orr	r11, r10, r9, lsl r5	) @ factor way and cache number into r11
++ ARM(		orr	r11, r11, r7, lsl r2	) @ factor index number into r11
++ THUMB(		lsl	r6, r9, r5		)
++ THUMB(		orr	r11, r10, r6		) @ factor way and cache number into r11
++ THUMB(		lsl	r6, r7, r2		)
++ THUMB(		orr	r11, r11, r6		) @ factor index number into r11
++		mcr	p15, 0, r11, c7, c14, 2	@ clean & invalidate by set/way
++		subs	r9, r9, #1		@ decrement the way
++		bge	loop3
++		subs	r7, r7, #1		@ decrement the index
++		bge	loop2
++skip:
++		add	r10, r10, #2		@ increment cache number
++		cmp	r3, r10
++		bgt	loop1
++finished:
++		ldmfd	sp!, {r0-r7, r9-r11}
++		mov	r10, #0			@ swith back to cache level 0
++		mcr	p15, 2, r10, c0, c0, 0	@ select current cache level in cssr
++iflush:
++		mcr	p15, 0, r10, c7, c10, 4	@ DSB
++		mcr	p15, 0, r10, c7, c5, 0	@ invalidate I+BTB
++		mcr	p15, 0, r10, c7, c10, 4	@ DSB
++		mcr	p15, 0, r10, c7, c5, 4	@ ISB
++		mov	pc, lr
++
++__armv5tej_mmu_cache_flush:
++1:		mrc	p15, 0, r15, c7, c14, 3	@ test,clean,invalidate D cache
++		bne	1b
++		mcr	p15, 0, r0, c7, c5, 0	@ flush I cache
++		mcr	p15, 0, r0, c7, c10, 4	@ drain WB
++		mov	pc, lr
++
++__armv4_mmu_cache_flush:
++		mov	r2, #64*1024		@ default: 32K dcache size (*2)
++		mov	r11, #32		@ default: 32 byte line size
++		mrc	p15, 0, r3, c0, c0, 1	@ read cache type
++		teq	r3, r9			@ cache ID register present?
++		beq	no_cache_id
++		mov	r1, r3, lsr #18
++		and	r1, r1, #7
++		mov	r2, #1024
++		mov	r2, r2, lsl r1		@ base dcache size *2
++		tst	r3, #1 << 14		@ test M bit
++		addne	r2, r2, r2, lsr #1	@ +1/2 size if M == 1
++		mov	r3, r3, lsr #12
++		and	r3, r3, #3
++		mov	r11, #8
++		mov	r11, r11, lsl r3	@ cache line size in bytes
++no_cache_id:
++		mov	r1, pc
++		bic	r1, r1, #63		@ align to longest cache line
++		add	r2, r1, r2
++1:
++ ARM(		ldr	r3, [r1], r11		) @ s/w flush D cache
++ THUMB(		ldr     r3, [r1]		) @ s/w flush D cache
++ THUMB(		add     r1, r1, r11		)
++		teq	r1, r2
++		bne	1b
++
++		mcr	p15, 0, r1, c7, c5, 0	@ flush I cache
++		mcr	p15, 0, r1, c7, c6, 0	@ flush D cache
++		mcr	p15, 0, r1, c7, c10, 4	@ drain WB
++		mov	pc, lr
++
++__armv3_mmu_cache_flush:
++__armv3_mpu_cache_flush:
++		mov	r1, #0
++		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3
++		mov	pc, lr
++
++/*
++ * Various debugging routines for printing hex characters and
++ * memory, which again must be relocatable.
++ */
++#ifdef DEBUG
++		.align	2
++		.type	phexbuf,#object
++phexbuf:	.space	12
++		.size	phexbuf, . - phexbuf
++
++phex:		adr	r3, phexbuf
++		mov	r2, #0
++		strb	r2, [r3, r1]
++1:		subs	r1, r1, #1
++		movmi	r0, r3
++		bmi	puts
++		and	r2, r0, #15
++		mov	r0, r0, lsr #4
++		cmp	r2, #10
++		addge	r2, r2, #7
++		add	r2, r2, #'0'
++		strb	r2, [r3, r1]
++		b	1b
++
++puts:		loadsp	r3, r1
++1:		ldrb	r2, [r0], #1
++		teq	r2, #0
++		moveq	pc, lr
++2:		writeb	r2, r3
++		mov	r1, #0x00020000
++3:		subs	r1, r1, #1
++		bne	3b
++		teq	r2, #'\n'
++		moveq	r2, #'\r'
++		beq	2b
++		teq	r0, #0
++		bne	1b
++		mov	pc, lr
++putc:
++		mov	r2, r0
++		mov	r0, #0
++		loadsp	r3, r1
++		b	2b
++
++memdump:	mov	r12, r0
++		mov	r10, lr
++		mov	r11, #0
++2:		mov	r0, r11, lsl #2
++		add	r0, r0, r12
++		mov	r1, #8
++		bl	phex
++		mov	r0, #':'
++		bl	putc
++1:		mov	r0, #' '
++		bl	putc
++		ldr	r0, [r12, r11, lsl #2]
++		mov	r1, #8
++		bl	phex
++		and	r0, r11, #7
++		teq	r0, #3
++		moveq	r0, #' '
++		bleq	putc
++		and	r0, r11, #7
++		add	r11, r11, #1
++		teq	r0, #7
++		bne	1b
++		mov	r0, #'\n'
++		bl	putc
++		cmp	r11, #64
++		blt	2b
++		mov	pc, r10
++#endif
++
++		.ltorg
++reloc_end:
++
++		.align
++		.section ".stack", "w"
++user_stack:	.space	4096
+diff -rupN linux-2.6.35.11/arch/arm/boot/compressed/head-str8100.S linux-2.6.35.11-ts7500/arch/arm/boot/compressed/head-str8100.S
+--- linux-2.6.35.11/arch/arm/boot/compressed/head-str8100.S	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/boot/compressed/head-str8100.S	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,7 @@
++#include <asm/mach-types.h>
++
++		.section	".start", "ax"
++
++__str8100_start:
++		mov	r7, #(MACH_TYPE_STR8100 & 0xFF00)
++		orr	r7, r7, #(MACH_TYPE_STR8100 & 0x00FF)
+diff -rupN linux-2.6.35.11/arch/arm/boot/compressed/head-str9100.S linux-2.6.35.11-ts7500/arch/arm/boot/compressed/head-str9100.S
+--- linux-2.6.35.11/arch/arm/boot/compressed/head-str9100.S	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/boot/compressed/head-str9100.S	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,7 @@
++#include <asm/mach-types.h>
++
++		.section	".start", "ax"
++
++__str9100_start:
++		mov	r7, #(MACH_TYPE_STR9100 & 0xFF00)
++		orr	r7, r7, #(MACH_TYPE_STR9100 & 0x00FF)
+diff -rupN linux-2.6.35.11/arch/arm/boot/compressed/Makefile linux-2.6.35.11-ts7500/arch/arm/boot/compressed/Makefile
+--- linux-2.6.35.11/arch/arm/boot/compressed/Makefile	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/boot/compressed/Makefile	2011-03-14 11:18:24.000000000 -0400
+@@ -48,6 +48,14 @@ else
+ endif
+ endif
+ 
++ifeq ($(CONFIG_ARCH_STR9100),y)
++OBJS		+= head-str9100.o
++endif
++
++ifeq ($(CONFIG_ARCH_STR8100),y)
++OBJS		+= head-str8100.o
++endif
++
+ #
+ # We now have a PIC decompressor implementation.  Decompressors running
+ # from RAM should not define ZTEXTADDR.  Decompressors running directly
+diff -rupN linux-2.6.35.11/arch/arm/boot/compressed/Makefile.orig linux-2.6.35.11-ts7500/arch/arm/boot/compressed/Makefile.orig
+--- linux-2.6.35.11/arch/arm/boot/compressed/Makefile.orig	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/boot/compressed/Makefile.orig	2011-02-06 14:04:07.000000000 -0500
+@@ -0,0 +1,129 @@
++#
++# linux/arch/arm/boot/compressed/Makefile
++#
++# create a compressed vmlinuz image from the original vmlinux
++#
++
++HEAD	= head.o
++OBJS	= misc.o decompress.o
++FONTC	= $(srctree)/drivers/video/console/font_acorn_8x8.c
++
++#
++# Architecture dependencies
++#
++ifeq ($(CONFIG_ARCH_ACORN),y)
++OBJS		+= ll_char_wr.o font.o
++endif
++
++ifeq ($(CONFIG_ARCH_SHARK),y)
++OBJS		+= head-shark.o ofw-shark.o
++endif
++
++ifeq ($(CONFIG_ARCH_L7200),y)
++OBJS		+= head-l7200.o
++endif
++
++ifeq ($(CONFIG_ARCH_P720T),y)
++# Borrow this code from SA1100
++OBJS		+= head-sa1100.o
++endif
++
++ifeq ($(CONFIG_ARCH_SA1100),y)
++OBJS		+= head-sa1100.o
++endif
++
++ifeq ($(CONFIG_CPU_XSCALE),y)
++OBJS		+= head-xscale.o
++endif
++
++ifeq ($(CONFIG_PXA_SHARPSL),y)
++OBJS		+= head-sharpsl.o
++endif
++
++ifeq ($(CONFIG_CPU_ENDIAN_BE32),y)
++ifeq ($(CONFIG_CPU_CP15),y)
++OBJS		+= big-endian.o
++else
++# The endian should be set by h/w design.
++endif
++endif
++
++#
++# We now have a PIC decompressor implementation.  Decompressors running
++# from RAM should not define ZTEXTADDR.  Decompressors running directly
++# from ROM or Flash must define ZTEXTADDR (preferably via the config)
++# FIXME: Previous assignment to ztextaddr-y is lost here. See SHARK
++ifeq ($(CONFIG_ZBOOT_ROM),y)
++ZTEXTADDR	:= $(CONFIG_ZBOOT_ROM_TEXT)
++ZBSSADDR	:= $(CONFIG_ZBOOT_ROM_BSS)
++else
++ZTEXTADDR	:= 0
++ZBSSADDR	:= ALIGN(4)
++endif
++
++SEDFLAGS	= s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/
++
++suffix_$(CONFIG_KERNEL_GZIP) = gzip
++suffix_$(CONFIG_KERNEL_LZO)  = lzo
++suffix_$(CONFIG_KERNEL_LZMA) = lzma
++
++targets       := vmlinux vmlinux.lds \
++		 piggy.$(suffix_y) piggy.$(suffix_y).o \
++		 font.o font.c head.o misc.o $(OBJS)
++
++# Make sure files are removed during clean
++extra-y       += piggy.gzip piggy.lzo piggy.lzma lib1funcs.S
++
++ifeq ($(CONFIG_FUNCTION_TRACER),y)
++ORIG_CFLAGS := $(KBUILD_CFLAGS)
++KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
++endif
++
++EXTRA_CFLAGS  := -fpic -fno-builtin
++EXTRA_AFLAGS  := -Wa,-march=all
++
++# Supply ZRELADDR, INITRD_PHYS and PARAMS_PHYS to the decompressor via
++# linker symbols.  We only define initrd_phys and params_phys if the
++# machine class defined the corresponding makefile variable.
++LDFLAGS_vmlinux := --defsym zreladdr=$(ZRELADDR)
++ifeq ($(CONFIG_CPU_ENDIAN_BE8),y)
++LDFLAGS_vmlinux += --be8
++endif
++ifneq ($(INITRD_PHYS),)
++LDFLAGS_vmlinux += --defsym initrd_phys=$(INITRD_PHYS)
++endif
++ifneq ($(PARAMS_PHYS),)
++LDFLAGS_vmlinux += --defsym params_phys=$(PARAMS_PHYS)
++endif
++# ?
++LDFLAGS_vmlinux += -p
++# Report unresolved symbol references
++LDFLAGS_vmlinux += --no-undefined
++# Delete all temporary local symbols
++LDFLAGS_vmlinux += -X
++# Next argument is a linker script
++LDFLAGS_vmlinux += -T
++
++# For __aeabi_uidivmod
++lib1funcs = $(obj)/lib1funcs.o
++
++$(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S FORCE
++	$(call cmd,shipped)
++
++$(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.$(suffix_y).o \
++	 	$(addprefix $(obj)/, $(OBJS)) $(lib1funcs) FORCE
++	$(call if_changed,ld)
++	@:
++
++$(obj)/piggy.$(suffix_y): $(obj)/../Image FORCE
++	$(call if_changed,$(suffix_y))
++
++$(obj)/piggy.$(suffix_y).o:  $(obj)/piggy.$(suffix_y) FORCE
++
++CFLAGS_font.o := -Dstatic=
++
++$(obj)/font.c: $(FONTC)
++	$(call cmd,shipped)
++
++$(obj)/vmlinux.lds: $(obj)/vmlinux.lds.in arch/arm/boot/Makefile .config
++	@sed "$(SEDFLAGS)" < $< > $@
+diff -rupN linux-2.6.35.11/arch/arm/boot/compressed/misc.c linux-2.6.35.11-ts7500/arch/arm/boot/compressed/misc.c
+--- linux-2.6.35.11/arch/arm/boot/compressed/misc.c	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/boot/compressed/misc.c	2011-03-14 11:18:24.000000000 -0400
+@@ -101,8 +101,11 @@ static void icedcc_putc(int ch)
+ #endif
+ 
+ #define putc(ch)	icedcc_putc(ch)
++#define flush()	do { } while (0)
+ #endif
+ 
++#if defined(CONFIG_ARCH_STR8100) || defined(CONFIG_ARCH_STR9100)
++#else
+ static void putstr(const char *ptr)
+ {
+ 	char c;
+@@ -115,6 +118,7 @@ static void putstr(const char *ptr)
+ 
+ 	flush();
+ }
++#endif
+ 
+ #endif
+ 
+@@ -188,24 +192,38 @@ extern void do_decompress(u8 *input, int
+ 
+ #ifndef STANDALONE_DEBUG
+ 
++
+ unsigned long
+ decompress_kernel(unsigned long output_start, unsigned long free_mem_ptr_p,
+ 		unsigned long free_mem_ptr_end_p,
+ 		int arch_id)
+ {
++  extern void *foobar(int);
+ 	unsigned char *tmp;
+ 
+ 	output_data		= (unsigned char *)output_start;
+ 	free_mem_ptr		= free_mem_ptr_p;
+ 	free_mem_end_ptr	= free_mem_ptr_end_p;
+ 	__machine_arch_type	= arch_id;
+-
++      
++     
++   //putstr("\n\rfree_mem_ptr =        0x"); ser_puts_hex32((unsigned long)free_mem_ptr);
++   //putstr("\n\rfree_mem_end_ptr =    0x"); ser_puts_hex32((unsigned long)free_mem_end_ptr);
++   //putstr("\n\r__machine_arch_type = 0x"); ser_puts_hex32((unsigned long)__machine_arch_type);
++   //putstr("\n\r");
++   
+ 	arch_decomp_setup();
+ 
+ 	tmp = (unsigned char *) (((unsigned long)input_data_end) - 4);
+ 	output_ptr = get_unaligned_le32(tmp);
+ 
+ 	putstr("Uncompressing Linux...");
++   
++   //putstr("\n\rinput_data =        0x"); ser_puts_hex32((unsigned long)input_data);
++   //putstr("\n\rinput_data_end =    0x"); ser_puts_hex32((unsigned long)input_data_end);
++   //putstr("\n\routput_data =       0x"); ser_puts_hex32((unsigned long)output_data);
++   //putstr("\n\r");
++   
+ 	do_decompress(input_data, input_data_end - input_data,
+ 			output_data, error);
+ 	putstr(" done, booting the kernel.\n");
+diff -rupN linux-2.6.35.11/arch/arm/boot/compressed/misc.c.orig linux-2.6.35.11-ts7500/arch/arm/boot/compressed/misc.c.orig
+--- linux-2.6.35.11/arch/arm/boot/compressed/misc.c.orig	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/boot/compressed/misc.c.orig	2011-02-06 14:04:07.000000000 -0500
+@@ -0,0 +1,228 @@
++/*
++ * misc.c
++ * 
++ * This is a collection of several routines from gzip-1.0.3 
++ * adapted for Linux.
++ *
++ * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
++ *
++ * Modified for ARM Linux by Russell King
++ *
++ * Nicolas Pitre <nico@visuaide.com>  1999/04/14 :
++ *  For this code to run directly from Flash, all constant variables must
++ *  be marked with 'const' and all other variables initialized at run-time 
++ *  only.  This way all non constant variables will end up in the bss segment,
++ *  which should point to addresses in RAM and cleared to 0 on start.
++ *  This allows for a much quicker boot time.
++ */
++
++unsigned int __machine_arch_type;
++
++#define _LINUX_STRING_H_
++
++#include <linux/compiler.h>	/* for inline */
++#include <linux/types.h>	/* for size_t */
++#include <linux/stddef.h>	/* for NULL */
++#include <linux/linkage.h>
++#include <asm/string.h>
++
++#include <asm/unaligned.h>
++
++#ifdef STANDALONE_DEBUG
++#define putstr printf
++#else
++
++static void putstr(const char *ptr);
++extern void error(char *x);
++
++#include <mach/uncompress.h>
++
++#ifdef CONFIG_DEBUG_ICEDCC
++
++#ifdef CONFIG_CPU_V6
++
++static void icedcc_putc(int ch)
++{
++	int status, i = 0x4000000;
++
++	do {
++		if (--i < 0)
++			return;
++
++		asm volatile ("mrc p14, 0, %0, c0, c1, 0" : "=r" (status));
++	} while (status & (1 << 29));
++
++	asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch));
++}
++
++#elif defined(CONFIG_CPU_V7)
++
++static void icedcc_putc(int ch)
++{
++	asm(
++	"wait:	mrc	p14, 0, pc, c0, c1, 0			\n\
++		bcs	wait					\n\
++		mcr     p14, 0, %0, c0, c5, 0			"
++	: : "r" (ch));
++}
++
++#elif defined(CONFIG_CPU_XSCALE)
++
++static void icedcc_putc(int ch)
++{
++	int status, i = 0x4000000;
++
++	do {
++		if (--i < 0)
++			return;
++
++		asm volatile ("mrc p14, 0, %0, c14, c0, 0" : "=r" (status));
++	} while (status & (1 << 28));
++
++	asm("mcr p14, 0, %0, c8, c0, 0" : : "r" (ch));
++}
++
++#else
++
++static void icedcc_putc(int ch)
++{
++	int status, i = 0x4000000;
++
++	do {
++		if (--i < 0)
++			return;
++
++		asm volatile ("mrc p14, 0, %0, c0, c0, 0" : "=r" (status));
++	} while (status & 2);
++
++	asm("mcr p14, 0, %0, c1, c0, 0" : : "r" (ch));
++}
++
++#endif
++
++#define putc(ch)	icedcc_putc(ch)
++#endif
++
++static void putstr(const char *ptr)
++{
++	char c;
++
++	while ((c = *ptr++) != '\0') {
++		if (c == '\n')
++			putc('\r');
++		putc(c);
++	}
++
++	flush();
++}
++
++#endif
++
++void *memcpy(void *__dest, __const void *__src, size_t __n)
++{
++	int i = 0;
++	unsigned char *d = (unsigned char *)__dest, *s = (unsigned char *)__src;
++
++	for (i = __n >> 3; i > 0; i--) {
++		*d++ = *s++;
++		*d++ = *s++;
++		*d++ = *s++;
++		*d++ = *s++;
++		*d++ = *s++;
++		*d++ = *s++;
++		*d++ = *s++;
++		*d++ = *s++;
++	}
++
++	if (__n & 1 << 2) {
++		*d++ = *s++;
++		*d++ = *s++;
++		*d++ = *s++;
++		*d++ = *s++;
++	}
++
++	if (__n & 1 << 1) {
++		*d++ = *s++;
++		*d++ = *s++;
++	}
++
++	if (__n & 1)
++		*d++ = *s++;
++
++	return __dest;
++}
++
++/*
++ * gzip delarations
++ */
++extern char input_data[];
++extern char input_data_end[];
++
++unsigned char *output_data;
++unsigned long output_ptr;
++
++unsigned long free_mem_ptr;
++unsigned long free_mem_end_ptr;
++
++#ifndef arch_error
++#define arch_error(x)
++#endif
++
++void error(char *x)
++{
++	arch_error(x);
++
++	putstr("\n\n");
++	putstr(x);
++	putstr("\n\n -- System halted");
++
++	while(1);	/* Halt */
++}
++
++asmlinkage void __div0(void)
++{
++	error("Attempting division by 0!");
++}
++
++extern void do_decompress(u8 *input, int len, u8 *output, void (*error)(char *x));
++
++#ifndef STANDALONE_DEBUG
++
++unsigned long
++decompress_kernel(unsigned long output_start, unsigned long free_mem_ptr_p,
++		unsigned long free_mem_ptr_end_p,
++		int arch_id)
++{
++	unsigned char *tmp;
++
++	output_data		= (unsigned char *)output_start;
++	free_mem_ptr		= free_mem_ptr_p;
++	free_mem_end_ptr	= free_mem_ptr_end_p;
++	__machine_arch_type	= arch_id;
++
++	arch_decomp_setup();
++
++	tmp = (unsigned char *) (((unsigned long)input_data_end) - 4);
++	output_ptr = get_unaligned_le32(tmp);
++
++	putstr("Uncompressing Linux...");
++	do_decompress(input_data, input_data_end - input_data,
++			output_data, error);
++	putstr(" done, booting the kernel.\n");
++	return output_ptr;
++}
++#else
++
++char output_buffer[1500*1024];
++
++int main()
++{
++	output_data = output_buffer;
++
++	putstr("Uncompressing Linux...");
++	decompress(input_data, input_data_end - input_data,
++			NULL, NULL, output_data, NULL, error);
++	putstr("done.\n");
++	return 0;
++}
++#endif
+diff -rupN linux-2.6.35.11/arch/arm/boot/Makefile linux-2.6.35.11-ts7500/arch/arm/boot/Makefile
+--- linux-2.6.35.11/arch/arm/boot/Makefile	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/boot/Makefile	2011-03-14 11:18:24.000000000 -0400
+@@ -24,8 +24,10 @@ endif
+ ZRELADDR    := $(zreladdr-y)
+ PARAMS_PHYS := $(params_phys-y)
+ INITRD_PHYS := $(initrd_phys-y)
++# scott.kernel
++KERNEL_PHYS := $(kernel_phys-y)
+ 
+-export ZRELADDR INITRD_PHYS PARAMS_PHYS
++export ZRELADDR INITRD_PHYS KERNEL_PHYS PARAMS_PHYS
+ 
+ targets := Image zImage xipImage bootpImage uImage
+ 
+diff -rupN linux-2.6.35.11/arch/arm/configs/ts7500_defconfig linux-2.6.35.11-ts7500/arch/arm/configs/ts7500_defconfig
+--- linux-2.6.35.11/arch/arm/configs/ts7500_defconfig	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/configs/ts7500_defconfig	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,1423 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.36
++# Wed Nov 10 09:28:19 2010
++#
++CONFIG_ARM=y
++CONFIG_SYS_SUPPORTS_APM_EMULATION=y
++# CONFIG_ARCH_USES_GETTIMEOFFSET is not set
++CONFIG_HAVE_PROC_CPU=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_HAVE_LATENCYTOP_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_NEED_DMA_MAP_STATE=y
++CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
++CONFIG_VECTORS_BASE=0xffff0000
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++CONFIG_CONSTRUCTORS=y
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_LOCK_KERNEL=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_CROSS_COMPILE=""
++CONFIG_LOCALVERSION=""
++CONFIG_LOCALVERSION_AUTO=y
++CONFIG_HAVE_KERNEL_GZIP=y
++CONFIG_HAVE_KERNEL_LZMA=y
++CONFIG_HAVE_KERNEL_LZO=y
++CONFIG_KERNEL_GZIP=y
++# CONFIG_KERNEL_LZMA is not set
++# CONFIG_KERNEL_LZO is not set
++# CONFIG_SWAP is not set
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_AUDIT is not set
++
++#
++# RCU Subsystem
++#
++CONFIG_TREE_RCU=y
++# CONFIG_TREE_PREEMPT_RCU is not set
++# CONFIG_TINY_RCU is not set
++# CONFIG_RCU_TRACE is not set
++CONFIG_RCU_FANOUT=32
++# CONFIG_RCU_FANOUT_EXACT is not set
++# CONFIG_TREE_RCU_TRACE is not set
++# CONFIG_IKCONFIG is not set
++CONFIG_LOG_BUF_SHIFT=16
++# CONFIG_CGROUPS is not set
++CONFIG_SYSFS_DEPRECATED=y
++CONFIG_SYSFS_DEPRECATED_V2=y
++# CONFIG_RELAY is not set
++# CONFIG_NAMESPACES is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_RD_GZIP=y
++# CONFIG_RD_BZIP2 is not set
++# CONFIG_RD_LZMA is not set
++# CONFIG_RD_LZO is not set
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_ANON_INODES=y
++CONFIG_EMBEDDED=y
++CONFIG_UID16=y
++# CONFIG_SYSCTL_SYSCALL is not set
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_TIMERFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_AIO=y
++CONFIG_HAVE_PERF_EVENTS=y
++CONFIG_PERF_USE_VMALLOC=y
++
++#
++# Kernel Performance Events And Counters
++#
++# CONFIG_PERF_EVENTS is not set
++# CONFIG_PERF_COUNTERS is not set
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_PCI_QUIRKS=y
++CONFIG_COMPAT_BRK=y
++CONFIG_SLAB=y
++# CONFIG_SLUB is not set
++# CONFIG_SLOB is not set
++# CONFIG_PROFILING is not set
++CONFIG_HAVE_OPROFILE=y
++# CONFIG_KPROBES is not set
++CONFIG_HAVE_KPROBES=y
++CONFIG_HAVE_KRETPROBES=y
++CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
++
++#
++# GCOV-based kernel profiling
++#
++CONFIG_HAVE_GENERIC_DMA_COHERENT=y
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++CONFIG_BASE_SMALL=0
++CONFIG_MODULES=y
++# CONFIG_MODULE_FORCE_LOAD is not set
++CONFIG_MODULE_UNLOAD=y
++# CONFIG_MODULE_FORCE_UNLOAD is not set
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++CONFIG_BLOCK=y
++# CONFIG_LBDAF is not set
++# CONFIG_BLK_DEV_BSG is not set
++# CONFIG_BLK_DEV_INTEGRITY is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_DEADLINE=y
++# CONFIG_IOSCHED_CFQ is not set
++CONFIG_DEFAULT_DEADLINE=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="deadline"
++# CONFIG_INLINE_SPIN_TRYLOCK is not set
++# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
++# CONFIG_INLINE_SPIN_LOCK is not set
++# CONFIG_INLINE_SPIN_LOCK_BH is not set
++# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
++# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
++# CONFIG_INLINE_SPIN_UNLOCK is not set
++# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
++# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
++# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
++# CONFIG_INLINE_READ_TRYLOCK is not set
++# CONFIG_INLINE_READ_LOCK is not set
++# CONFIG_INLINE_READ_LOCK_BH is not set
++# CONFIG_INLINE_READ_LOCK_IRQ is not set
++# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
++# CONFIG_INLINE_READ_UNLOCK is not set
++# CONFIG_INLINE_READ_UNLOCK_BH is not set
++# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
++# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
++# CONFIG_INLINE_WRITE_TRYLOCK is not set
++# CONFIG_INLINE_WRITE_LOCK is not set
++# CONFIG_INLINE_WRITE_LOCK_BH is not set
++# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
++# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
++# CONFIG_INLINE_WRITE_UNLOCK is not set
++# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
++# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
++# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
++# CONFIG_MUTEX_SPIN_ON_OWNER is not set
++# CONFIG_FREEZER is not set
++
++#
++# System Type
++#
++CONFIG_MMU=y
++# CONFIG_ARCH_STR9100 is not set
++CONFIG_ARCH_STR8100=y
++# CONFIG_ARCH_AAEC2000 is not set
++# CONFIG_ARCH_INTEGRATOR is not set
++# CONFIG_ARCH_REALVIEW is not set
++# CONFIG_ARCH_VERSATILE is not set
++# CONFIG_ARCH_VEXPRESS is not set
++# CONFIG_ARCH_AT91 is not set
++# CONFIG_ARCH_BCMRING is not set
++# CONFIG_ARCH_CLPS711X is not set
++# CONFIG_ARCH_CNS3XXX is not set
++# CONFIG_ARCH_GEMINI is not set
++# CONFIG_ARCH_EBSA110 is not set
++# CONFIG_ARCH_EP93XX is not set
++# CONFIG_ARCH_FOOTBRIDGE is not set
++# CONFIG_ARCH_MXC is not set
++# CONFIG_ARCH_STMP3XXX is not set
++# CONFIG_ARCH_NETX is not set
++# CONFIG_ARCH_H720X is not set
++# CONFIG_ARCH_IOP13XX is not set
++# CONFIG_ARCH_IOP32X is not set
++# CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IXP23XX is not set
++# CONFIG_ARCH_IXP2000 is not set
++# CONFIG_ARCH_IXP4XX is not set
++# CONFIG_ARCH_DOVE is not set
++# CONFIG_ARCH_KIRKWOOD is not set
++# CONFIG_ARCH_LOKI is not set
++# CONFIG_ARCH_LPC32XX is not set
++# CONFIG_ARCH_MV78XX0 is not set
++# CONFIG_ARCH_ORION5X is not set
++# CONFIG_ARCH_MMP is not set
++# CONFIG_ARCH_KS8695 is not set
++# CONFIG_ARCH_NS9XXX is not set
++# CONFIG_ARCH_W90X900 is not set
++# CONFIG_ARCH_NUC93X is not set
++# CONFIG_ARCH_TEGRA is not set
++# CONFIG_ARCH_PNX4008 is not set
++# CONFIG_ARCH_PXA is not set
++# CONFIG_ARCH_MSM is not set
++# CONFIG_ARCH_SHMOBILE is not set
++# CONFIG_ARCH_RPC is not set
++# CONFIG_ARCH_SA1100 is not set
++# CONFIG_ARCH_S3C2410 is not set
++# CONFIG_ARCH_S3C64XX is not set
++# CONFIG_ARCH_S5P6440 is not set
++# CONFIG_ARCH_S5P6442 is not set
++# CONFIG_ARCH_S5PC100 is not set
++# CONFIG_ARCH_S5PV210 is not set
++# CONFIG_ARCH_S5PV310 is not set
++# CONFIG_ARCH_SHARK is not set
++# CONFIG_ARCH_LH7A40X is not set
++# CONFIG_ARCH_U300 is not set
++# CONFIG_ARCH_U8500 is not set
++# CONFIG_ARCH_NOMADIK is not set
++# CONFIG_ARCH_DAVINCI is not set
++# CONFIG_ARCH_OMAP is not set
++# CONFIG_PLAT_SPEAR is not set
++CONFIG_CONSOLE_BAUD_RATE=115200
++
++#
++# STR8100 Options
++#
++CONFIG_VIC_INTERRUPT=y
++# CONFIG_STR8100_DRAM_16M is not set
++# CONFIG_STR8100_DRAM_32M is not set
++CONFIG_STR8100_DRAM_64M=y
++CONFIG_STR8100_PCI33M=y
++# CONFIG_STR8100_PCI66M is not set
++# CONFIG_STR8100_DMA is not set
++# CONFIG_STR8100_HSDMA is not set
++CONFIG_STR8100_INFO=y
++# CONFIG_STR8100_USBD_REBOOT_INTHANDLER is not set
++# CONFIG_STR8100_I2S is not set
++# CONFIG_STR8100_I2S_DEMO is not set
++# CONFIG_STR8100_I2S_WM8772_DEMO is not set
++# CONFIG_LE88221_CONTROL is not set
++# CONFIG_STR8100_PCM_LEGERITY_2PHONE_DEMO is not set
++# CONFIG_STR8100_RTC is not set
++CONFIG_STR8100_GPIO=y
++CONFIG_STR8100_GPIO_INTERRUPT=y
++# CONFIG_STR8100_GPIO_GENERIC_INTERFACE is not set
++
++#
++# Flash MAP
++#
++# CONFIG_STR8100_FLASH_PART is not set
++
++#
++# Third Party Support
++#
++# CONFIG_STR8100_EWC_SUPPORT is not set
++
++#
++# Processor Type
++#
++CONFIG_CPU_FA526=y
++CONFIG_CPU_32v4=y
++CONFIG_CPU_ABRT_EV4=y
++CONFIG_CPU_PABRT_LEGACY=y
++CONFIG_CPU_CACHE_VIVT=y
++CONFIG_CPU_CACHE_FA=y
++CONFIG_CPU_COPY_FA=y
++CONFIG_CPU_TLB_FA=y
++CONFIG_CPU_CP15=y
++CONFIG_CPU_CP15_MMU=y
++
++#
++# Processor Features
++#
++# CONFIG_CPU_ICACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
++CONFIG_CPU_FA_BTB=y
++# CONFIG_CPU_FA_WB_DISABLE is not set
++# CONFIG_CPU_BPREDICT_DISABLE is not set
++CONFIG_ARM_L1_CACHE_SHIFT=5
++
++#
++# Bus support
++#
++CONFIG_PCI=y
++CONFIG_PCI_SYSCALL=y
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++# CONFIG_PCI_STUB is not set
++# CONFIG_PCI_IOV is not set
++# CONFIG_PCCARD is not set
++
++#
++# Kernel Features
++#
++CONFIG_VMSPLIT_3G=y
++# CONFIG_VMSPLIT_2G is not set
++# CONFIG_VMSPLIT_1G is not set
++CONFIG_PAGE_OFFSET=0xC0000000
++# CONFIG_PREEMPT_NONE is not set
++# CONFIG_PREEMPT_VOLUNTARY is not set
++CONFIG_PREEMPT=y
++CONFIG_HZ=100
++# CONFIG_AEABI is not set
++# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
++# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
++# CONFIG_HIGHMEM is not set
++# CONFIG_SPARSE_IRQ is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++CONFIG_HAVE_MEMBLOCK=y
++CONFIG_PAGEFLAGS_EXTENDED=y
++CONFIG_SPLIT_PTLOCK_CPUS=999999
++# CONFIG_PHYS_ADDR_T_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++# CONFIG_KSM is not set
++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
++CONFIG_FORCE_MAX_ZONEORDER=11
++CONFIG_ALIGNMENT_TRAP=y
++# CONFIG_UACCESS_WITH_MEMCPY is not set
++# CONFIG_CC_STACKPROTECTOR is not set
++# CONFIG_DEPRECATED_PARAM_STRUCT is not set
++
++#
++# Boot options
++#
++CONFIG_ZBOOT_ROM_TEXT=0x0
++CONFIG_ZBOOT_ROM_BSS=0x0
++CONFIG_CMDLINE="root=/dev/ram0 init=/linuxrc lpj=958464 console=null"
++# CONFIG_CMDLINE_FORCE is not set
++# CONFIG_XIP_KERNEL is not set
++# CONFIG_KEXEC is not set
++# CONFIG_AUTO_ZRELADDR is not set
++
++#
++# CPU Power Management
++#
++# CONFIG_CPU_IDLE is not set
++
++#
++# Floating point emulation
++#
++
++#
++# At least one emulation must be selected
++#
++CONFIG_FPE_NWFPE=y
++CONFIG_FPE_NWFPE_XP=y
++# CONFIG_FPE_FASTFPE is not set
++
++#
++# Userspace binary formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
++CONFIG_HAVE_AOUT=y
++# CONFIG_BINFMT_AOUT is not set
++# CONFIG_BINFMT_MISC is not set
++# CONFIG_ARTHUR is not set
++
++#
++# Power management options
++#
++# CONFIG_PM is not set
++CONFIG_ARCH_SUSPEND_POSSIBLE=y
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_UNIX=y
++CONFIG_XFRM=y
++# CONFIG_XFRM_USER is not set
++# CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_XFRM_MIGRATE is not set
++# CONFIG_XFRM_STATISTICS is not set
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++CONFIG_IP_PNP=y
++CONFIG_IP_PNP_DHCP=y
++# CONFIG_IP_PNP_BOOTP is not set
++# CONFIG_IP_PNP_RARP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_IP_MROUTE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++CONFIG_INET_TUNNEL=m
++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
++# CONFIG_INET_XFRM_MODE_TUNNEL is not set
++# CONFIG_INET_XFRM_MODE_BEET is not set
++CONFIG_INET_LRO=y
++CONFIG_INET_DIAG=y
++CONFIG_INET_TCP_DIAG=y
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++CONFIG_IPV6=m
++# CONFIG_IPV6_PRIVACY is not set
++# CONFIG_IPV6_ROUTER_PREF is not set
++# CONFIG_IPV6_OPTIMISTIC_DAD is not set
++# CONFIG_INET6_AH is not set
++# CONFIG_INET6_ESP is not set
++# CONFIG_INET6_IPCOMP is not set
++# CONFIG_IPV6_MIP6 is not set
++# CONFIG_INET6_XFRM_TUNNEL is not set
++# CONFIG_INET6_TUNNEL is not set
++CONFIG_INET6_XFRM_MODE_TRANSPORT=m
++CONFIG_INET6_XFRM_MODE_TUNNEL=m
++CONFIG_INET6_XFRM_MODE_BEET=m
++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
++CONFIG_IPV6_SIT=m
++# CONFIG_IPV6_SIT_6RD is not set
++CONFIG_IPV6_NDISC_NODETYPE=y
++# CONFIG_IPV6_TUNNEL is not set
++# CONFIG_IPV6_MULTIPLE_TABLES is not set
++# CONFIG_IPV6_MROUTE is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_RDS is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_L2TP is not set
++# CONFIG_BRIDGE is not set
++# CONFIG_NET_DSA is not set
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_PHONET is not set
++# CONFIG_IEEE802154 is not set
++# CONFIG_NET_SCHED is not set
++# CONFIG_DCB is not set
++
++#
++# Network testing
++#
++# CONFIG_NET_PKTGEN is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_CAN is not set
++# CONFIG_IRDA is not set
++# CONFIG_BT is not set
++# CONFIG_AF_RXRPC is not set
++CONFIG_WIRELESS=y
++# CONFIG_CFG80211 is not set
++# CONFIG_LIB80211 is not set
++
++#
++# CFG80211 needs to be enabled for MAC80211
++#
++
++#
++# Some wireless drivers require a rate control algorithm
++#
++# CONFIG_WIMAX is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++# CONFIG_CAIF is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++# CONFIG_DEVTMPFS is not set
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++CONFIG_FW_LOADER=m
++CONFIG_FIRMWARE_IN_KERNEL=y
++CONFIG_EXTRA_FIRMWARE=""
++# CONFIG_SYS_HYPERVISOR is not set
++CONFIG_CONNECTOR=m
++# CONFIG_MTD is not set
++# CONFIG_PARPORT is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_CPQ_DA is not set
++# CONFIG_BLK_CPQ_CISS_DA is not set
++# CONFIG_BLK_DEV_DAC960 is not set
++# CONFIG_BLK_DEV_UMEM is not set
++# CONFIG_BLK_DEV_COW_COMMON is not set
++# CONFIG_BLK_DEV_LOOP is not set
++# CONFIG_BLK_DEV_DRBD is not set
++CONFIG_BLK_DEV_NBD=y
++# CONFIG_BLK_DEV_SX8 is not set
++# CONFIG_BLK_DEV_UB is not set
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_COUNT=4
++CONFIG_BLK_DEV_RAM_SIZE=16384
++# CONFIG_BLK_DEV_XIP is not set
++# CONFIG_CDROM_PKTCDVD is not set
++# CONFIG_ATA_OVER_ETH is not set
++# CONFIG_MISC_DEVICES is not set
++CONFIG_HAVE_IDE=y
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++CONFIG_SCSI_MOD=m
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=m
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++# CONFIG_SCSI_PROC_FS is not set
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=m
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++# CONFIG_BLK_DEV_SR is not set
++CONFIG_CHR_DEV_SG=m
++# CONFIG_CHR_DEV_SCH is not set
++# CONFIG_SCSI_MULTI_LUN is not set
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++# CONFIG_SCSI_LOWLEVEL is not set
++# CONFIG_SCSI_DH is not set
++# CONFIG_SCSI_OSD_INITIATOR is not set
++# CONFIG_ATA is not set
++# CONFIG_MD is not set
++# CONFIG_FUSION is not set
++
++#
++# IEEE 1394 (FireWire) support
++#
++
++#
++# You can enable one or both FireWire driver stacks.
++#
++
++#
++# The newer stack is recommended.
++#
++# CONFIG_FIREWIRE is not set
++# CONFIG_IEEE1394 is not set
++# CONFIG_FIREWIRE_NOSY is not set
++# CONFIG_I2O is not set
++CONFIG_NETDEVICES=y
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++# CONFIG_TUN is not set
++# CONFIG_VETH is not set
++# CONFIG_ARCNET is not set
++# CONFIG_PHYLIB is not set
++# CONFIG_NET_ETHERNET is not set
++CONFIG_NETDEV_1000=y
++# CONFIG_FAST_BRIDGE is not set
++# CONFIG_ACENIC is not set
++# CONFIG_DL2K is not set
++# CONFIG_E1000 is not set
++# CONFIG_E1000E is not set
++# CONFIG_IP1000 is not set
++# CONFIG_IGB is not set
++# CONFIG_IGBVF is not set
++# CONFIG_NS83820 is not set
++# CONFIG_HAMACHI is not set
++# CONFIG_YELLOWFIN is not set
++# CONFIG_R8169 is not set
++# CONFIG_SIS190 is not set
++# CONFIG_SKGE is not set
++# CONFIG_SKY2 is not set
++# CONFIG_VIA_VELOCITY is not set
++# CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
++# CONFIG_CNIC is not set
++# CONFIG_QLA3XXX is not set
++# CONFIG_ATL1 is not set
++# CONFIG_ATL1E is not set
++# CONFIG_ATL1C is not set
++# CONFIG_JME is not set
++CONFIG_NETDEV_10000=y
++# CONFIG_CHELSIO_T1 is not set
++CONFIG_CHELSIO_T3_DEPENDS=y
++# CONFIG_CHELSIO_T3 is not set
++CONFIG_CHELSIO_T4_DEPENDS=y
++# CONFIG_CHELSIO_T4 is not set
++CONFIG_CHELSIO_T4VF_DEPENDS=y
++# CONFIG_CHELSIO_T4VF is not set
++# CONFIG_ENIC is not set
++# CONFIG_IXGBE is not set
++# CONFIG_IXGB is not set
++# CONFIG_S2IO is not set
++# CONFIG_VXGE is not set
++# CONFIG_MYRI10GE is not set
++# CONFIG_NETXEN_NIC is not set
++# CONFIG_NIU is not set
++# CONFIG_MLX4_EN is not set
++# CONFIG_MLX4_CORE is not set
++# CONFIG_TEHUTI is not set
++# CONFIG_BNX2X is not set
++# CONFIG_QLCNIC is not set
++# CONFIG_QLGE is not set
++# CONFIG_SFC is not set
++# CONFIG_BE2NET is not set
++
++#
++# CNS2100 NIC support
++#
++CONFIG_STAR_NIC=y
++CONFIG_STAR_NIC_PHY_INTERNAL_PHY=y
++# CONFIG_STAR_NIC_PHY_VSC8601 is not set
++# CONFIG_STAR_NIC_PHY_IP101A is not set
++# CONFIG_STAR_NIC_PHY_IP1001 is not set
++# CONFIG_TR is not set
++CONFIG_WLAN=y
++# CONFIG_ATMEL is not set
++# CONFIG_PRISM54 is not set
++# CONFIG_USB_ZD1201 is not set
++# CONFIG_HOSTAP is not set
++
++#
++# Enable WiMAX (Networking options) to see the WiMAX drivers
++#
++
++#
++# USB Network Adapters
++#
++# CONFIG_USB_CATC is not set
++# CONFIG_USB_KAWETH is not set
++# CONFIG_USB_PEGASUS is not set
++# CONFIG_USB_RTL8150 is not set
++# CONFIG_USB_USBNET is not set
++# CONFIG_USB_IPHETH is not set
++# CONFIG_WAN is not set
++
++#
++# CAIF transport drivers
++#
++# CONFIG_FDDI is not set
++# CONFIG_HIPPI is not set
++# CONFIG_PPP is not set
++# CONFIG_SLIP is not set
++# CONFIG_NET_FC is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_VMXNET3 is not set
++# CONFIG_ISDN is not set
++# CONFIG_PHONE is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=m
++# CONFIG_INPUT_FF_MEMLESS is not set
++# CONFIG_INPUT_POLLDEV is not set
++# CONFIG_INPUT_SPARSEKMAP is not set
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=m
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++CONFIG_KEYBOARD_ATKBD=m
++# CONFIG_KEYBOARD_LKKBD is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_OPENCORES is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++CONFIG_INPUT_MOUSE=y
++CONFIG_MOUSE_PS2=m
++CONFIG_MOUSE_PS2_ALPS=y
++CONFIG_MOUSE_PS2_LOGIPS2PP=y
++CONFIG_MOUSE_PS2_SYNAPTICS=y
++CONFIG_MOUSE_PS2_TRACKPOINT=y
++# CONFIG_MOUSE_PS2_ELANTECH is not set
++# CONFIG_MOUSE_PS2_SENTELIC is not set
++# CONFIG_MOUSE_PS2_TOUCHKIT is not set
++# CONFIG_MOUSE_SERIAL is not set
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_BCM5974 is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++CONFIG_SERIO=m
++CONFIG_SERIO_SERPORT=m
++# CONFIG_SERIO_PCIPS2 is not set
++CONFIG_SERIO_LIBPS2=m
++# CONFIG_SERIO_RAW is not set
++# CONFIG_SERIO_ALTERA_PS2 is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++# CONFIG_VT is not set
++CONFIG_DEVKMEM=y
++# CONFIG_SERIAL_NONSTANDARD is not set
++# CONFIG_N_GSM is not set
++# CONFIG_NOZOMI is not set
++
++#
++# Serial drivers
++#
++CONFIG_SERIAL_8250=y
++CONFIG_SERIAL_8250_CONSOLE=y
++# CONFIG_SERIAL_8250_PCI is not set
++CONFIG_SERIAL_8250_NR_UARTS=2
++CONFIG_SERIAL_8250_RUNTIME_UARTS=2
++# CONFIG_SERIAL_8250_EXTENDED is not set
++# CONFIG_SERIAL_8250_CTSRTS is not set
++
++#
++# Non-8250 serial port support
++#
++# CONFIG_SERIAL_MAX3100 is not set
++# CONFIG_SERIAL_MAX3107 is not set
++# CONFIG_SERIAL_MFD_HSU is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
++# CONFIG_SERIAL_TIMBERDALE is not set
++# CONFIG_SERIAL_ALTERA_JTAGUART is not set
++# CONFIG_SERIAL_ALTERA_UART is not set
++CONFIG_UNIX98_PTYS=y
++# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
++# CONFIG_LEGACY_PTYS is not set
++# CONFIG_IPMI_HANDLER is not set
++CONFIG_HW_RANDOM=m
++# CONFIG_HW_RANDOM_TIMERIOMEM is not set
++# CONFIG_R3964 is not set
++# CONFIG_APPLICOM is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_DEVPORT=y
++# CONFIG_RAMOOPS is not set
++# CONFIG_I2C is not set
++CONFIG_SPI=y
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++CONFIG_SPI_BITBANG=y
++CONFIG_SPI_STR8100=y
++# CONFIG_SPI_XILINX is not set
++# CONFIG_SPI_DESIGNWARE is not set
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++
++#
++# PPS support
++#
++# CONFIG_PPS is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++# CONFIG_THERMAL is not set
++# CONFIG_WATCHDOG is not set
++CONFIG_SSB_POSSIBLE=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB=m
++CONFIG_SSB_SPROM=y
++CONFIG_SSB_PCIHOST_POSSIBLE=y
++CONFIG_SSB_PCIHOST=y
++# CONFIG_SSB_B43_PCI_BRIDGE is not set
++# CONFIG_SSB_SILENT is not set
++# CONFIG_SSB_DEBUG is not set
++CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
++CONFIG_SSB_DRIVER_PCICORE=y
++CONFIG_MFD_SUPPORT=y
++# CONFIG_MFD_CORE is not set
++# CONFIG_MFD_SM501 is not set
++# CONFIG_HTC_PASIC3 is not set
++# CONFIG_MFD_TMIO is not set
++# CONFIG_MFD_MC13783 is not set
++# CONFIG_ABX500_CORE is not set
++# CONFIG_EZX_PCAP is not set
++# CONFIG_AB8500_CORE is not set
++# CONFIG_LPC_SCH is not set
++# CONFIG_MFD_RDC321X is not set
++# CONFIG_MFD_JANZ_CMODIO is not set
++# CONFIG_REGULATOR is not set
++# CONFIG_MEDIA_SUPPORT is not set
++
++#
++# Graphics support
++#
++# CONFIG_VGA_ARB is not set
++# CONFIG_DRM is not set
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++# CONFIG_FB is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++# CONFIG_SOUND is not set
++CONFIG_HID_SUPPORT=y
++CONFIG_HID=m
++# CONFIG_HIDRAW is not set
++
++#
++# USB Input Devices
++#
++CONFIG_USB_HID=m
++# CONFIG_HID_PID is not set
++# CONFIG_USB_HIDDEV is not set
++
++#
++# USB HID Boot Protocol drivers
++#
++# CONFIG_USB_KBD is not set
++# CONFIG_USB_MOUSE is not set
++
++#
++# Special HID drivers
++#
++# CONFIG_HID_3M_PCT is not set
++# CONFIG_HID_A4TECH is not set
++# CONFIG_HID_ACRUX_FF is not set
++# CONFIG_HID_APPLE is not set
++# CONFIG_HID_BELKIN is not set
++# CONFIG_HID_CANDO is not set
++# CONFIG_HID_CHERRY is not set
++# CONFIG_HID_CHICONY is not set
++# CONFIG_HID_CYPRESS is not set
++# CONFIG_HID_DRAGONRISE is not set
++# CONFIG_HID_EGALAX is not set
++# CONFIG_HID_EZKEY is not set
++# CONFIG_HID_KYE is not set
++# CONFIG_HID_GYRATION is not set
++# CONFIG_HID_TWINHAN is not set
++# CONFIG_HID_KENSINGTON is not set
++# CONFIG_HID_LOGITECH is not set
++# CONFIG_HID_MICROSOFT is not set
++# CONFIG_HID_MOSART is not set
++# CONFIG_HID_MONTEREY is not set
++# CONFIG_HID_NTRIG is not set
++# CONFIG_HID_ORTEK is not set
++# CONFIG_HID_PANTHERLORD is not set
++# CONFIG_HID_PETALYNX is not set
++# CONFIG_HID_PICOLCD is not set
++# CONFIG_HID_QUANTA is not set
++# CONFIG_HID_ROCCAT is not set
++# CONFIG_HID_ROCCAT_KONE is not set
++# CONFIG_HID_SAMSUNG is not set
++# CONFIG_HID_SONY is not set
++# CONFIG_HID_STANTUM is not set
++# CONFIG_HID_SUNPLUS is not set
++# CONFIG_HID_GREENASIA is not set
++# CONFIG_HID_SMARTJOYPLUS is not set
++# CONFIG_HID_TOPSEED is not set
++# CONFIG_HID_THRUSTMASTER is not set
++# CONFIG_HID_ZEROPLUS is not set
++# CONFIG_HID_ZYDACRON is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARCH_HAS_OHCI=y
++CONFIG_USB_ARCH_HAS_EHCI=y
++CONFIG_USB=m
++# CONFIG_USB_DEBUG is not set
++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
++
++#
++# Miscellaneous USB options
++#
++# CONFIG_USB_DEVICEFS is not set
++# CONFIG_USB_DEVICE_CLASS is not set
++# CONFIG_USB_DYNAMIC_MINORS is not set
++# CONFIG_USB_OTG_WHITELIST is not set
++# CONFIG_USB_OTG_BLACKLIST_HUB is not set
++# CONFIG_USB_MON is not set
++# CONFIG_USB_WUSB is not set
++# CONFIG_USB_WUSB_CBAF is not set
++
++#
++# USB Host Controller Drivers
++#
++# CONFIG_USB_C67X00_HCD is not set
++# CONFIG_USB_XHCI_HCD is not set
++CONFIG_USB_EHCI_HCD=m
++# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
++# CONFIG_USB_EHCI_TT_NEWSCHED is not set
++# CONFIG_USB_OXU210HP_HCD is not set
++# CONFIG_USB_ISP116X_HCD is not set
++# CONFIG_USB_ISP1760_HCD is not set
++# CONFIG_USB_ISP1362_HCD is not set
++CONFIG_USB_OHCI_HCD=m
++# CONFIG_USB_OHCI_HCD_SSB is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
++CONFIG_USB_OHCI_LITTLE_ENDIAN=y
++CONFIG_USB_UHCI_HCD=m
++# CONFIG_USB_SL811_HCD is not set
++# CONFIG_USB_R8A66597_HCD is not set
++# CONFIG_USB_WHCI_HCD is not set
++# CONFIG_USB_HWA_HCD is not set
++# CONFIG_USB_MUSB_HDRC is not set
++
++#
++# USB Device Class drivers
++#
++# CONFIG_USB_ACM is not set
++# CONFIG_USB_PRINTER is not set
++# CONFIG_USB_WDM is not set
++# CONFIG_USB_TMC is not set
++
++#
++# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
++#
++
++#
++# also be needed; see USB_STORAGE Help for more info
++#
++CONFIG_USB_STORAGE=m
++# CONFIG_USB_STORAGE_DEBUG is not set
++# CONFIG_USB_STORAGE_DATAFAB is not set
++# CONFIG_USB_STORAGE_FREECOM is not set
++# CONFIG_USB_STORAGE_ISD200 is not set
++# CONFIG_USB_STORAGE_USBAT is not set
++# CONFIG_USB_STORAGE_SDDR09 is not set
++# CONFIG_USB_STORAGE_SDDR55 is not set
++# CONFIG_USB_STORAGE_JUMPSHOT is not set
++# CONFIG_USB_STORAGE_ALAUDA is not set
++# CONFIG_USB_STORAGE_ONETOUCH is not set
++# CONFIG_USB_STORAGE_KARMA is not set
++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
++# CONFIG_USB_LIBUSUAL is not set
++
++#
++# USB Imaging devices
++#
++# CONFIG_USB_MDC800 is not set
++# CONFIG_USB_MICROTEK is not set
++
++#
++# USB port drivers
++#
++CONFIG_USB_SERIAL=m
++# CONFIG_USB_EZUSB is not set
++CONFIG_USB_SERIAL_GENERIC=y
++# CONFIG_USB_SERIAL_AIRCABLE is not set
++# CONFIG_USB_SERIAL_ARK3116 is not set
++# CONFIG_USB_SERIAL_BELKIN is not set
++# CONFIG_USB_SERIAL_CH341 is not set
++# CONFIG_USB_SERIAL_WHITEHEAT is not set
++# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
++# CONFIG_USB_SERIAL_CP210X is not set
++# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
++# CONFIG_USB_SERIAL_EMPEG is not set
++# CONFIG_USB_SERIAL_FTDI_SIO is not set
++# CONFIG_USB_SERIAL_FUNSOFT is not set
++# CONFIG_USB_SERIAL_VISOR is not set
++# CONFIG_USB_SERIAL_IPAQ is not set
++# CONFIG_USB_SERIAL_IR is not set
++# CONFIG_USB_SERIAL_EDGEPORT is not set
++# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
++# CONFIG_USB_SERIAL_GARMIN is not set
++# CONFIG_USB_SERIAL_IPW is not set
++# CONFIG_USB_SERIAL_IUU is not set
++# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
++# CONFIG_USB_SERIAL_KEYSPAN is not set
++# CONFIG_USB_SERIAL_KLSI is not set
++# CONFIG_USB_SERIAL_KOBIL_SCT is not set
++# CONFIG_USB_SERIAL_MCT_U232 is not set
++# CONFIG_USB_SERIAL_MOS7720 is not set
++# CONFIG_USB_SERIAL_MOS7840 is not set
++# CONFIG_USB_SERIAL_MOTOROLA is not set
++# CONFIG_USB_SERIAL_NAVMAN is not set
++# CONFIG_USB_SERIAL_PL2303 is not set
++# CONFIG_USB_SERIAL_OTI6858 is not set
++# CONFIG_USB_SERIAL_QCAUX is not set
++# CONFIG_USB_SERIAL_QUALCOMM is not set
++# CONFIG_USB_SERIAL_SPCP8X5 is not set
++# CONFIG_USB_SERIAL_HP4X is not set
++# CONFIG_USB_SERIAL_SAFE is not set
++# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
++# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
++# CONFIG_USB_SERIAL_SYMBOL is not set
++# CONFIG_USB_SERIAL_TI is not set
++# CONFIG_USB_SERIAL_CYBERJACK is not set
++# CONFIG_USB_SERIAL_XIRCOM is not set
++# CONFIG_USB_SERIAL_OPTION is not set
++# CONFIG_USB_SERIAL_OMNINET is not set
++# CONFIG_USB_SERIAL_OPTICON is not set
++# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set
++# CONFIG_USB_SERIAL_ZIO is not set
++# CONFIG_USB_SERIAL_SSU100 is not set
++# CONFIG_USB_SERIAL_DEBUG is not set
++
++#
++# USB Miscellaneous drivers
++#
++# CONFIG_USB_EMI62 is not set
++# CONFIG_USB_EMI26 is not set
++# CONFIG_USB_ADUTUX is not set
++# CONFIG_USB_SEVSEG is not set
++# CONFIG_USB_RIO500 is not set
++# CONFIG_USB_LEGOTOWER is not set
++# CONFIG_USB_LCD is not set
++# CONFIG_USB_LED is not set
++# CONFIG_USB_CYPRESS_CY7C63 is not set
++# CONFIG_USB_CYTHERM is not set
++# CONFIG_USB_IDMOUSE is not set
++# CONFIG_USB_FTDI_ELAN is not set
++# CONFIG_USB_APPLEDISPLAY is not set
++# CONFIG_USB_SISUSBVGA is not set
++# CONFIG_USB_LD is not set
++# CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_IOWARRIOR is not set
++# CONFIG_USB_TEST is not set
++# CONFIG_USB_ISIGHTFW is not set
++CONFIG_USB_GADGET=m
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_VBUS_DRAW=2
++CONFIG_USB_GADGET_SELECTED=y
++CONFIG_USB_GADGET_R8A66597=y
++CONFIG_USB_R8A66597=m
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++# CONFIG_USB_GADGET_CI13XXX is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LANGWELL is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++# CONFIG_USB_ZERO is not set
++# CONFIG_USB_ETH is not set
++# CONFIG_USB_GADGETFS is not set
++# CONFIG_USB_FUNCTIONFS is not set
++# CONFIG_USB_FILE_STORAGE is not set
++# CONFIG_USB_MASS_STORAGE is not set
++# CONFIG_USB_G_SERIAL is not set
++# CONFIG_USB_G_PRINTER is not set
++# CONFIG_USB_CDC_COMPOSITE is not set
++# CONFIG_USB_G_MULTI is not set
++# CONFIG_USB_G_HID is not set
++# CONFIG_USB_G_DBGP is not set
++
++#
++# OTG and related infrastructure
++#
++# CONFIG_USB_ULPI is not set
++# CONFIG_NOP_USB_XCEIV is not set
++# CONFIG_UWB is not set
++# CONFIG_MMC is not set
++# CONFIG_MEMSTICK is not set
++# CONFIG_NEW_LEDS is not set
++# CONFIG_ACCESSIBILITY is not set
++# CONFIG_INFINIBAND is not set
++CONFIG_RTC_LIB=y
++# CONFIG_RTC_CLASS is not set
++# CONFIG_DMADEVICES is not set
++# CONFIG_AUXDISPLAY is not set
++# CONFIG_UIO is not set
++# CONFIG_STAGING is not set
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++CONFIG_EXT2_FS_XIP=y
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
++# CONFIG_EXT3_FS_XATTR is not set
++# CONFIG_EXT4_FS is not set
++CONFIG_FS_XIP=y
++CONFIG_JBD=y
++# CONFIG_REISERFS_FS is not set
++# CONFIG_JFS_FS is not set
++# CONFIG_FS_POSIX_ACL is not set
++# CONFIG_XFS_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_BTRFS_FS is not set
++# CONFIG_NILFS2_FS is not set
++CONFIG_FILE_LOCKING=y
++# CONFIG_FSNOTIFY is not set
++# CONFIG_DNOTIFY is not set
++# CONFIG_INOTIFY_USER is not set
++# CONFIG_QUOTA is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++# CONFIG_FUSE_FS is not set
++
++#
++# Caches
++#
++# CONFIG_FSCACHE is not set
++
++#
++# CD-ROM/DVD Filesystems
++#
++# CONFIG_ISO9660_FS is not set
++# CONFIG_UDF_FS is not set
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=y
++# CONFIG_MSDOS_FS is not set
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_PROC_PAGE_MONITOR=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++# CONFIG_CONFIGFS_FS is not set
++# CONFIG_MISC_FILESYSTEMS is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++CONFIG_NFS_FS=y
++# CONFIG_NFS_V3 is not set
++# CONFIG_NFS_V4 is not set
++# CONFIG_ROOT_NFS is not set
++# CONFIG_NFSD is not set
++CONFIG_LOCKD=y
++CONFIG_NFS_COMMON=y
++CONFIG_SUNRPC=y
++# CONFIG_RPCSEC_GSS_KRB5 is not set
++# CONFIG_RPCSEC_GSS_SPKM3 is not set
++# CONFIG_SMB_FS is not set
++# CONFIG_CEPH_FS is not set
++# CONFIG_CIFS is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++
++#
++# Partition Types
++#
++CONFIG_PARTITION_ADVANCED=y
++# CONFIG_ACORN_PARTITION is not set
++# CONFIG_OSF_PARTITION is not set
++# CONFIG_AMIGA_PARTITION is not set
++# CONFIG_ATARI_PARTITION is not set
++# CONFIG_MAC_PARTITION is not set
++CONFIG_MSDOS_PARTITION=y
++# CONFIG_BSD_DISKLABEL is not set
++# CONFIG_MINIX_SUBPARTITION is not set
++# CONFIG_SOLARIS_X86_PARTITION is not set
++# CONFIG_UNIXWARE_DISKLABEL is not set
++# CONFIG_LDM_PARTITION is not set
++# CONFIG_SGI_PARTITION is not set
++# CONFIG_ULTRIX_PARTITION is not set
++# CONFIG_SUN_PARTITION is not set
++# CONFIG_KARMA_PARTITION is not set
++# CONFIG_EFI_PARTITION is not set
++# CONFIG_SYSV68_PARTITION is not set
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=y
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++# CONFIG_NLS_CODEPAGE_850 is not set
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=y
++# CONFIG_NLS_ISO8859_2 is not set
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=y
++# CONFIG_DLM is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++# CONFIG_ENABLE_WARN_DEPRECATED is not set
++# CONFIG_ENABLE_MUST_CHECK is not set
++CONFIG_FRAME_WARN=1024
++# CONFIG_MAGIC_SYSRQ is not set
++CONFIG_STRIP_ASM_SYMS=y
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
++# CONFIG_DEBUG_KERNEL is not set
++# CONFIG_HARDLOCKUP_DETECTOR is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++# CONFIG_DEBUG_MEMORY_INIT is not set
++CONFIG_FRAME_POINTER=y
++# CONFIG_RCU_CPU_STALL_DETECTOR is not set
++# CONFIG_SYSCTL_SYSCALL_CHECK is not set
++CONFIG_HAVE_FUNCTION_TRACER=y
++CONFIG_TRACING_SUPPORT=y
++# CONFIG_FTRACE is not set
++# CONFIG_ATOMIC64_SELFTEST is not set
++# CONFIG_SAMPLES is not set
++CONFIG_HAVE_ARCH_KGDB=y
++# CONFIG_DEBUG_USER is not set
++# CONFIG_OC_ETM is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITYFS is not set
++CONFIG_DEFAULT_SECURITY_DAC=y
++CONFIG_DEFAULT_SECURITY=""
++CONFIG_CRYPTO=y
++
++#
++# Crypto core or helper
++#
++# CONFIG_CRYPTO_FIPS is not set
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_ALGAPI2=y
++CONFIG_CRYPTO_AEAD2=y
++CONFIG_CRYPTO_BLKCIPHER=y
++CONFIG_CRYPTO_BLKCIPHER2=y
++CONFIG_CRYPTO_HASH=m
++CONFIG_CRYPTO_HASH2=y
++CONFIG_CRYPTO_RNG=m
++CONFIG_CRYPTO_RNG2=y
++CONFIG_CRYPTO_PCOMP2=y
++CONFIG_CRYPTO_MANAGER=y
++CONFIG_CRYPTO_MANAGER2=y
++CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
++# CONFIG_CRYPTO_GF128MUL is not set
++# CONFIG_CRYPTO_NULL is not set
++CONFIG_CRYPTO_WORKQUEUE=y
++# CONFIG_CRYPTO_CRYPTD is not set
++# CONFIG_CRYPTO_AUTHENC is not set
++# CONFIG_CRYPTO_TEST is not set
++
++#
++# Authenticated Encryption with Associated Data
++#
++# CONFIG_CRYPTO_CCM is not set
++# CONFIG_CRYPTO_GCM is not set
++# CONFIG_CRYPTO_SEQIV is not set
++
++#
++# Block modes
++#
++# CONFIG_CRYPTO_CBC is not set
++# CONFIG_CRYPTO_CTR is not set
++# CONFIG_CRYPTO_CTS is not set
++CONFIG_CRYPTO_ECB=y
++# CONFIG_CRYPTO_LRW is not set
++# CONFIG_CRYPTO_PCBC is not set
++# CONFIG_CRYPTO_XTS is not set
++
++#
++# Hash modes
++#
++# CONFIG_CRYPTO_HMAC is not set
++# CONFIG_CRYPTO_XCBC is not set
++# CONFIG_CRYPTO_VMAC is not set
++
++#
++# Digest
++#
++# CONFIG_CRYPTO_CRC32C is not set
++# CONFIG_CRYPTO_GHASH is not set
++# CONFIG_CRYPTO_MD4 is not set
++# CONFIG_CRYPTO_MD5 is not set
++CONFIG_CRYPTO_MICHAEL_MIC=m
++# CONFIG_CRYPTO_RMD128 is not set
++# CONFIG_CRYPTO_RMD160 is not set
++# CONFIG_CRYPTO_RMD256 is not set
++# CONFIG_CRYPTO_RMD320 is not set
++CONFIG_CRYPTO_SHA1=m
++# CONFIG_CRYPTO_SHA256 is not set
++# CONFIG_CRYPTO_SHA512 is not set
++# CONFIG_CRYPTO_TGR192 is not set
++# CONFIG_CRYPTO_WP512 is not set
++
++#
++# Ciphers
++#
++CONFIG_CRYPTO_AES=m
++# CONFIG_CRYPTO_ANUBIS is not set
++CONFIG_CRYPTO_ARC4=y
++# CONFIG_CRYPTO_BLOWFISH is not set
++# CONFIG_CRYPTO_CAMELLIA is not set
++# CONFIG_CRYPTO_CAST5 is not set
++# CONFIG_CRYPTO_CAST6 is not set
++# CONFIG_CRYPTO_DES is not set
++# CONFIG_CRYPTO_FCRYPT is not set
++# CONFIG_CRYPTO_KHAZAD is not set
++# CONFIG_CRYPTO_SALSA20 is not set
++# CONFIG_CRYPTO_SEED is not set
++# CONFIG_CRYPTO_SERPENT is not set
++# CONFIG_CRYPTO_TEA is not set
++# CONFIG_CRYPTO_TWOFISH is not set
++
++#
++# Compression
++#
++# CONFIG_CRYPTO_DEFLATE is not set
++# CONFIG_CRYPTO_ZLIB is not set
++# CONFIG_CRYPTO_LZO is not set
++
++#
++# Random Number Generation
++#
++CONFIG_CRYPTO_ANSI_CPRNG=m
++# CONFIG_CRYPTO_HW is not set
++# CONFIG_BINARY_PRINTF is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_GENERIC_FIND_LAST_BIT=y
++CONFIG_CRC_CCITT=m
++# CONFIG_CRC16 is not set
++# CONFIG_CRC_T10DIF is not set
++CONFIG_CRC_ITU_T=m
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++# CONFIG_LIBCRC32C is not set
++CONFIG_ZLIB_INFLATE=y
++CONFIG_DECOMPRESS_GZIP=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
++CONFIG_NLATTR=y
++CONFIG_GENERIC_ATOMIC64=y
+diff -rupN linux-2.6.35.11/arch/arm/include/asm/page.h linux-2.6.35.11-ts7500/arch/arm/include/asm/page.h
+--- linux-2.6.35.11/arch/arm/include/asm/page.h	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/include/asm/page.h	2011-03-14 11:18:24.000000000 -0400
+@@ -84,6 +84,17 @@
+ # endif
+ #endif
+ 
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++#ifdef CONFIG_CPU_COPY_FA
++# ifdef _USER
++#  define MULTI_USER 1
++# else
++#  define _USER fa
++# endif
++#endif
++#endif
++
++
+ #ifdef CONFIG_CPU_SA1100
+ # ifdef _USER
+ #  define MULTI_USER 1
+diff -rupN linux-2.6.35.11/arch/arm/include/asm/pci.h linux-2.6.35.11-ts7500/arch/arm/include/asm/pci.h
+--- linux-2.6.35.11/arch/arm/include/asm/pci.h	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/include/asm/pci.h	2011-03-14 11:18:24.000000000 -0400
+@@ -75,6 +75,16 @@ static inline int pci_get_legacy_ide_irq
+ 	return 0;
+ }
+ 
++
++#if defined(CONFIG_ARCH_STR9100) || defined(CONFIG_ARCH_STR8100)
++#define HAVE_ARCH_PCI_MWI
++static inline int pcibios_prep_mwi(struct pci_dev *dev)
++{
++	pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 0x08);
++	return 0;
++}
++#endif
++
+ #endif /* __KERNEL__ */
+  
+ #endif
+diff -rupN linux-2.6.35.11/arch/arm/include/asm/tlbflush.h linux-2.6.35.11-ts7500/arch/arm/include/asm/tlbflush.h
+--- linux-2.6.35.11/arch/arm/include/asm/tlbflush.h	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/include/asm/tlbflush.h	2011-03-14 11:18:24.000000000 -0400
+@@ -39,7 +39,7 @@
+ #define TLB_V6_D_ASID	(1 << 17)
+ #define TLB_V6_I_ASID	(1 << 18)
+ 
+-#define TLB_BTB		(1 << 28)
++//#define TLB_BTB		(1 << 28)
+ 
+ /* Unified Inner Shareable TLB operations (ARMv7 MP extensions) */
+ #define TLB_V7_UIS_PAGE	(1 << 19)
+@@ -53,6 +53,12 @@
+ #define TLB_DCLEAN	(1 << 30)
+ #define TLB_WB		(1 << 31)
+ 
++
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++#define TLB_DINVAL	(1 << 28)
++#define TLB_BTB		(1 << 29)
++#endif
++
+ /*
+  *	MMU TLB Model
+  *	=============
+@@ -100,6 +106,29 @@
+ # define v4_always_flags	(-1UL)
+ #endif
+ 
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++#ifdef CONFIG_CPU_FA_BTB
++#define __TLB_BTB      TLB_BTB
++#else
++#define __TLB_BTB      0
++#endif
++
++#ifdef CONFIG_CPU_FA_WB_DISABLE
++#define __TLB_WB       0
++#else
++#define __TLB_WB       TLB_WB
++#endif
++
++/* Fix buggy CPU which doesn't invalidate Dcache properly */
++#ifdef CONFIG_CPU_FA520
++#define __TLB_DINVAL   TLB_DINVAL
++#elif defined(CONFIG_CPU_FA526)
++//#define __TLB_DINVAL   TLB_DINVAL
++#define __TLB_DINVAL   0
++#else
++#define __TLB_DINVAL   0
++#endif
++
+ #define fa_tlb_flags	(TLB_WB | TLB_BTB | TLB_DCLEAN | \
+ 			 TLB_V4_U_FULL | TLB_V4_U_PAGE)
+ 
+@@ -115,6 +144,7 @@
+ # define fa_possible_flags	0
+ # define fa_always_flags	(-1UL)
+ #endif
++#endif
+ 
+ #define v4wbi_tlb_flags	(TLB_WB | TLB_DCLEAN | \
+ 			 TLB_V4_I_FULL | TLB_V4_D_FULL | \
+@@ -297,24 +327,36 @@ extern struct cpu_tlb_fns cpu_tlb;
+  * implemented the "%?" method, but this has been discontinued due to too
+  * many people getting it wrong.
+  */
+-#define possible_tlb_flags	(v3_possible_flags | \
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++#define possible_tlb_flags      (v3_possible_flags | \
+ 				 v4_possible_flags | \
+ 				 v4wbi_possible_flags | \
+-				 fr_possible_flags | \
+ 				 v4wb_possible_flags | \
+ 				 fa_possible_flags | \
+-				 v6wbi_possible_flags | \
+-				 v7wbi_possible_flags)
++				 v6wbi_possible_flags)
++#else
++#define possible_tlb_flags	(v3_possible_flags | \
++				 v4_possible_flags | \
++				 v4wbi_possible_flags | \
++				 v4wb_possible_flags | \
++				 v6wbi_possible_flags)
++#endif
+ 
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
+ #define always_tlb_flags	(v3_always_flags & \
+ 				 v4_always_flags & \
+ 				 v4wbi_always_flags & \
+-				 fr_always_flags & \
+ 				 v4wb_always_flags & \
+ 				 fa_always_flags & \
+-				 v6wbi_always_flags & \
+-				 v7wbi_always_flags)
+-
++				 v6wbi_always_flags)
++#else
++#define always_tlb_flags	(v3_always_flags & \
++				 v4_always_flags & \
++				 v4wbi_always_flags & \
++				 v4wb_always_flags & \
++				 v6wbi_always_flags)
++#endif
++             
+ #define tlb_flag(f)	((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f)))
+ 
+ static inline void local_flush_tlb_all(void)
+@@ -322,6 +364,11 @@ static inline void local_flush_tlb_all(v
+ 	const int zero = 0;
+ 	const unsigned int __tlb_flag = __cpu_tlb_flags;
+ 
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++	if (tlb_flag(TLB_DINVAL))
++		asm("mcr%? p15, 0, %0, c7, c14, 0" : : "r" (zero) : "cc");
++#endif   
++   
+ 	if (tlb_flag(TLB_WB))
+ 		dsb();
+ 
+@@ -333,9 +380,28 @@ static inline void local_flush_tlb_all(v
+ 		asm("mcr p15, 0, %0, c8, c6, 0" : : "r" (zero) : "cc");
+ 	if (tlb_flag(TLB_V4_I_FULL | TLB_V6_I_FULL))
+ 		asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc");
+-	if (tlb_flag(TLB_V7_UIS_FULL))
+-		asm("mcr p15, 0, %0, c8, c3, 0" : : "r" (zero) : "cc");
+ 
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++	if (tlb_flag(TLB_BTB)) {
++		asm("mcr%? p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
++		asm("mov r0, r0" : : );
++		asm("mov r0, r0" : : );
++	}
++#endif
++
++//	if (tlb_flag(TLB_V7_UIS_FULL))
++	//	asm("mcr p15, 0, %0, c8, c3, 0" : : "r" (zero) : "cc");
++   
++   if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL |
++		     TLB_V6_I_PAGE | TLB_V6_D_PAGE |
++		     TLB_V6_I_ASID | TLB_V6_D_ASID)) {
++		/* flush the branch target cache */
++		asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
++		dsb();
++		isb();
++	}
++
++#if (0)   
+ 	if (tlb_flag(TLB_BTB)) {
+ 		/* flush the branch target cache */
+ 		asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
+@@ -348,6 +414,7 @@ static inline void local_flush_tlb_all(v
+ 		dsb();
+ 		isb();
+ 	}
++#endif   
+ }
+ 
+ static inline void local_flush_tlb_mm(struct mm_struct *mm)
+@@ -356,6 +423,11 @@ static inline void local_flush_tlb_mm(st
+ 	const int asid = ASID(mm);
+ 	const unsigned int __tlb_flag = __cpu_tlb_flags;
+ 
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++	if (tlb_flag(TLB_DINVAL))
++		asm("mcr%? p15, 0, %0, c7, c14, 0" : : "r" (zero) : "cc");
++#endif
++
+ 	if (tlb_flag(TLB_WB))
+ 		dsb();
+ 
+@@ -395,6 +467,7 @@ static inline void local_flush_tlb_mm(st
+ 		dsb();
+ 		isb();
+ 	}
++
+ }
+ 
+ static inline void
+@@ -404,7 +477,12 @@ local_flush_tlb_page(struct vm_area_stru
+ 	const unsigned int __tlb_flag = __cpu_tlb_flags;
+ 
+ 	uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm);
+-
++   
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++	if (tlb_flag(TLB_DINVAL))
++		asm("mcr%? p15, 0, %0, c7, c14, 0" : : "r" (zero) : "cc"); // clean & invalidate data cache all
++#endif
++   
+ 	if (tlb_flag(TLB_WB))
+ 		dsb();
+ 
+@@ -445,6 +523,7 @@ local_flush_tlb_page(struct vm_area_stru
+ 		dsb();
+ 		isb();
+ 	}
++
+ }
+ 
+ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
+@@ -454,6 +533,11 @@ static inline void local_flush_tlb_kerne
+ 
+ 	kaddr &= PAGE_MASK;
+ 
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++	if (tlb_flag(TLB_DINVAL))
++		asm("mcr%? p15, 0, %0, c7, c14, 0" : : "r" (zero) : "cc");
++#endif
++
+ 	if (tlb_flag(TLB_WB))
+ 		dsb();
+ 
+@@ -474,9 +558,28 @@ static inline void local_flush_tlb_kerne
+ 		asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr) : "cc");
+ 	if (tlb_flag(TLB_V6_I_PAGE))
+ 		asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr) : "cc");
+-	if (tlb_flag(TLB_V7_UIS_PAGE))
+-		asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (kaddr) : "cc");
++   
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++	if (tlb_flag(TLB_BTB)) {
++		asm("mcr%? p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
++		asm("mov r0, r0" : : );
++		asm("mov r0, r0" : : );
++	}
++#endif
+ 
++	//if (tlb_flag(TLB_V7_UIS_PAGE))
++		//asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (kaddr) : "cc");
++      
++      if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL |
++		     TLB_V6_I_PAGE | TLB_V6_D_PAGE |
++		     TLB_V6_I_ASID | TLB_V6_D_ASID)) {
++		/* flush the branch target cache */
++		asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
++		dsb();
++		isb();
++	}
++   
++#if (0)
+ 	if (tlb_flag(TLB_BTB)) {
+ 		/* flush the branch target cache */
+ 		asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
+@@ -489,6 +592,7 @@ static inline void local_flush_tlb_kerne
+ 		dsb();
+ 		isb();
+ 	}
++#endif   
+ }
+ 
+ /*
+@@ -507,30 +611,53 @@ static inline void local_flush_tlb_kerne
+ static inline void flush_pmd_entry(pmd_t *pmd)
+ {
+ 	const unsigned int __tlb_flag = __cpu_tlb_flags;
++   const int zero = 0;
+ 
+ 	if (tlb_flag(TLB_DCLEAN))
+ 		asm("mcr	p15, 0, %0, c7, c10, 1	@ flush_pmd"
+ 			: : "r" (pmd) : "cc");
+ 
++/*         
+ 	if (tlb_flag(TLB_L2CLEAN_FR))
+ 		asm("mcr	p15, 1, %0, c15, c9, 1  @ L2 flush_pmd"
+ 			: : "r" (pmd) : "cc");
+-
++*/
+ 	if (tlb_flag(TLB_WB))
+ 		dsb();
++   
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++	if (tlb_flag(TLB_BTB)) {
++		asm("mcr%? p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
++		asm("mov r0, r0" : : );
++		asm("mov r0, r0" : : );
++	}
++#endif
++
+ }
+ 
+ static inline void clean_pmd_entry(pmd_t *pmd)
+ {
+ 	const unsigned int __tlb_flag = __cpu_tlb_flags;
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++	const unsigned int zero = 0;
++#endif
+ 
+ 	if (tlb_flag(TLB_DCLEAN))
+ 		asm("mcr	p15, 0, %0, c7, c10, 1	@ flush_pmd"
+ 			: : "r" (pmd) : "cc");
+-
++/*
+ 	if (tlb_flag(TLB_L2CLEAN_FR))
+ 		asm("mcr	p15, 1, %0, c15, c9, 1  @ L2 flush_pmd"
+ 			: : "r" (pmd) : "cc");
++*/
++
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++	if (tlb_flag(TLB_BTB)) {
++		asm("mcr%? p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc");
++		asm("mov r0, r0" : : );
++		asm("mov r0, r0" : : );
++	}
++#endif         
+ }
+ 
+ #undef tlb_flag
+@@ -571,4 +698,5 @@ extern void update_mmu_cache(struct vm_a
+ 
+ #endif /* CONFIG_MMU */
+ 
+-#endif
++#endif /* _ASMARM_TLBFLUSH_H */
++
+diff -rupN linux-2.6.35.11/arch/arm/Kconfig linux-2.6.35.11-ts7500/arch/arm/Kconfig
+--- linux-2.6.35.11/arch/arm/Kconfig	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/Kconfig	2011-03-14 11:18:24.000000000 -0400
+@@ -160,7 +160,8 @@ config ARCH_MAY_HAVE_PC_FDC
+ 
+ config ZONE_DMA
+ 	bool
+-
++   default y if !ARCH_STR8100
++	
+ config NEED_DMA_MAP_STATE
+        def_bool y
+ 
+@@ -210,6 +211,20 @@ choice
+ 	prompt "ARM system type"
+ 	default ARCH_VERSATILE
+ 
++config ARCH_STR9100
++	bool "Star-STR9100"
++	select PCI
++	help
++	  Star STR9100 is a platform based on Faraday's ARM9 compatible processor
++	  architecture.
++
++config ARCH_STR8100
++	bool "Star-STR8100"
++	select PCI
++	help
++	  Star STR8100 is a platform based on Faraday's ARM9 compatible processor
++	  architecture.
++     
+ config ARCH_AAEC2000
+ 	bool "Agilent AAEC-2000 based"
+ 	select CPU_ARM920T
+@@ -901,6 +916,14 @@ source "arch/arm/mach-s5p6442/Kconfig"
+ 
+ source "arch/arm/mach-s5pc100/Kconfig"
+ 
++if ARCH_STR9100
++source "arch/arm/mach-str9100/Kconfig"
++endif
++
++if ARCH_STR8100
++source "arch/arm/mach-str8100/Kconfig"
++endif
++
+ source "arch/arm/mach-s5pv210/Kconfig"
+ 
+ source "arch/arm/mach-shmobile/Kconfig"
+diff -rupN linux-2.6.35.11/arch/arm/Kconfig.orig linux-2.6.35.11-ts7500/arch/arm/Kconfig.orig
+--- linux-2.6.35.11/arch/arm/Kconfig.orig	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/Kconfig.orig	2011-02-06 14:04:07.000000000 -0500
+@@ -0,0 +1,1691 @@
++#
++# For a description of the syntax of this configuration file,
++# see Documentation/kbuild/kconfig-language.txt.
++#
++
++mainmenu "Linux Kernel Configuration"
++
++config ARM
++	bool
++	default y
++	select HAVE_AOUT
++	select HAVE_IDE
++	select RTC_LIB
++	select SYS_SUPPORTS_APM_EMULATION
++	select GENERIC_ATOMIC64 if (!CPU_32v6K)
++	select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
++	select HAVE_ARCH_KGDB
++	select HAVE_KPROBES if (!XIP_KERNEL)
++	select HAVE_KRETPROBES if (HAVE_KPROBES)
++	select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
++	select HAVE_GENERIC_DMA_COHERENT
++	select HAVE_KERNEL_GZIP
++	select HAVE_KERNEL_LZO
++	select HAVE_KERNEL_LZMA
++	select HAVE_PERF_EVENTS
++	select PERF_USE_VMALLOC
++	help
++	  The ARM series is a line of low-power-consumption RISC chip designs
++	  licensed by ARM Ltd and targeted at embedded applications and
++	  handhelds such as the Compaq IPAQ.  ARM-based PCs are no longer
++	  manufactured, but legacy ARM-based PC hardware remains popular in
++	  Europe.  There is an ARM Linux project with a web page at
++	  <http://www.arm.linux.org.uk/>.
++
++config HAVE_PWM
++	bool
++
++config SYS_SUPPORTS_APM_EMULATION
++	bool
++
++config GENERIC_GPIO
++	bool
++
++config GENERIC_TIME
++	bool
++	default y
++
++config ARCH_USES_GETTIMEOFFSET
++	bool
++	default n
++
++config GENERIC_CLOCKEVENTS
++	bool
++
++config GENERIC_CLOCKEVENTS_BROADCAST
++	bool
++	depends on GENERIC_CLOCKEVENTS
++	default y if SMP && !LOCAL_TIMERS
++
++config HAVE_TCM
++	bool
++	select GENERIC_ALLOCATOR
++
++config HAVE_PROC_CPU
++	bool
++
++config NO_IOPORT
++	bool
++
++config EISA
++	bool
++	---help---
++	  The Extended Industry Standard Architecture (EISA) bus was
++	  developed as an open alternative to the IBM MicroChannel bus.
++
++	  The EISA bus provided some of the features of the IBM MicroChannel
++	  bus while maintaining backward compatibility with cards made for
++	  the older ISA bus.  The EISA bus saw limited use between 1988 and
++	  1995 when it was made obsolete by the PCI bus.
++
++	  Say Y here if you are building a kernel for an EISA-based machine.
++
++	  Otherwise, say N.
++
++config SBUS
++	bool
++
++config MCA
++	bool
++	help
++	  MicroChannel Architecture is found in some IBM PS/2 machines and
++	  laptops.  It is a bus system similar to PCI or ISA. See
++	  <file:Documentation/mca.txt> (and especially the web page given
++	  there) before attempting to build an MCA bus kernel.
++
++config GENERIC_HARDIRQS
++	bool
++	default y
++
++config STACKTRACE_SUPPORT
++	bool
++	default y
++
++config HAVE_LATENCYTOP_SUPPORT
++	bool
++	depends on !SMP
++	default y
++
++config LOCKDEP_SUPPORT
++	bool
++	default y
++
++config TRACE_IRQFLAGS_SUPPORT
++	bool
++	default y
++
++config HARDIRQS_SW_RESEND
++	bool
++	default y
++
++config GENERIC_IRQ_PROBE
++	bool
++	default y
++
++config GENERIC_LOCKBREAK
++	bool
++	default y
++	depends on SMP && PREEMPT
++
++config RWSEM_GENERIC_SPINLOCK
++	bool
++	default y
++
++config RWSEM_XCHGADD_ALGORITHM
++	bool
++
++config ARCH_HAS_ILOG2_U32
++	bool
++
++config ARCH_HAS_ILOG2_U64
++	bool
++
++config ARCH_HAS_CPUFREQ
++	bool
++	help
++	  Internal node to signify that the ARCH has CPUFREQ support
++	  and that the relevant menu configurations are displayed for
++	  it.
++
++config GENERIC_HWEIGHT
++	bool
++	default y
++
++config GENERIC_CALIBRATE_DELAY
++	bool
++	default y
++
++config ARCH_MAY_HAVE_PC_FDC
++	bool
++
++config ZONE_DMA
++	bool
++
++config NEED_DMA_MAP_STATE
++       def_bool y
++
++config GENERIC_ISA_DMA
++	bool
++
++config FIQ
++	bool
++
++config ARCH_MTD_XIP
++	bool
++
++config GENERIC_HARDIRQS_NO__DO_IRQ
++	def_bool y
++
++config ARM_L1_CACHE_SHIFT_6
++	bool
++	help
++	  Setting ARM L1 cache line size to 64 Bytes.
++
++config VECTORS_BASE
++	hex
++	default 0xffff0000 if MMU || CPU_HIGH_VECTOR
++	default DRAM_BASE if REMAP_VECTORS_TO_RAM
++	default 0x00000000
++	help
++	  The base address of exception vectors.
++
++source "init/Kconfig"
++
++source "kernel/Kconfig.freezer"
++
++menu "System Type"
++
++config MMU
++	bool "MMU-based Paged Memory Management Support"
++	default y
++	help
++	  Select if you want MMU-based virtualised addressing space
++	  support by paged memory management. If unsure, say 'Y'.
++
++#
++# The "ARM system type" choice list is ordered alphabetically by option
++# text.  Please add new entries in the option alphabetic order.
++#
++choice
++	prompt "ARM system type"
++	default ARCH_VERSATILE
++
++config ARCH_AAEC2000
++	bool "Agilent AAEC-2000 based"
++	select CPU_ARM920T
++	select ARM_AMBA
++	select HAVE_CLK
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  This enables support for systems based on the Agilent AAEC-2000
++
++config ARCH_INTEGRATOR
++	bool "ARM Ltd. Integrator family"
++	select ARM_AMBA
++	select ARCH_HAS_CPUFREQ
++	select COMMON_CLKDEV
++	select ICST
++	select GENERIC_CLOCKEVENTS
++	select PLAT_VERSATILE
++	help
++	  Support for ARM's Integrator platform.
++
++config ARCH_REALVIEW
++	bool "ARM Ltd. RealView family"
++	select ARM_AMBA
++	select COMMON_CLKDEV
++	select ICST
++	select GENERIC_CLOCKEVENTS
++	select ARCH_WANT_OPTIONAL_GPIOLIB
++	select PLAT_VERSATILE
++	select ARM_TIMER_SP804
++	select GPIO_PL061 if GPIOLIB
++	help
++	  This enables support for ARM Ltd RealView boards.
++
++config ARCH_VERSATILE
++	bool "ARM Ltd. Versatile family"
++	select ARM_AMBA
++	select ARM_VIC
++	select COMMON_CLKDEV
++	select ICST
++	select GENERIC_CLOCKEVENTS
++	select ARCH_WANT_OPTIONAL_GPIOLIB
++	select PLAT_VERSATILE
++	select ARM_TIMER_SP804
++	help
++	  This enables support for ARM Ltd Versatile board.
++
++config ARCH_VEXPRESS
++	bool "ARM Ltd. Versatile Express family"
++	select ARCH_WANT_OPTIONAL_GPIOLIB
++	select ARM_AMBA
++	select ARM_TIMER_SP804
++	select COMMON_CLKDEV
++	select GENERIC_CLOCKEVENTS
++	select HAVE_CLK
++	select ICST
++	select PLAT_VERSATILE
++	help
++	  This enables support for the ARM Ltd Versatile Express boards.
++
++config ARCH_AT91
++	bool "Atmel AT91"
++	select ARCH_REQUIRE_GPIOLIB
++	select HAVE_CLK
++	help
++	  This enables support for systems based on the Atmel AT91RM9200,
++	  AT91SAM9 and AT91CAP9 processors.
++
++config ARCH_BCMRING
++	bool "Broadcom BCMRING"
++	depends on MMU
++	select CPU_V6
++	select ARM_AMBA
++	select COMMON_CLKDEV
++	select GENERIC_CLOCKEVENTS
++	select ARCH_WANT_OPTIONAL_GPIOLIB
++	help
++	  Support for Broadcom's BCMRing platform.
++
++config ARCH_CLPS711X
++	bool "Cirrus Logic CLPS711x/EP721x-based"
++	select CPU_ARM720T
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  Support for Cirrus Logic 711x/721x based boards.
++
++config ARCH_CNS3XXX
++	bool "Cavium Networks CNS3XXX family"
++	select CPU_V6
++	select GENERIC_CLOCKEVENTS
++	select ARM_GIC
++	help
++	  Support for Cavium Networks CNS3XXX platform.
++
++config ARCH_GEMINI
++	bool "Cortina Systems Gemini"
++	select CPU_FA526
++	select ARCH_REQUIRE_GPIOLIB
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  Support for the Cortina Systems Gemini family SoCs
++
++config ARCH_EBSA110
++	bool "EBSA-110"
++	select CPU_SA110
++	select ISA
++	select NO_IOPORT
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  This is an evaluation board for the StrongARM processor available
++	  from Digital. It has limited hardware on-board, including an
++	  Ethernet interface, two PCMCIA sockets, two serial ports and a
++	  parallel port.
++
++config ARCH_EP93XX
++	bool "EP93xx-based"
++	select CPU_ARM920T
++	select ARM_AMBA
++	select ARM_VIC
++	select COMMON_CLKDEV
++	select ARCH_REQUIRE_GPIOLIB
++	select ARCH_HAS_HOLES_MEMORYMODEL
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  This enables support for the Cirrus EP93xx series of CPUs.
++
++config ARCH_FOOTBRIDGE
++	bool "FootBridge"
++	select CPU_SA110
++	select FOOTBRIDGE
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  Support for systems based on the DC21285 companion chip
++	  ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
++
++config ARCH_MXC
++	bool "Freescale MXC/iMX-based"
++	select GENERIC_CLOCKEVENTS
++	select ARCH_REQUIRE_GPIOLIB
++	select COMMON_CLKDEV
++	help
++	  Support for Freescale MXC/iMX-based family of processors
++
++config ARCH_STMP3XXX
++	bool "Freescale STMP3xxx"
++	select CPU_ARM926T
++	select COMMON_CLKDEV
++	select ARCH_REQUIRE_GPIOLIB
++	select GENERIC_CLOCKEVENTS
++	select USB_ARCH_HAS_EHCI
++	help
++	  Support for systems based on the Freescale 3xxx CPUs.
++
++config ARCH_NETX
++	bool "Hilscher NetX based"
++	select CPU_ARM926T
++	select ARM_VIC
++	select GENERIC_CLOCKEVENTS
++	help
++	  This enables support for systems based on the Hilscher NetX Soc
++
++config ARCH_H720X
++	bool "Hynix HMS720x-based"
++	select CPU_ARM720T
++	select ISA_DMA_API
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  This enables support for systems based on the Hynix HMS720x
++
++config ARCH_IOP13XX
++	bool "IOP13xx-based"
++	depends on MMU
++	select CPU_XSC3
++	select PLAT_IOP
++	select PCI
++	select ARCH_SUPPORTS_MSI
++	select VMSPLIT_1G
++	help
++	  Support for Intel's IOP13XX (XScale) family of processors.
++
++config ARCH_IOP32X
++	bool "IOP32x-based"
++	depends on MMU
++	select CPU_XSCALE
++	select PLAT_IOP
++	select PCI
++	select ARCH_REQUIRE_GPIOLIB
++	help
++	  Support for Intel's 80219 and IOP32X (XScale) family of
++	  processors.
++
++config ARCH_IOP33X
++	bool "IOP33x-based"
++	depends on MMU
++	select CPU_XSCALE
++	select PLAT_IOP
++	select PCI
++	select ARCH_REQUIRE_GPIOLIB
++	help
++	  Support for Intel's IOP33X (XScale) family of processors.
++
++config ARCH_IXP23XX
++ 	bool "IXP23XX-based"
++	depends on MMU
++	select CPU_XSC3
++ 	select PCI
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  Support for Intel's IXP23xx (XScale) family of processors.
++
++config ARCH_IXP2000
++	bool "IXP2400/2800-based"
++	depends on MMU
++	select CPU_XSCALE
++	select PCI
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  Support for Intel's IXP2400/2800 (XScale) family of processors.
++
++config ARCH_IXP4XX
++	bool "IXP4xx-based"
++	depends on MMU
++	select CPU_XSCALE
++	select GENERIC_GPIO
++	select GENERIC_CLOCKEVENTS
++	select DMABOUNCE if PCI
++	help
++	  Support for Intel's IXP4XX (XScale) family of processors.
++
++config ARCH_L7200
++	bool "LinkUp-L7200"
++	select CPU_ARM720T
++	select FIQ
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  Say Y here if you intend to run this kernel on a LinkUp Systems
++	  L7200 Software Development Board which uses an ARM720T processor.
++	  Information on this board can be obtained at:
++
++	  <http://www.linkupsys.com/>
++
++	  If you have any questions or comments about the Linux kernel port
++	  to this board, send e-mail to <sjhill@cotw.com>.
++
++config ARCH_DOVE
++	bool "Marvell Dove"
++	select PCI
++	select ARCH_REQUIRE_GPIOLIB
++	select GENERIC_CLOCKEVENTS
++	select PLAT_ORION
++	help
++	  Support for the Marvell Dove SoC 88AP510
++
++config ARCH_KIRKWOOD
++	bool "Marvell Kirkwood"
++	select CPU_FEROCEON
++	select PCI
++	select ARCH_REQUIRE_GPIOLIB
++	select GENERIC_CLOCKEVENTS
++	select PLAT_ORION
++	help
++	  Support for the following Marvell Kirkwood series SoCs:
++	  88F6180, 88F6192 and 88F6281.
++
++config ARCH_LOKI
++	bool "Marvell Loki (88RC8480)"
++	select CPU_FEROCEON
++	select GENERIC_CLOCKEVENTS
++	select PLAT_ORION
++	help
++	  Support for the Marvell Loki (88RC8480) SoC.
++
++config ARCH_MV78XX0
++	bool "Marvell MV78xx0"
++	select CPU_FEROCEON
++	select PCI
++	select ARCH_REQUIRE_GPIOLIB
++	select GENERIC_CLOCKEVENTS
++	select PLAT_ORION
++	help
++	  Support for the following Marvell MV78xx0 series SoCs:
++	  MV781x0, MV782x0.
++
++config ARCH_ORION5X
++	bool "Marvell Orion"
++	depends on MMU
++	select CPU_FEROCEON
++	select PCI
++	select ARCH_REQUIRE_GPIOLIB
++	select GENERIC_CLOCKEVENTS
++	select PLAT_ORION
++	help
++	  Support for the following Marvell Orion 5x series SoCs:
++	  Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
++	  Orion-2 (5281), Orion-1-90 (6183).
++
++config ARCH_MMP
++	bool "Marvell PXA168/910/MMP2"
++	depends on MMU
++	select ARCH_REQUIRE_GPIOLIB
++	select COMMON_CLKDEV
++	select GENERIC_CLOCKEVENTS
++	select TICK_ONESHOT
++	select PLAT_PXA
++	help
++	  Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
++
++config ARCH_KS8695
++	bool "Micrel/Kendin KS8695"
++	select CPU_ARM922T
++	select ARCH_REQUIRE_GPIOLIB
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
++	  System-on-Chip devices.
++
++config ARCH_NS9XXX
++	bool "NetSilicon NS9xxx"
++	select CPU_ARM926T
++	select GENERIC_GPIO
++	select GENERIC_CLOCKEVENTS
++	select HAVE_CLK
++	help
++	  Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
++	  System.
++
++	  <http://www.digi.com/products/microprocessors/index.jsp>
++
++config ARCH_W90X900
++	bool "Nuvoton W90X900 CPU"
++	select CPU_ARM926T
++	select ARCH_REQUIRE_GPIOLIB
++	select COMMON_CLKDEV
++	select GENERIC_CLOCKEVENTS
++	help
++	  Support for Nuvoton (Winbond logic dept.) ARM9 processor,
++	  At present, the w90x900 has been renamed nuc900, regarding
++	  the ARM series product line, you can login the following
++	  link address to know more.
++
++	  <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
++		ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
++
++config ARCH_NUC93X
++	bool "Nuvoton NUC93X CPU"
++	select CPU_ARM926T
++	select COMMON_CLKDEV
++	help
++	  Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
++	  low-power and high performance MPEG-4/JPEG multimedia controller chip.
++
++config ARCH_PNX4008
++	bool "Philips Nexperia PNX4008 Mobile"
++	select CPU_ARM926T
++	select COMMON_CLKDEV
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  This enables support for Philips PNX4008 mobile platform.
++
++config ARCH_PXA
++	bool "PXA2xx/PXA3xx-based"
++	depends on MMU
++	select ARCH_MTD_XIP
++	select ARCH_HAS_CPUFREQ
++	select COMMON_CLKDEV
++	select ARCH_REQUIRE_GPIOLIB
++	select GENERIC_CLOCKEVENTS
++	select TICK_ONESHOT
++	select PLAT_PXA
++	help
++	  Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
++
++config ARCH_MSM
++	bool "Qualcomm MSM"
++	select HAVE_CLK
++	select GENERIC_CLOCKEVENTS
++	help
++	  Support for Qualcomm MSM/QSD based systems.  This runs on the
++	  apps processor of the MSM/QSD and depends on a shared memory
++	  interface to the modem processor which runs the baseband
++	  stack and controls some vital subsystems
++	  (clock and power control, etc).
++
++config ARCH_SHMOBILE
++	bool "Renesas SH-Mobile"
++	help
++	  Support for Renesas's SH-Mobile ARM platforms
++
++config ARCH_RPC
++	bool "RiscPC"
++	select ARCH_ACORN
++	select FIQ
++	select TIMER_ACORN
++	select ARCH_MAY_HAVE_PC_FDC
++	select HAVE_PATA_PLATFORM
++	select ISA_DMA_API
++	select NO_IOPORT
++	select ARCH_SPARSEMEM_ENABLE
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  On the Acorn Risc-PC, Linux can support the internal IDE disk and
++	  CD-ROM interface, serial and parallel port, and the floppy drive.
++
++config ARCH_SA1100
++	bool "SA1100-based"
++	select CPU_SA1100
++	select ISA
++	select ARCH_SPARSEMEM_ENABLE
++	select ARCH_MTD_XIP
++	select ARCH_HAS_CPUFREQ
++	select CPU_FREQ
++	select GENERIC_CLOCKEVENTS
++	select HAVE_CLK
++	select TICK_ONESHOT
++	select ARCH_REQUIRE_GPIOLIB
++	help
++	  Support for StrongARM 11x0 based boards.
++
++config ARCH_S3C2410
++	bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
++	select GENERIC_GPIO
++	select ARCH_HAS_CPUFREQ
++	select HAVE_CLK
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  Samsung S3C2410X CPU based systems, such as the Simtec Electronics
++	  BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
++	  the Samsung SMDK2410 development board (and derivatives).
++
++	  Note, the S3C2416 and the S3C2450 are so close that they even share
++	  the same SoC ID code. This means that there is no seperate machine
++	  directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
++
++config ARCH_S3C64XX
++	bool "Samsung S3C64XX"
++	select PLAT_SAMSUNG
++	select CPU_V6
++	select ARM_VIC
++	select HAVE_CLK
++	select NO_IOPORT
++	select ARCH_USES_GETTIMEOFFSET
++	select ARCH_HAS_CPUFREQ
++	select ARCH_REQUIRE_GPIOLIB
++	select SAMSUNG_CLKSRC
++	select SAMSUNG_IRQ_VIC_TIMER
++	select SAMSUNG_IRQ_UART
++	select S3C_GPIO_TRACK
++	select S3C_GPIO_PULL_UPDOWN
++	select S3C_GPIO_CFG_S3C24XX
++	select S3C_GPIO_CFG_S3C64XX
++	select S3C_DEV_NAND
++	select USB_ARCH_HAS_OHCI
++	select SAMSUNG_GPIOLIB_4BIT
++	help
++	  Samsung S3C64XX series based systems
++
++config ARCH_S5P6440
++	bool "Samsung S5P6440"
++	select CPU_V6
++	select GENERIC_GPIO
++	select HAVE_CLK
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  Samsung S5P6440 CPU based systems
++
++config ARCH_S5P6442
++	bool "Samsung S5P6442"
++	select CPU_V6
++	select GENERIC_GPIO
++	select HAVE_CLK
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  Samsung S5P6442 CPU based systems
++
++config ARCH_S5PC100
++	bool "Samsung S5PC100"
++	select GENERIC_GPIO
++	select HAVE_CLK
++	select CPU_V7
++	select ARM_L1_CACHE_SHIFT_6
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  Samsung S5PC100 series based systems
++
++config ARCH_S5PV210
++	bool "Samsung S5PV210/S5PC110"
++	select CPU_V7
++	select GENERIC_GPIO
++	select HAVE_CLK
++	select ARM_L1_CACHE_SHIFT_6
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  Samsung S5PV210/S5PC110 series based systems
++
++config ARCH_SHARK
++	bool "Shark"
++	select CPU_SA110
++	select ISA
++	select ISA_DMA
++	select ZONE_DMA
++	select PCI
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  Support for the StrongARM based Digital DNARD machine, also known
++	  as "Shark" (<http://www.shark-linux.de/shark.html>).
++
++config ARCH_LH7A40X
++	bool "Sharp LH7A40X"
++	select CPU_ARM922T
++	select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM
++	select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
++	select ARCH_USES_GETTIMEOFFSET
++	help
++	  Say Y here for systems based on one of the Sharp LH7A40X
++	  System on a Chip processors.  These CPUs include an ARM922T
++	  core with a wide array of integrated devices for
++	  hand-held and low-power applications.
++
++config ARCH_U300
++	bool "ST-Ericsson U300 Series"
++	depends on MMU
++	select CPU_ARM926T
++	select HAVE_TCM
++	select ARM_AMBA
++	select ARM_VIC
++	select GENERIC_CLOCKEVENTS
++	select COMMON_CLKDEV
++	select GENERIC_GPIO
++	help
++	  Support for ST-Ericsson U300 series mobile platforms.
++
++config ARCH_U8500
++	bool "ST-Ericsson U8500 Series"
++	select CPU_V7
++	select ARM_AMBA
++	select GENERIC_CLOCKEVENTS
++	select COMMON_CLKDEV
++	select ARCH_REQUIRE_GPIOLIB
++	help
++	  Support for ST-Ericsson's Ux500 architecture
++
++config ARCH_NOMADIK
++	bool "STMicroelectronics Nomadik"
++	select ARM_AMBA
++	select ARM_VIC
++	select CPU_ARM926T
++	select COMMON_CLKDEV
++	select GENERIC_CLOCKEVENTS
++	select ARCH_REQUIRE_GPIOLIB
++	help
++	  Support for the Nomadik platform by ST-Ericsson
++
++config ARCH_DAVINCI
++	bool "TI DaVinci"
++	select GENERIC_CLOCKEVENTS
++	select ARCH_REQUIRE_GPIOLIB
++	select ZONE_DMA
++	select HAVE_IDE
++	select COMMON_CLKDEV
++	select GENERIC_ALLOCATOR
++	select ARCH_HAS_HOLES_MEMORYMODEL
++	help
++	  Support for TI's DaVinci platform.
++
++config ARCH_OMAP
++	bool "TI OMAP"
++	select HAVE_CLK
++	select ARCH_REQUIRE_GPIOLIB
++	select ARCH_HAS_CPUFREQ
++	select GENERIC_CLOCKEVENTS
++	select ARCH_HAS_HOLES_MEMORYMODEL
++	help
++	  Support for TI's OMAP platform (OMAP1 and OMAP2).
++
++config PLAT_SPEAR
++	bool "ST SPEAr"
++	select ARM_AMBA
++	select ARCH_REQUIRE_GPIOLIB
++	select COMMON_CLKDEV
++	select GENERIC_CLOCKEVENTS
++	select HAVE_CLK
++	help
++	  Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
++
++endchoice
++
++#
++# This is sorted alphabetically by mach-* pathname.  However, plat-*
++# Kconfigs may be included either alphabetically (according to the
++# plat- suffix) or along side the corresponding mach-* source.
++#
++source "arch/arm/mach-aaec2000/Kconfig"
++
++source "arch/arm/mach-at91/Kconfig"
++
++source "arch/arm/mach-bcmring/Kconfig"
++
++source "arch/arm/mach-clps711x/Kconfig"
++
++source "arch/arm/mach-cns3xxx/Kconfig"
++
++source "arch/arm/mach-davinci/Kconfig"
++
++source "arch/arm/mach-dove/Kconfig"
++
++source "arch/arm/mach-ep93xx/Kconfig"
++
++source "arch/arm/mach-footbridge/Kconfig"
++
++source "arch/arm/mach-gemini/Kconfig"
++
++source "arch/arm/mach-h720x/Kconfig"
++
++source "arch/arm/mach-integrator/Kconfig"
++
++source "arch/arm/mach-iop32x/Kconfig"
++
++source "arch/arm/mach-iop33x/Kconfig"
++
++source "arch/arm/mach-iop13xx/Kconfig"
++
++source "arch/arm/mach-ixp4xx/Kconfig"
++
++source "arch/arm/mach-ixp2000/Kconfig"
++
++source "arch/arm/mach-ixp23xx/Kconfig"
++
++source "arch/arm/mach-kirkwood/Kconfig"
++
++source "arch/arm/mach-ks8695/Kconfig"
++
++source "arch/arm/mach-lh7a40x/Kconfig"
++
++source "arch/arm/mach-loki/Kconfig"
++
++source "arch/arm/mach-msm/Kconfig"
++
++source "arch/arm/mach-mv78xx0/Kconfig"
++
++source "arch/arm/plat-mxc/Kconfig"
++
++source "arch/arm/mach-netx/Kconfig"
++
++source "arch/arm/mach-nomadik/Kconfig"
++source "arch/arm/plat-nomadik/Kconfig"
++
++source "arch/arm/mach-ns9xxx/Kconfig"
++
++source "arch/arm/mach-nuc93x/Kconfig"
++
++source "arch/arm/plat-omap/Kconfig"
++
++source "arch/arm/mach-omap1/Kconfig"
++
++source "arch/arm/mach-omap2/Kconfig"
++
++source "arch/arm/mach-orion5x/Kconfig"
++
++source "arch/arm/mach-pxa/Kconfig"
++source "arch/arm/plat-pxa/Kconfig"
++
++source "arch/arm/mach-mmp/Kconfig"
++
++source "arch/arm/mach-realview/Kconfig"
++
++source "arch/arm/mach-sa1100/Kconfig"
++
++source "arch/arm/plat-samsung/Kconfig"
++source "arch/arm/plat-s3c24xx/Kconfig"
++source "arch/arm/plat-s5p/Kconfig"
++
++source "arch/arm/plat-spear/Kconfig"
++
++if ARCH_S3C2410
++source "arch/arm/mach-s3c2400/Kconfig"
++source "arch/arm/mach-s3c2410/Kconfig"
++source "arch/arm/mach-s3c2412/Kconfig"
++source "arch/arm/mach-s3c2416/Kconfig"
++source "arch/arm/mach-s3c2440/Kconfig"
++source "arch/arm/mach-s3c2443/Kconfig"
++endif
++
++if ARCH_S3C64XX
++source "arch/arm/mach-s3c64xx/Kconfig"
++endif
++
++source "arch/arm/mach-s5p6440/Kconfig"
++
++source "arch/arm/mach-s5p6442/Kconfig"
++
++source "arch/arm/mach-s5pc100/Kconfig"
++
++source "arch/arm/mach-s5pv210/Kconfig"
++
++source "arch/arm/mach-shmobile/Kconfig"
++
++source "arch/arm/plat-stmp3xxx/Kconfig"
++
++source "arch/arm/mach-u300/Kconfig"
++
++source "arch/arm/mach-ux500/Kconfig"
++
++source "arch/arm/mach-versatile/Kconfig"
++
++source "arch/arm/mach-vexpress/Kconfig"
++
++source "arch/arm/mach-w90x900/Kconfig"
++
++# Definitions to make life easier
++config ARCH_ACORN
++	bool
++
++config PLAT_IOP
++	bool
++	select GENERIC_CLOCKEVENTS
++
++config PLAT_ORION
++	bool
++
++config PLAT_PXA
++	bool
++
++config PLAT_VERSATILE
++	bool
++
++config ARM_TIMER_SP804
++	bool
++
++source arch/arm/mm/Kconfig
++
++config IWMMXT
++	bool "Enable iWMMXt support"
++	depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
++	default y if PXA27x || PXA3xx || ARCH_MMP
++	help
++	  Enable support for iWMMXt context switching at run time if
++	  running on a CPU that supports it.
++
++#  bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
++config XSCALE_PMU
++	bool
++	depends on CPU_XSCALE && !XSCALE_PMU_TIMER
++	default y
++
++config CPU_HAS_PMU
++	depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
++		   (!ARCH_OMAP3 || OMAP3_EMU)
++	default y
++	bool
++
++if !MMU
++source "arch/arm/Kconfig-nommu"
++endif
++
++config ARM_ERRATA_411920
++	bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
++	depends on CPU_V6 && !SMP
++	help
++	  Invalidation of the Instruction Cache operation can
++	  fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
++	  It does not affect the MPCore. This option enables the ARM Ltd.
++	  recommended workaround.
++
++config ARM_ERRATA_430973
++	bool "ARM errata: Stale prediction on replaced interworking branch"
++	depends on CPU_V7
++	help
++	  This option enables the workaround for the 430973 Cortex-A8
++	  (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
++	  interworking branch is replaced with another code sequence at the
++	  same virtual address, whether due to self-modifying code or virtual
++	  to physical address re-mapping, Cortex-A8 does not recover from the
++	  stale interworking branch prediction. This results in Cortex-A8
++	  executing the new code sequence in the incorrect ARM or Thumb state.
++	  The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
++	  and also flushes the branch target cache at every context switch.
++	  Note that setting specific bits in the ACTLR register may not be
++	  available in non-secure mode.
++
++config ARM_ERRATA_458693
++	bool "ARM errata: Processor deadlock when a false hazard is created"
++	depends on CPU_V7
++	help
++	  This option enables the workaround for the 458693 Cortex-A8 (r2p0)
++	  erratum. For very specific sequences of memory operations, it is
++	  possible for a hazard condition intended for a cache line to instead
++	  be incorrectly associated with a different cache line. This false
++	  hazard might then cause a processor deadlock. The workaround enables
++	  the L1 caching of the NEON accesses and disables the PLD instruction
++	  in the ACTLR register. Note that setting specific bits in the ACTLR
++	  register may not be available in non-secure mode.
++
++config ARM_ERRATA_460075
++	bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
++	depends on CPU_V7
++	help
++	  This option enables the workaround for the 460075 Cortex-A8 (r2p0)
++	  erratum. Any asynchronous access to the L2 cache may encounter a
++	  situation in which recent store transactions to the L2 cache are lost
++	  and overwritten with stale memory contents from external memory. The
++	  workaround disables the write-allocate mode for the L2 cache via the
++	  ACTLR register. Note that setting specific bits in the ACTLR register
++	  may not be available in non-secure mode.
++
++config PL310_ERRATA_588369
++	bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
++	depends on CACHE_L2X0 && ARCH_OMAP4
++	help
++	   The PL310 L2 cache controller implements three types of Clean &
++	   Invalidate maintenance operations: by Physical Address
++	   (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
++	   They are architecturally defined to behave as the execution of a
++	   clean operation followed immediately by an invalidate operation,
++	   both performing to the same memory location. This functionality
++	   is not correctly implemented in PL310 as clean lines are not
++	   invalidated as a result of these operations. Note that this errata
++	   uses Texas Instrument's secure monitor api.
++
++config ARM_ERRATA_720789
++	bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
++	depends on CPU_V7 && SMP
++	help
++	  This option enables the workaround for the 720789 Cortex-A9 (prior to
++	  r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
++	  broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
++	  As a consequence of this erratum, some TLB entries which should be
++	  invalidated are not, resulting in an incoherency in the system page
++	  tables. The workaround changes the TLB flushing routines to invalidate
++	  entries regardless of the ASID.
++endmenu
++
++source "arch/arm/common/Kconfig"
++
++config FORCE_MAX_ZONEORDER
++	int
++	depends on SA1111
++	default "9"
++
++menu "Bus support"
++
++config ARM_AMBA
++	bool
++
++config ISA
++	bool
++	help
++	  Find out whether you have ISA slots on your motherboard.  ISA is the
++	  name of a bus system, i.e. the way the CPU talks to the other stuff
++	  inside your box.  Other bus systems are PCI, EISA, MicroChannel
++	  (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
++	  newer boards don't support it.  If you have ISA, say Y, otherwise N.
++
++# Select ISA DMA controller support
++config ISA_DMA
++	bool
++	select ISA_DMA_API
++
++# Select ISA DMA interface
++config ISA_DMA_API
++	bool
++
++config PCI
++	bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE
++	help
++	  Find out whether you have a PCI motherboard. PCI is the name of a
++	  bus system, i.e. the way the CPU talks to the other stuff inside
++	  your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
++	  VESA. If you have PCI, say Y, otherwise N.
++
++config PCI_DOMAINS
++	bool
++	depends on PCI
++
++config PCI_SYSCALL
++	def_bool PCI
++
++# Select the host bridge type
++config PCI_HOST_VIA82C505
++	bool
++	depends on PCI && ARCH_SHARK
++	default y
++
++config PCI_HOST_ITE8152
++	bool
++	depends on PCI && MACH_ARMCORE
++	default y
++	select DMABOUNCE
++
++source "drivers/pci/Kconfig"
++
++source "drivers/pcmcia/Kconfig"
++
++endmenu
++
++menu "Kernel Features"
++
++source "kernel/time/Kconfig"
++
++config SMP
++	bool "Symmetric Multi-Processing (EXPERIMENTAL)"
++	depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP ||\
++		 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 ||\
++		 ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
++	depends on GENERIC_CLOCKEVENTS
++	select USE_GENERIC_SMP_HELPERS
++	select HAVE_ARM_SCU if (ARCH_REALVIEW || ARCH_OMAP4 || ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
++	help
++	  This enables support for systems with more than one CPU. If you have
++	  a system with only one CPU, like most personal computers, say N. If
++	  you have a system with more than one CPU, say Y.
++
++	  If you say N here, the kernel will run on single and multiprocessor
++	  machines, but will use only one CPU of a multiprocessor machine. If
++	  you say Y here, the kernel will run on many, but not all, single
++	  processor machines. On a single processor machine, the kernel will
++	  run faster if you say N here.
++
++	  See also <file:Documentation/i386/IO-APIC.txt>,
++	  <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
++	  <http://www.linuxdoc.org/docs.html#howto>.
++
++	  If you don't know what to do here, say N.
++
++config HAVE_ARM_SCU
++	bool
++	depends on SMP
++	help
++	  This option enables support for the ARM system coherency unit
++
++config HAVE_ARM_TWD
++	bool
++	depends on SMP
++	help
++	  This options enables support for the ARM timer and watchdog unit
++
++choice
++	prompt "Memory split"
++	default VMSPLIT_3G
++	help
++	  Select the desired split between kernel and user memory.
++
++	  If you are not absolutely sure what you are doing, leave this
++	  option alone!
++
++	config VMSPLIT_3G
++		bool "3G/1G user/kernel split"
++	config VMSPLIT_2G
++		bool "2G/2G user/kernel split"
++	config VMSPLIT_1G
++		bool "1G/3G user/kernel split"
++endchoice
++
++config PAGE_OFFSET
++	hex
++	default 0x40000000 if VMSPLIT_1G
++	default 0x80000000 if VMSPLIT_2G
++	default 0xC0000000
++
++config NR_CPUS
++	int "Maximum number of CPUs (2-32)"
++	range 2 32
++	depends on SMP
++	default "4"
++
++config HOTPLUG_CPU
++	bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
++	depends on SMP && HOTPLUG && EXPERIMENTAL
++	help
++	  Say Y here to experiment with turning CPUs off and on.  CPUs
++	  can be controlled through /sys/devices/system/cpu.
++
++config LOCAL_TIMERS
++	bool "Use local timer interrupts"
++	depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \
++		REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || ARCH_U8500)
++	default y
++	select HAVE_ARM_TWD if (ARCH_REALVIEW || ARCH_OMAP4 || ARCH_U8500)
++	help
++	  Enable support for local timers on SMP platforms, rather then the
++	  legacy IPI broadcast method.  Local timers allows the system
++	  accounting to be spread across the timer interval, preventing a
++	  "thundering herd" at every timer tick.
++
++source kernel/Kconfig.preempt
++
++config HZ
++	int
++	default 128 if ARCH_L7200
++	default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210
++	default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
++	default AT91_TIMER_HZ if ARCH_AT91
++	default 100
++
++config THUMB2_KERNEL
++	bool "Compile the kernel in Thumb-2 mode"
++	depends on CPU_V7 && EXPERIMENTAL
++	select AEABI
++	select ARM_ASM_UNIFIED
++	help
++	  By enabling this option, the kernel will be compiled in
++	  Thumb-2 mode. A compiler/assembler that understand the unified
++	  ARM-Thumb syntax is needed.
++
++	  If unsure, say N.
++
++config ARM_ASM_UNIFIED
++	bool
++
++config AEABI
++	bool "Use the ARM EABI to compile the kernel"
++	help
++	  This option allows for the kernel to be compiled using the latest
++	  ARM ABI (aka EABI).  This is only useful if you are using a user
++	  space environment that is also compiled with EABI.
++
++	  Since there are major incompatibilities between the legacy ABI and
++	  EABI, especially with regard to structure member alignment, this
++	  option also changes the kernel syscall calling convention to
++	  disambiguate both ABIs and allow for backward compatibility support
++	  (selected with CONFIG_OABI_COMPAT).
++
++	  To use this you need GCC version 4.0.0 or later.
++
++config OABI_COMPAT
++	bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
++	depends on AEABI && EXPERIMENTAL
++	default y
++	help
++	  This option preserves the old syscall interface along with the
++	  new (ARM EABI) one. It also provides a compatibility layer to
++	  intercept syscalls that have structure arguments which layout
++	  in memory differs between the legacy ABI and the new ARM EABI
++	  (only for non "thumb" binaries). This option adds a tiny
++	  overhead to all syscalls and produces a slightly larger kernel.
++	  If you know you'll be using only pure EABI user space then you
++	  can say N here. If this option is not selected and you attempt
++	  to execute a legacy ABI binary then the result will be
++	  UNPREDICTABLE (in fact it can be predicted that it won't work
++	  at all). If in doubt say Y.
++
++config ARCH_HAS_HOLES_MEMORYMODEL
++	bool
++
++# Discontigmem is deprecated
++config ARCH_DISCONTIGMEM_ENABLE
++	bool
++
++config ARCH_SPARSEMEM_ENABLE
++	bool
++
++config ARCH_SPARSEMEM_DEFAULT
++	def_bool ARCH_SPARSEMEM_ENABLE
++
++config ARCH_SELECT_MEMORY_MODEL
++	def_bool ARCH_DISCONTIGMEM_ENABLE && ARCH_SPARSEMEM_ENABLE
++
++config NODES_SHIFT
++	int
++	default "4" if ARCH_LH7A40X
++	default "2"
++	depends on NEED_MULTIPLE_NODES
++
++config HIGHMEM
++	bool "High Memory Support (EXPERIMENTAL)"
++	depends on MMU && EXPERIMENTAL
++	help
++	  The address space of ARM processors is only 4 Gigabytes large
++	  and it has to accommodate user address space, kernel address
++	  space as well as some memory mapped IO. That means that, if you
++	  have a large amount of physical memory and/or IO, not all of the
++	  memory can be "permanently mapped" by the kernel. The physical
++	  memory that is not permanently mapped is called "high memory".
++
++	  Depending on the selected kernel/user memory split, minimum
++	  vmalloc space and actual amount of RAM, you may not need this
++	  option which should result in a slightly faster kernel.
++
++	  If unsure, say n.
++
++config HIGHPTE
++	bool "Allocate 2nd-level pagetables from highmem"
++	depends on HIGHMEM
++	depends on !OUTER_CACHE
++
++config HW_PERF_EVENTS
++	bool "Enable hardware performance counter support for perf events"
++	depends on PERF_EVENTS && CPU_HAS_PMU
++	default y
++	help
++	  Enable hardware performance counter support for perf events. If
++	  disabled, perf events will use software events only.
++
++source "mm/Kconfig"
++
++config LEDS
++	bool "Timer and CPU usage LEDs"
++	depends on ARCH_CDB89712 || ARCH_EBSA110 || \
++		   ARCH_EBSA285 || ARCH_INTEGRATOR || \
++		   ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
++		   ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
++		   ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
++		   ARCH_AT91 || ARCH_DAVINCI || \
++		   ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
++	help
++	  If you say Y here, the LEDs on your machine will be used
++	  to provide useful information about your current system status.
++
++	  If you are compiling a kernel for a NetWinder or EBSA-285, you will
++	  be able to select which LEDs are active using the options below. If
++	  you are compiling a kernel for the EBSA-110 or the LART however, the
++	  red LED will simply flash regularly to indicate that the system is
++	  still functional. It is safe to say Y here if you have a CATS
++	  system, but the driver will do nothing.
++
++config LEDS_TIMER
++	bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
++			    OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
++			    || MACH_OMAP_PERSEUS2
++	depends on LEDS
++	depends on !GENERIC_CLOCKEVENTS
++	default y if ARCH_EBSA110
++	help
++	  If you say Y here, one of the system LEDs (the green one on the
++	  NetWinder, the amber one on the EBSA285, or the red one on the LART)
++	  will flash regularly to indicate that the system is still
++	  operational. This is mainly useful to kernel hackers who are
++	  debugging unstable kernels.
++
++	  The LART uses the same LED for both Timer LED and CPU usage LED
++	  functions. You may choose to use both, but the Timer LED function
++	  will overrule the CPU usage LED.
++
++config LEDS_CPU
++	bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
++			!ARCH_OMAP) \
++			|| OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
++			|| MACH_OMAP_PERSEUS2
++	depends on LEDS
++	help
++	  If you say Y here, the red LED will be used to give a good real
++	  time indication of CPU usage, by lighting whenever the idle task
++	  is not currently executing.
++
++	  The LART uses the same LED for both Timer LED and CPU usage LED
++	  functions. You may choose to use both, but the Timer LED function
++	  will overrule the CPU usage LED.
++
++config ALIGNMENT_TRAP
++	bool
++	depends on CPU_CP15_MMU
++	default y if !ARCH_EBSA110
++	select HAVE_PROC_CPU if PROC_FS
++	help
++	  ARM processors cannot fetch/store information which is not
++	  naturally aligned on the bus, i.e., a 4 byte fetch must start at an
++	  address divisible by 4. On 32-bit ARM processors, these non-aligned
++	  fetch/store instructions will be emulated in software if you say
++	  here, which has a severe performance impact. This is necessary for
++	  correct operation of some network protocols. With an IP-only
++	  configuration it is safe to say N, otherwise say Y.
++
++config UACCESS_WITH_MEMCPY
++	bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
++	depends on MMU && EXPERIMENTAL
++	default y if CPU_FEROCEON
++	help
++	  Implement faster copy_to_user and clear_user methods for CPU
++	  cores where a 8-word STM instruction give significantly higher
++	  memory write throughput than a sequence of individual 32bit stores.
++
++	  A possible side effect is a slight increase in scheduling latency
++	  between threads sharing the same address space if they invoke
++	  such copy operations with large buffers.
++
++	  However, if the CPU data cache is using a write-allocate mode,
++	  this option is unlikely to provide any performance gain.
++
++endmenu
++
++menu "Boot options"
++
++# Compressed boot loader in ROM.  Yes, we really want to ask about
++# TEXT and BSS so we preserve their values in the config files.
++config ZBOOT_ROM_TEXT
++	hex "Compressed ROM boot loader base address"
++	default "0"
++	help
++	  The physical address at which the ROM-able zImage is to be
++	  placed in the target.  Platforms which normally make use of
++	  ROM-able zImage formats normally set this to a suitable
++	  value in their defconfig file.
++
++	  If ZBOOT_ROM is not enabled, this has no effect.
++
++config ZBOOT_ROM_BSS
++	hex "Compressed ROM boot loader BSS address"
++	default "0"
++	help
++	  The base address of an area of read/write memory in the target
++	  for the ROM-able zImage which must be available while the
++	  decompressor is running. It must be large enough to hold the
++	  entire decompressed kernel plus an additional 128 KiB.
++	  Platforms which normally make use of ROM-able zImage formats
++	  normally set this to a suitable value in their defconfig file.
++
++	  If ZBOOT_ROM is not enabled, this has no effect.
++
++config ZBOOT_ROM
++	bool "Compressed boot loader in ROM/flash"
++	depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
++	help
++	  Say Y here if you intend to execute your compressed kernel image
++	  (zImage) directly from ROM or flash.  If unsure, say N.
++
++config CMDLINE
++	string "Default kernel command string"
++	default ""
++	help
++	  On some architectures (EBSA110 and CATS), there is currently no way
++	  for the boot loader to pass arguments to the kernel. For these
++	  architectures, you should supply some command-line options at build
++	  time by entering them here. As a minimum, you should specify the
++	  memory size and the root device (e.g., mem=64M root=/dev/nfs).
++
++config CMDLINE_FORCE
++	bool "Always use the default kernel command string"
++	depends on CMDLINE != ""
++	help
++	  Always use the default kernel command string, even if the boot
++	  loader passes other arguments to the kernel.
++	  This is useful if you cannot or don't want to change the
++	  command-line options your boot loader passes to the kernel.
++
++	  If unsure, say N.
++
++config XIP_KERNEL
++	bool "Kernel Execute-In-Place from ROM"
++	depends on !ZBOOT_ROM
++	help
++	  Execute-In-Place allows the kernel to run from non-volatile storage
++	  directly addressable by the CPU, such as NOR flash. This saves RAM
++	  space since the text section of the kernel is not loaded from flash
++	  to RAM.  Read-write sections, such as the data section and stack,
++	  are still copied to RAM.  The XIP kernel is not compressed since
++	  it has to run directly from flash, so it will take more space to
++	  store it.  The flash address used to link the kernel object files,
++	  and for storing it, is configuration dependent. Therefore, if you
++	  say Y here, you must know the proper physical address where to
++	  store the kernel image depending on your own flash memory usage.
++
++	  Also note that the make target becomes "make xipImage" rather than
++	  "make zImage" or "make Image".  The final kernel binary to put in
++	  ROM memory will be arch/arm/boot/xipImage.
++
++	  If unsure, say N.
++
++config XIP_PHYS_ADDR
++	hex "XIP Kernel Physical Location"
++	depends on XIP_KERNEL
++	default "0x00080000"
++	help
++	  This is the physical address in your flash memory the kernel will
++	  be linked for and stored to.  This address is dependent on your
++	  own flash usage.
++
++config KEXEC
++	bool "Kexec system call (EXPERIMENTAL)"
++	depends on EXPERIMENTAL
++	help
++	  kexec is a system call that implements the ability to shutdown your
++	  current kernel, and to start another kernel.  It is like a reboot
++	  but it is independent of the system firmware.   And like a reboot
++	  you can start any kernel with it, not just Linux.
++
++	  It is an ongoing process to be certain the hardware in a machine
++	  is properly shutdown, so do not be surprised if this code does not
++	  initially work for you.  It may help to enable device hotplugging
++	  support.
++
++config ATAGS_PROC
++	bool "Export atags in procfs"
++	depends on KEXEC
++	default y
++	help
++	  Should the atags used to boot the kernel be exported in an "atags"
++	  file in procfs. Useful with kexec.
++
++endmenu
++
++menu "CPU Power Management"
++
++if ARCH_HAS_CPUFREQ
++
++source "drivers/cpufreq/Kconfig"
++
++config CPU_FREQ_SA1100
++	bool
++
++config CPU_FREQ_SA1110
++	bool
++
++config CPU_FREQ_INTEGRATOR
++	tristate "CPUfreq driver for ARM Integrator CPUs"
++	depends on ARCH_INTEGRATOR && CPU_FREQ
++	default y
++	help
++	  This enables the CPUfreq driver for ARM Integrator CPUs.
++
++	  For details, take a look at <file:Documentation/cpu-freq>.
++
++	  If in doubt, say Y.
++
++config CPU_FREQ_PXA
++	bool
++	depends on CPU_FREQ && ARCH_PXA && PXA25x
++	default y
++	select CPU_FREQ_DEFAULT_GOV_USERSPACE
++
++config CPU_FREQ_S3C64XX
++	bool "CPUfreq support for Samsung S3C64XX CPUs"
++	depends on CPU_FREQ && CPU_S3C6410
++
++config CPU_FREQ_S3C
++	bool
++	help
++	  Internal configuration node for common cpufreq on Samsung SoC
++
++config CPU_FREQ_S3C24XX
++	bool "CPUfreq driver for Samsung S3C24XX series CPUs"
++	depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
++	select CPU_FREQ_S3C
++	help
++	  This enables the CPUfreq driver for the Samsung S3C24XX family
++	  of CPUs.
++
++	  For details, take a look at <file:Documentation/cpu-freq>.
++
++	  If in doubt, say N.
++
++config CPU_FREQ_S3C24XX_PLL
++	bool "Support CPUfreq changing of PLL frequency"
++	depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
++	help
++	  Compile in support for changing the PLL frequency from the
++	  S3C24XX series CPUfreq driver. The PLL takes time to settle
++	  after a frequency change, so by default it is not enabled.
++
++	  This also means that the PLL tables for the selected CPU(s) will
++	  be built which may increase the size of the kernel image.
++
++config CPU_FREQ_S3C24XX_DEBUG
++	bool "Debug CPUfreq Samsung driver core"
++	depends on CPU_FREQ_S3C24XX
++	help
++	  Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
++
++config CPU_FREQ_S3C24XX_IODEBUG
++	bool "Debug CPUfreq Samsung driver IO timing"
++	depends on CPU_FREQ_S3C24XX
++	help
++	  Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
++
++config CPU_FREQ_S3C24XX_DEBUGFS
++	bool "Export debugfs for CPUFreq"
++	depends on CPU_FREQ_S3C24XX && DEBUG_FS
++	help
++	  Export status information via debugfs.
++
++endif
++
++source "drivers/cpuidle/Kconfig"
++
++endmenu
++
++menu "Floating point emulation"
++
++comment "At least one emulation must be selected"
++
++config FPE_NWFPE
++	bool "NWFPE math emulation"
++	depends on !AEABI || OABI_COMPAT
++	---help---
++	  Say Y to include the NWFPE floating point emulator in the kernel.
++	  This is necessary to run most binaries. Linux does not currently
++	  support floating point hardware so you need to say Y here even if
++	  your machine has an FPA or floating point co-processor podule.
++
++	  You may say N here if you are going to load the Acorn FPEmulator
++	  early in the bootup.
++
++config FPE_NWFPE_XP
++	bool "Support extended precision"
++	depends on FPE_NWFPE
++	help
++	  Say Y to include 80-bit support in the kernel floating-point
++	  emulator.  Otherwise, only 32 and 64-bit support is compiled in.
++	  Note that gcc does not generate 80-bit operations by default,
++	  so in most cases this option only enlarges the size of the
++	  floating point emulator without any good reason.
++
++	  You almost surely want to say N here.
++
++config FPE_FASTFPE
++	bool "FastFPE math emulation (EXPERIMENTAL)"
++	depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
++	---help---
++	  Say Y here to include the FAST floating point emulator in the kernel.
++	  This is an experimental much faster emulator which now also has full
++	  precision for the mantissa.  It does not support any exceptions.
++	  It is very simple, and approximately 3-6 times faster than NWFPE.
++
++	  It should be sufficient for most programs.  It may be not suitable
++	  for scientific calculations, but you have to check this for yourself.
++	  If you do not feel you need a faster FP emulation you should better
++	  choose NWFPE.
++
++config VFP
++	bool "VFP-format floating point maths"
++	depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
++	help
++	  Say Y to include VFP support code in the kernel. This is needed
++	  if your hardware includes a VFP unit.
++
++	  Please see <file:Documentation/arm/VFP/release-notes.txt> for
++	  release notes and additional status information.
++
++	  Say N if your target does not have VFP hardware.
++
++config VFPv3
++	bool
++	depends on VFP
++	default y if CPU_V7
++
++config NEON
++	bool "Advanced SIMD (NEON) Extension support"
++	depends on VFPv3 && CPU_V7
++	help
++	  Say Y to include support code for NEON, the ARMv7 Advanced SIMD
++	  Extension.
++
++endmenu
++
++menu "Userspace binary formats"
++
++source "fs/Kconfig.binfmt"
++
++config ARTHUR
++	tristate "RISC OS personality"
++	depends on !AEABI
++	help
++	  Say Y here to include the kernel code necessary if you want to run
++	  Acorn RISC OS/Arthur binaries under Linux. This code is still very
++	  experimental; if this sounds frightening, say N and sleep in peace.
++	  You can also say M here to compile this support as a module (which
++	  will be called arthur).
++
++endmenu
++
++menu "Power management options"
++
++source "kernel/power/Kconfig"
++
++config ARCH_SUSPEND_POSSIBLE
++	def_bool y
++
++endmenu
++
++source "net/Kconfig"
++
++source "drivers/Kconfig"
++
++source "fs/Kconfig"
++
++source "arch/arm/Kconfig.debug"
++
++source "security/Kconfig"
++
++source "crypto/Kconfig"
++
++source "lib/Kconfig"
+diff -rupN linux-2.6.35.11/arch/arm/kernel/bios32.c linux-2.6.35.11-ts7500/arch/arm/kernel/bios32.c
+--- linux-2.6.35.11/arch/arm/kernel/bios32.c	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/kernel/bios32.c	2011-03-14 11:18:24.000000000 -0400
+@@ -360,7 +360,7 @@ pbus_assign_bus_resources(struct pci_bus
+  * pcibios_fixup_bus - Called after each bus is probed,
+  * but before its children are examined.
+  */
+-void pcibios_fixup_bus(struct pci_bus *bus)
++void __devinit pcibios_fixup_bus(struct pci_bus *bus)
+ {
+ 	struct pci_sys_data *root = bus->sysdata;
+ 	struct pci_dev *dev;
+diff -rupN linux-2.6.35.11/arch/arm/kernel/entry-armv.S linux-2.6.35.11-ts7500/arch/arm/kernel/entry-armv.S
+--- linux-2.6.35.11/arch/arm/kernel/entry-armv.S	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/kernel/entry-armv.S	2011-03-14 11:18:24.000000000 -0400
+@@ -30,6 +30,11 @@
+  */
+ 	.macro	irq_handler
+ 	get_irqnr_preamble r5, lr
++#ifdef CONFIG_VIC_INTERRUPT
++	get_irqnr_and_base r0, r6, r5, lr
++	mov	r1, sp
++	bl	asm_do_IRQ
++#else   
+ 1:	get_irqnr_and_base r0, r6, r5, lr
+ 	movne	r1, sp
+ 	@
+@@ -37,6 +42,7 @@
+ 	@
+ 	adrne	lr, BSYM(1b)
+ 	bne	asm_do_IRQ
++#endif
+ 
+ #ifdef CONFIG_SMP
+ 	/*
+diff -rupN linux-2.6.35.11/arch/arm/kernel/entry-armv.S.orig linux-2.6.35.11-ts7500/arch/arm/kernel/entry-armv.S.orig
+--- linux-2.6.35.11/arch/arm/kernel/entry-armv.S.orig	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/kernel/entry-armv.S.orig	2011-02-06 14:04:07.000000000 -0500
+@@ -0,0 +1,1249 @@
++/*
++ *  linux/arch/arm/kernel/entry-armv.S
++ *
++ *  Copyright (C) 1996,1997,1998 Russell King.
++ *  ARM700 fix by Matthew Godbolt (linux-user@willothewisp.demon.co.uk)
++ *  nommu support by Hyok S. Choi (hyok.choi@samsung.com)
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ *  Low-level vector interface routines
++ *
++ *  Note:  there is a StrongARM bug in the STMIA rn, {regs}^ instruction
++ *  that causes it to save wrong values...  Be aware!
++ */
++
++#include <asm/memory.h>
++#include <asm/glue.h>
++#include <asm/vfpmacros.h>
++#include <mach/entry-macro.S>
++#include <asm/thread_notify.h>
++#include <asm/unwind.h>
++#include <asm/unistd.h>
++
++#include "entry-header.S"
++
++/*
++ * Interrupt handling.  Preserves r7, r8, r9
++ */
++	.macro	irq_handler
++	get_irqnr_preamble r5, lr
++1:	get_irqnr_and_base r0, r6, r5, lr
++	movne	r1, sp
++	@
++	@ routine called with r0 = irq number, r1 = struct pt_regs *
++	@
++	adrne	lr, BSYM(1b)
++	bne	asm_do_IRQ
++
++#ifdef CONFIG_SMP
++	/*
++	 * XXX
++	 *
++	 * this macro assumes that irqstat (r6) and base (r5) are
++	 * preserved from get_irqnr_and_base above
++	 */
++	test_for_ipi r0, r6, r5, lr
++	movne	r0, sp
++	adrne	lr, BSYM(1b)
++	bne	do_IPI
++
++#ifdef CONFIG_LOCAL_TIMERS
++	test_for_ltirq r0, r6, r5, lr
++	movne	r0, sp
++	adrne	lr, BSYM(1b)
++	bne	do_local_timer
++#endif
++#endif
++
++	.endm
++
++#ifdef CONFIG_KPROBES
++	.section	.kprobes.text,"ax",%progbits
++#else
++	.text
++#endif
++
++/*
++ * Invalid mode handlers
++ */
++	.macro	inv_entry, reason
++	sub	sp, sp, #S_FRAME_SIZE
++ ARM(	stmib	sp, {r1 - lr}		)
++ THUMB(	stmia	sp, {r0 - r12}		)
++ THUMB(	str	sp, [sp, #S_SP]		)
++ THUMB(	str	lr, [sp, #S_LR]		)
++	mov	r1, #\reason
++	.endm
++
++__pabt_invalid:
++	inv_entry BAD_PREFETCH
++	b	common_invalid
++ENDPROC(__pabt_invalid)
++
++__dabt_invalid:
++	inv_entry BAD_DATA
++	b	common_invalid
++ENDPROC(__dabt_invalid)
++
++__irq_invalid:
++	inv_entry BAD_IRQ
++	b	common_invalid
++ENDPROC(__irq_invalid)
++
++__und_invalid:
++	inv_entry BAD_UNDEFINSTR
++
++	@
++	@ XXX fall through to common_invalid
++	@
++
++@
++@ common_invalid - generic code for failed exception (re-entrant version of handlers)
++@
++common_invalid:
++	zero_fp
++
++	ldmia	r0, {r4 - r6}
++	add	r0, sp, #S_PC		@ here for interlock avoidance
++	mov	r7, #-1			@  ""   ""    ""        ""
++	str	r4, [sp]		@ save preserved r0
++	stmia	r0, {r5 - r7}		@ lr_<exception>,
++					@ cpsr_<exception>, "old_r0"
++
++	mov	r0, sp
++	b	bad_mode
++ENDPROC(__und_invalid)
++
++/*
++ * SVC mode handlers
++ */
++
++#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
++#define SPFIX(code...) code
++#else
++#define SPFIX(code...)
++#endif
++
++	.macro	svc_entry, stack_hole=0
++ UNWIND(.fnstart		)
++ UNWIND(.save {r0 - pc}		)
++	sub	sp, sp, #(S_FRAME_SIZE + \stack_hole - 4)
++#ifdef CONFIG_THUMB2_KERNEL
++ SPFIX(	str	r0, [sp]	)	@ temporarily saved
++ SPFIX(	mov	r0, sp		)
++ SPFIX(	tst	r0, #4		)	@ test original stack alignment
++ SPFIX(	ldr	r0, [sp]	)	@ restored
++#else
++ SPFIX(	tst	sp, #4		)
++#endif
++ SPFIX(	subeq	sp, sp, #4	)
++	stmia	sp, {r1 - r12}
++
++	ldmia	r0, {r1 - r3}
++	add	r5, sp, #S_SP - 4	@ here for interlock avoidance
++	mov	r4, #-1			@  ""  ""      ""       ""
++	add	r0, sp, #(S_FRAME_SIZE + \stack_hole - 4)
++ SPFIX(	addeq	r0, r0, #4	)
++	str	r1, [sp, #-4]!		@ save the "real" r0 copied
++					@ from the exception stack
++
++	mov	r1, lr
++
++	@
++	@ We are now ready to fill in the remaining blanks on the stack:
++	@
++	@  r0 - sp_svc
++	@  r1 - lr_svc
++	@  r2 - lr_<exception>, already fixed up for correct return/restart
++	@  r3 - spsr_<exception>
++	@  r4 - orig_r0 (see pt_regs definition in ptrace.h)
++	@
++	stmia	r5, {r0 - r4}
++	.endm
++
++	.align	5
++__dabt_svc:
++	svc_entry
++
++	@
++	@ get ready to re-enable interrupts if appropriate
++	@
++	mrs	r9, cpsr
++	tst	r3, #PSR_I_BIT
++	biceq	r9, r9, #PSR_I_BIT
++
++	@
++	@ Call the processor-specific abort handler:
++	@
++	@  r2 - aborted context pc
++	@  r3 - aborted context cpsr
++	@
++	@ The abort handler must return the aborted address in r0, and
++	@ the fault status register in r1.  r9 must be preserved.
++	@
++#ifdef MULTI_DABORT
++	ldr	r4, .LCprocfns
++	mov	lr, pc
++	ldr	pc, [r4, #PROCESSOR_DABT_FUNC]
++#else
++	bl	CPU_DABORT_HANDLER
++#endif
++
++	@
++	@ set desired IRQ state, then call main handler
++	@
++	msr	cpsr_c, r9
++	mov	r2, sp
++	bl	do_DataAbort
++
++	@
++	@ IRQs off again before pulling preserved data off the stack
++	@
++	disable_irq_notrace
++
++	@
++	@ restore SPSR and restart the instruction
++	@
++	ldr	r2, [sp, #S_PSR]
++	svc_exit r2				@ return from exception
++ UNWIND(.fnend		)
++ENDPROC(__dabt_svc)
++
++	.align	5
++__irq_svc:
++	svc_entry
++
++#ifdef CONFIG_TRACE_IRQFLAGS
++	bl	trace_hardirqs_off
++#endif
++#ifdef CONFIG_PREEMPT
++	get_thread_info tsk
++	ldr	r8, [tsk, #TI_PREEMPT]		@ get preempt count
++	add	r7, r8, #1			@ increment it
++	str	r7, [tsk, #TI_PREEMPT]
++#endif
++
++	irq_handler
++#ifdef CONFIG_PREEMPT
++	str	r8, [tsk, #TI_PREEMPT]		@ restore preempt count
++	ldr	r0, [tsk, #TI_FLAGS]		@ get flags
++	teq	r8, #0				@ if preempt count != 0
++	movne	r0, #0				@ force flags to 0
++	tst	r0, #_TIF_NEED_RESCHED
++	blne	svc_preempt
++#endif
++	ldr	r4, [sp, #S_PSR]		@ irqs are already disabled
++#ifdef CONFIG_TRACE_IRQFLAGS
++	tst	r4, #PSR_I_BIT
++	bleq	trace_hardirqs_on
++#endif
++	svc_exit r4				@ return from exception
++ UNWIND(.fnend		)
++ENDPROC(__irq_svc)
++
++	.ltorg
++
++#ifdef CONFIG_PREEMPT
++svc_preempt:
++	mov	r8, lr
++1:	bl	preempt_schedule_irq		@ irq en/disable is done inside
++	ldr	r0, [tsk, #TI_FLAGS]		@ get new tasks TI_FLAGS
++	tst	r0, #_TIF_NEED_RESCHED
++	moveq	pc, r8				@ go again
++	b	1b
++#endif
++
++	.align	5
++__und_svc:
++#ifdef CONFIG_KPROBES
++	@ If a kprobe is about to simulate a "stmdb sp..." instruction,
++	@ it obviously needs free stack space which then will belong to
++	@ the saved context.
++	svc_entry 64
++#else
++	svc_entry
++#endif
++
++	@
++	@ call emulation code, which returns using r9 if it has emulated
++	@ the instruction, or the more conventional lr if we are to treat
++	@ this as a real undefined instruction
++	@
++	@  r0 - instruction
++	@
++#ifndef	CONFIG_THUMB2_KERNEL
++	ldr	r0, [r2, #-4]
++#else
++	ldrh	r0, [r2, #-2]			@ Thumb instruction at LR - 2
++	and	r9, r0, #0xf800
++	cmp	r9, #0xe800			@ 32-bit instruction if xx >= 0
++	ldrhhs	r9, [r2]			@ bottom 16 bits
++	orrhs	r0, r9, r0, lsl #16
++#endif
++	adr	r9, BSYM(1f)
++	bl	call_fpe
++
++	mov	r0, sp				@ struct pt_regs *regs
++	bl	do_undefinstr
++
++	@
++	@ IRQs off again before pulling preserved data off the stack
++	@
++1:	disable_irq_notrace
++
++	@
++	@ restore SPSR and restart the instruction
++	@
++	ldr	r2, [sp, #S_PSR]		@ Get SVC cpsr
++	svc_exit r2				@ return from exception
++ UNWIND(.fnend		)
++ENDPROC(__und_svc)
++
++	.align	5
++__pabt_svc:
++	svc_entry
++
++	@
++	@ re-enable interrupts if appropriate
++	@
++	mrs	r9, cpsr
++	tst	r3, #PSR_I_BIT
++	biceq	r9, r9, #PSR_I_BIT
++
++	mov	r0, r2			@ pass address of aborted instruction.
++#ifdef MULTI_PABORT
++	ldr	r4, .LCprocfns
++	mov	lr, pc
++	ldr	pc, [r4, #PROCESSOR_PABT_FUNC]
++#else
++	bl	CPU_PABORT_HANDLER
++#endif
++	msr	cpsr_c, r9			@ Maybe enable interrupts
++	mov	r2, sp				@ regs
++	bl	do_PrefetchAbort		@ call abort handler
++
++	@
++	@ IRQs off again before pulling preserved data off the stack
++	@
++	disable_irq_notrace
++
++	@
++	@ restore SPSR and restart the instruction
++	@
++	ldr	r2, [sp, #S_PSR]
++	svc_exit r2				@ return from exception
++ UNWIND(.fnend		)
++ENDPROC(__pabt_svc)
++
++	.align	5
++.LCcralign:
++	.word	cr_alignment
++#ifdef MULTI_DABORT
++.LCprocfns:
++	.word	processor
++#endif
++.LCfp:
++	.word	fp_enter
++
++/*
++ * User mode handlers
++ *
++ * EABI note: sp_svc is always 64-bit aligned here, so should S_FRAME_SIZE
++ */
++
++#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5) && (S_FRAME_SIZE & 7)
++#error "sizeof(struct pt_regs) must be a multiple of 8"
++#endif
++
++	.macro	usr_entry
++ UNWIND(.fnstart	)
++ UNWIND(.cantunwind	)	@ don't unwind the user space
++	sub	sp, sp, #S_FRAME_SIZE
++ ARM(	stmib	sp, {r1 - r12}	)
++ THUMB(	stmia	sp, {r0 - r12}	)
++
++	ldmia	r0, {r1 - r3}
++	add	r0, sp, #S_PC		@ here for interlock avoidance
++	mov	r4, #-1			@  ""  ""     ""        ""
++
++	str	r1, [sp]		@ save the "real" r0 copied
++					@ from the exception stack
++
++	@
++	@ We are now ready to fill in the remaining blanks on the stack:
++	@
++	@  r2 - lr_<exception>, already fixed up for correct return/restart
++	@  r3 - spsr_<exception>
++	@  r4 - orig_r0 (see pt_regs definition in ptrace.h)
++	@
++	@ Also, separately save sp_usr and lr_usr
++	@
++	stmia	r0, {r2 - r4}
++ ARM(	stmdb	r0, {sp, lr}^			)
++ THUMB(	store_user_sp_lr r0, r1, S_SP - S_PC	)
++
++	@
++	@ Enable the alignment trap while in kernel mode
++	@
++	alignment_trap r0
++
++	@
++	@ Clear FP to mark the first stack frame
++	@
++	zero_fp
++	.endm
++
++	.macro	kuser_cmpxchg_check
++#if __LINUX_ARM_ARCH__ < 6 && !defined(CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG)
++#ifndef CONFIG_MMU
++#warning "NPTL on non MMU needs fixing"
++#else
++	@ Make sure our user space atomic helper is restarted
++	@ if it was interrupted in a critical region.  Here we
++	@ perform a quick test inline since it should be false
++	@ 99.9999% of the time.  The rest is done out of line.
++	cmp	r2, #TASK_SIZE
++	blhs	kuser_cmpxchg_fixup
++#endif
++#endif
++	.endm
++
++	.align	5
++__dabt_usr:
++	usr_entry
++	kuser_cmpxchg_check
++
++	@
++	@ Call the processor-specific abort handler:
++	@
++	@  r2 - aborted context pc
++	@  r3 - aborted context cpsr
++	@
++	@ The abort handler must return the aborted address in r0, and
++	@ the fault status register in r1.
++	@
++#ifdef MULTI_DABORT
++	ldr	r4, .LCprocfns
++	mov	lr, pc
++	ldr	pc, [r4, #PROCESSOR_DABT_FUNC]
++#else
++	bl	CPU_DABORT_HANDLER
++#endif
++
++	@
++	@ IRQs on, then call the main handler
++	@
++	enable_irq
++	mov	r2, sp
++	adr	lr, BSYM(ret_from_exception)
++	b	do_DataAbort
++ UNWIND(.fnend		)
++ENDPROC(__dabt_usr)
++
++	.align	5
++__irq_usr:
++	usr_entry
++	kuser_cmpxchg_check
++
++	get_thread_info tsk
++#ifdef CONFIG_PREEMPT
++	ldr	r8, [tsk, #TI_PREEMPT]		@ get preempt count
++	add	r7, r8, #1			@ increment it
++	str	r7, [tsk, #TI_PREEMPT]
++#endif
++
++	irq_handler
++#ifdef CONFIG_PREEMPT
++	ldr	r0, [tsk, #TI_PREEMPT]
++	str	r8, [tsk, #TI_PREEMPT]
++	teq	r0, r7
++ ARM(	strne	r0, [r0, -r0]	)
++ THUMB(	movne	r0, #0		)
++ THUMB(	strne	r0, [r0]	)
++#endif
++
++	mov	why, #0
++	b	ret_to_user
++ UNWIND(.fnend		)
++ENDPROC(__irq_usr)
++
++	.ltorg
++
++	.align	5
++__und_usr:
++	usr_entry
++
++	@
++	@ fall through to the emulation code, which returns using r9 if
++	@ it has emulated the instruction, or the more conventional lr
++	@ if we are to treat this as a real undefined instruction
++	@
++	@  r0 - instruction
++	@
++	adr	r9, BSYM(ret_from_exception)
++	adr	lr, BSYM(__und_usr_unknown)
++	tst	r3, #PSR_T_BIT			@ Thumb mode?
++	itet	eq				@ explicit IT needed for the 1f label
++	subeq	r4, r2, #4			@ ARM instr at LR - 4
++	subne	r4, r2, #2			@ Thumb instr at LR - 2
++1:	ldreqt	r0, [r4]
++#ifdef CONFIG_CPU_ENDIAN_BE8
++	reveq	r0, r0				@ little endian instruction
++#endif
++	beq	call_fpe
++	@ Thumb instruction
++#if __LINUX_ARM_ARCH__ >= 7
++2:
++ ARM(	ldrht	r5, [r4], #2	)
++ THUMB(	ldrht	r5, [r4]	)
++ THUMB(	add	r4, r4, #2	)
++	and	r0, r5, #0xf800			@ mask bits 111x x... .... ....
++	cmp	r0, #0xe800			@ 32bit instruction if xx != 0
++	blo	__und_usr_unknown
++3:	ldrht	r0, [r4]
++	add	r2, r2, #2			@ r2 is PC + 2, make it PC + 4
++	orr	r0, r0, r5, lsl #16
++#else
++	b	__und_usr_unknown
++#endif
++ UNWIND(.fnend		)
++ENDPROC(__und_usr)
++
++	@
++	@ fallthrough to call_fpe
++	@
++
++/*
++ * The out of line fixup for the ldrt above.
++ */
++	.pushsection .fixup, "ax"
++4:	mov	pc, r9
++	.popsection
++	.pushsection __ex_table,"a"
++	.long	1b, 4b
++#if __LINUX_ARM_ARCH__ >= 7
++	.long	2b, 4b
++	.long	3b, 4b
++#endif
++	.popsection
++
++/*
++ * Check whether the instruction is a co-processor instruction.
++ * If yes, we need to call the relevant co-processor handler.
++ *
++ * Note that we don't do a full check here for the co-processor
++ * instructions; all instructions with bit 27 set are well
++ * defined.  The only instructions that should fault are the
++ * co-processor instructions.  However, we have to watch out
++ * for the ARM6/ARM7 SWI bug.
++ *
++ * NEON is a special case that has to be handled here. Not all
++ * NEON instructions are co-processor instructions, so we have
++ * to make a special case of checking for them. Plus, there's
++ * five groups of them, so we have a table of mask/opcode pairs
++ * to check against, and if any match then we branch off into the
++ * NEON handler code.
++ *
++ * Emulators may wish to make use of the following registers:
++ *  r0  = instruction opcode.
++ *  r2  = PC+4
++ *  r9  = normal "successful" return address
++ *  r10 = this threads thread_info structure.
++ *  lr  = unrecognised instruction return address
++ */
++	@
++	@ Fall-through from Thumb-2 __und_usr
++	@
++#ifdef CONFIG_NEON
++	adr	r6, .LCneon_thumb_opcodes
++	b	2f
++#endif
++call_fpe:
++#ifdef CONFIG_NEON
++	adr	r6, .LCneon_arm_opcodes
++2:
++	ldr	r7, [r6], #4			@ mask value
++	cmp	r7, #0				@ end mask?
++	beq	1f
++	and	r8, r0, r7
++	ldr	r7, [r6], #4			@ opcode bits matching in mask
++	cmp	r8, r7				@ NEON instruction?
++	bne	2b
++	get_thread_info r10
++	mov	r7, #1
++	strb	r7, [r10, #TI_USED_CP + 10]	@ mark CP#10 as used
++	strb	r7, [r10, #TI_USED_CP + 11]	@ mark CP#11 as used
++	b	do_vfp				@ let VFP handler handle this
++1:
++#endif
++	tst	r0, #0x08000000			@ only CDP/CPRT/LDC/STC have bit 27
++	tstne	r0, #0x04000000			@ bit 26 set on both ARM and Thumb-2
++#if defined(CONFIG_CPU_ARM610) || defined(CONFIG_CPU_ARM710)
++	and	r8, r0, #0x0f000000		@ mask out op-code bits
++	teqne	r8, #0x0f000000			@ SWI (ARM6/7 bug)?
++#endif
++	moveq	pc, lr
++	get_thread_info r10			@ get current thread
++	and	r8, r0, #0x00000f00		@ mask out CP number
++ THUMB(	lsr	r8, r8, #8		)
++	mov	r7, #1
++	add	r6, r10, #TI_USED_CP
++ ARM(	strb	r7, [r6, r8, lsr #8]	)	@ set appropriate used_cp[]
++ THUMB(	strb	r7, [r6, r8]		)	@ set appropriate used_cp[]
++#ifdef CONFIG_IWMMXT
++	@ Test if we need to give access to iWMMXt coprocessors
++	ldr	r5, [r10, #TI_FLAGS]
++	rsbs	r7, r8, #(1 << 8)		@ CP 0 or 1 only
++	movcss	r7, r5, lsr #(TIF_USING_IWMMXT + 1)
++	bcs	iwmmxt_task_enable
++#endif
++ ARM(	add	pc, pc, r8, lsr #6	)
++ THUMB(	lsl	r8, r8, #2		)
++ THUMB(	add	pc, r8			)
++	nop
++
++	movw_pc	lr				@ CP#0
++	W(b)	do_fpe				@ CP#1 (FPE)
++	W(b)	do_fpe				@ CP#2 (FPE)
++	movw_pc	lr				@ CP#3
++#ifdef CONFIG_CRUNCH
++	b	crunch_task_enable		@ CP#4 (MaverickCrunch)
++	b	crunch_task_enable		@ CP#5 (MaverickCrunch)
++	b	crunch_task_enable		@ CP#6 (MaverickCrunch)
++#else
++	movw_pc	lr				@ CP#4
++	movw_pc	lr				@ CP#5
++	movw_pc	lr				@ CP#6
++#endif
++	movw_pc	lr				@ CP#7
++	movw_pc	lr				@ CP#8
++	movw_pc	lr				@ CP#9
++#ifdef CONFIG_VFP
++	W(b)	do_vfp				@ CP#10 (VFP)
++	W(b)	do_vfp				@ CP#11 (VFP)
++#else
++	movw_pc	lr				@ CP#10 (VFP)
++	movw_pc	lr				@ CP#11 (VFP)
++#endif
++	movw_pc	lr				@ CP#12
++	movw_pc	lr				@ CP#13
++	movw_pc	lr				@ CP#14 (Debug)
++	movw_pc	lr				@ CP#15 (Control)
++
++#ifdef CONFIG_NEON
++	.align	6
++
++.LCneon_arm_opcodes:
++	.word	0xfe000000			@ mask
++	.word	0xf2000000			@ opcode
++
++	.word	0xff100000			@ mask
++	.word	0xf4000000			@ opcode
++
++	.word	0x00000000			@ mask
++	.word	0x00000000			@ opcode
++
++.LCneon_thumb_opcodes:
++	.word	0xef000000			@ mask
++	.word	0xef000000			@ opcode
++
++	.word	0xff100000			@ mask
++	.word	0xf9000000			@ opcode
++
++	.word	0x00000000			@ mask
++	.word	0x00000000			@ opcode
++#endif
++
++do_fpe:
++	enable_irq
++	ldr	r4, .LCfp
++	add	r10, r10, #TI_FPSTATE		@ r10 = workspace
++	ldr	pc, [r4]			@ Call FP module USR entry point
++
++/*
++ * The FP module is called with these registers set:
++ *  r0  = instruction
++ *  r2  = PC+4
++ *  r9  = normal "successful" return address
++ *  r10 = FP workspace
++ *  lr  = unrecognised FP instruction return address
++ */
++
++	.pushsection .data
++ENTRY(fp_enter)
++	.word	no_fp
++	.popsection
++
++ENTRY(no_fp)
++	mov	pc, lr
++ENDPROC(no_fp)
++
++__und_usr_unknown:
++	enable_irq
++	mov	r0, sp
++	adr	lr, BSYM(ret_from_exception)
++	b	do_undefinstr
++ENDPROC(__und_usr_unknown)
++
++	.align	5
++__pabt_usr:
++	usr_entry
++
++	mov	r0, r2			@ pass address of aborted instruction.
++#ifdef MULTI_PABORT
++	ldr	r4, .LCprocfns
++	mov	lr, pc
++	ldr	pc, [r4, #PROCESSOR_PABT_FUNC]
++#else
++	bl	CPU_PABORT_HANDLER
++#endif
++	enable_irq				@ Enable interrupts
++	mov	r2, sp				@ regs
++	bl	do_PrefetchAbort		@ call abort handler
++ UNWIND(.fnend		)
++	/* fall through */
++/*
++ * This is the return code to user mode for abort handlers
++ */
++ENTRY(ret_from_exception)
++ UNWIND(.fnstart	)
++ UNWIND(.cantunwind	)
++	get_thread_info tsk
++	mov	why, #0
++	b	ret_to_user
++ UNWIND(.fnend		)
++ENDPROC(__pabt_usr)
++ENDPROC(ret_from_exception)
++
++/*
++ * Register switch for ARMv3 and ARMv4 processors
++ * r0 = previous task_struct, r1 = previous thread_info, r2 = next thread_info
++ * previous and next are guaranteed not to be the same.
++ */
++ENTRY(__switch_to)
++ UNWIND(.fnstart	)
++ UNWIND(.cantunwind	)
++	add	ip, r1, #TI_CPU_SAVE
++	ldr	r3, [r2, #TI_TP_VALUE]
++ ARM(	stmia	ip!, {r4 - sl, fp, sp, lr} )	@ Store most regs on stack
++ THUMB(	stmia	ip!, {r4 - sl, fp}	   )	@ Store most regs on stack
++ THUMB(	str	sp, [ip], #4		   )
++ THUMB(	str	lr, [ip], #4		   )
++#ifdef CONFIG_MMU
++	ldr	r6, [r2, #TI_CPU_DOMAIN]
++#endif
++#if defined(CONFIG_HAS_TLS_REG)
++	mcr	p15, 0, r3, c13, c0, 3		@ set TLS register
++#elif !defined(CONFIG_TLS_REG_EMUL)
++	mov	r4, #0xffff0fff
++	str	r3, [r4, #-15]			@ TLS val at 0xffff0ff0
++#endif
++#ifdef CONFIG_MMU
++	mcr	p15, 0, r6, c3, c0, 0		@ Set domain register
++#endif
++	mov	r5, r0
++	add	r4, r2, #TI_CPU_SAVE
++	ldr	r0, =thread_notify_head
++	mov	r1, #THREAD_NOTIFY_SWITCH
++	bl	atomic_notifier_call_chain
++ THUMB(	mov	ip, r4			   )
++	mov	r0, r5
++ ARM(	ldmia	r4, {r4 - sl, fp, sp, pc}  )	@ Load all regs saved previously
++ THUMB(	ldmia	ip!, {r4 - sl, fp}	   )	@ Load all regs saved previously
++ THUMB(	ldr	sp, [ip], #4		   )
++ THUMB(	ldr	pc, [ip]		   )
++ UNWIND(.fnend		)
++ENDPROC(__switch_to)
++
++	__INIT
++
++/*
++ * User helpers.
++ *
++ * These are segment of kernel provided user code reachable from user space
++ * at a fixed address in kernel memory.  This is used to provide user space
++ * with some operations which require kernel help because of unimplemented
++ * native feature and/or instructions in many ARM CPUs. The idea is for
++ * this code to be executed directly in user mode for best efficiency but
++ * which is too intimate with the kernel counter part to be left to user
++ * libraries.  In fact this code might even differ from one CPU to another
++ * depending on the available  instruction set and restrictions like on
++ * SMP systems.  In other words, the kernel reserves the right to change
++ * this code as needed without warning. Only the entry points and their
++ * results are guaranteed to be stable.
++ *
++ * Each segment is 32-byte aligned and will be moved to the top of the high
++ * vector page.  New segments (if ever needed) must be added in front of
++ * existing ones.  This mechanism should be used only for things that are
++ * really small and justified, and not be abused freely.
++ *
++ * User space is expected to implement those things inline when optimizing
++ * for a processor that has the necessary native support, but only if such
++ * resulting binaries are already to be incompatible with earlier ARM
++ * processors due to the use of unsupported instructions other than what
++ * is provided here.  In other words don't make binaries unable to run on
++ * earlier processors just for the sake of not using these kernel helpers
++ * if your compiled code is not going to use the new instructions for other
++ * purpose.
++ */
++ THUMB(	.arm	)
++
++	.macro	usr_ret, reg
++#ifdef CONFIG_ARM_THUMB
++	bx	\reg
++#else
++	mov	pc, \reg
++#endif
++	.endm
++
++	.align	5
++	.globl	__kuser_helper_start
++__kuser_helper_start:
++
++/*
++ * Reference prototype:
++ *
++ *	void __kernel_memory_barrier(void)
++ *
++ * Input:
++ *
++ *	lr = return address
++ *
++ * Output:
++ *
++ *	none
++ *
++ * Clobbered:
++ *
++ *	none
++ *
++ * Definition and user space usage example:
++ *
++ *	typedef void (__kernel_dmb_t)(void);
++ *	#define __kernel_dmb (*(__kernel_dmb_t *)0xffff0fa0)
++ *
++ * Apply any needed memory barrier to preserve consistency with data modified
++ * manually and __kuser_cmpxchg usage.
++ *
++ * This could be used as follows:
++ *
++ * #define __kernel_dmb() \
++ *         asm volatile ( "mov r0, #0xffff0fff; mov lr, pc; sub pc, r0, #95" \
++ *	        : : : "r0", "lr","cc" )
++ */
++
++__kuser_memory_barrier:				@ 0xffff0fa0
++	smp_dmb
++	usr_ret	lr
++
++	.align	5
++
++/*
++ * Reference prototype:
++ *
++ *	int __kernel_cmpxchg(int oldval, int newval, int *ptr)
++ *
++ * Input:
++ *
++ *	r0 = oldval
++ *	r1 = newval
++ *	r2 = ptr
++ *	lr = return address
++ *
++ * Output:
++ *
++ *	r0 = returned value (zero or non-zero)
++ *	C flag = set if r0 == 0, clear if r0 != 0
++ *
++ * Clobbered:
++ *
++ *	r3, ip, flags
++ *
++ * Definition and user space usage example:
++ *
++ *	typedef int (__kernel_cmpxchg_t)(int oldval, int newval, int *ptr);
++ *	#define __kernel_cmpxchg (*(__kernel_cmpxchg_t *)0xffff0fc0)
++ *
++ * Atomically store newval in *ptr if *ptr is equal to oldval for user space.
++ * Return zero if *ptr was changed or non-zero if no exchange happened.
++ * The C flag is also set if *ptr was changed to allow for assembly
++ * optimization in the calling code.
++ *
++ * Notes:
++ *
++ *    - This routine already includes memory barriers as needed.
++ *
++ * For example, a user space atomic_add implementation could look like this:
++ *
++ * #define atomic_add(ptr, val) \
++ *	({ register unsigned int *__ptr asm("r2") = (ptr); \
++ *	   register unsigned int __result asm("r1"); \
++ *	   asm volatile ( \
++ *	       "1: @ atomic_add\n\t" \
++ *	       "ldr	r0, [r2]\n\t" \
++ *	       "mov	r3, #0xffff0fff\n\t" \
++ *	       "add	lr, pc, #4\n\t" \
++ *	       "add	r1, r0, %2\n\t" \
++ *	       "add	pc, r3, #(0xffff0fc0 - 0xffff0fff)\n\t" \
++ *	       "bcc	1b" \
++ *	       : "=&r" (__result) \
++ *	       : "r" (__ptr), "rIL" (val) \
++ *	       : "r0","r3","ip","lr","cc","memory" ); \
++ *	   __result; })
++ */
++
++__kuser_cmpxchg:				@ 0xffff0fc0
++
++#if defined(CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG)
++
++	/*
++	 * Poor you.  No fast solution possible...
++	 * The kernel itself must perform the operation.
++	 * A special ghost syscall is used for that (see traps.c).
++	 */
++	stmfd	sp!, {r7, lr}
++	ldr	r7, =1f			@ it's 20 bits
++	swi	__ARM_NR_cmpxchg
++	ldmfd	sp!, {r7, pc}
++1:	.word	__ARM_NR_cmpxchg
++
++#elif __LINUX_ARM_ARCH__ < 6
++
++#ifdef CONFIG_MMU
++
++	/*
++	 * The only thing that can break atomicity in this cmpxchg
++	 * implementation is either an IRQ or a data abort exception
++	 * causing another process/thread to be scheduled in the middle
++	 * of the critical sequence.  To prevent this, code is added to
++	 * the IRQ and data abort exception handlers to set the pc back
++	 * to the beginning of the critical section if it is found to be
++	 * within that critical section (see kuser_cmpxchg_fixup).
++	 */
++1:	ldr	r3, [r2]			@ load current val
++	subs	r3, r3, r0			@ compare with oldval
++2:	streq	r1, [r2]			@ store newval if eq
++	rsbs	r0, r3, #0			@ set return val and C flag
++	usr_ret	lr
++
++	.text
++kuser_cmpxchg_fixup:
++	@ Called from kuser_cmpxchg_check macro.
++	@ r2 = address of interrupted insn (must be preserved).
++	@ sp = saved regs. r7 and r8 are clobbered.
++	@ 1b = first critical insn, 2b = last critical insn.
++	@ If r2 >= 1b and r2 <= 2b then saved pc_usr is set to 1b.
++	mov	r7, #0xffff0fff
++	sub	r7, r7, #(0xffff0fff - (0xffff0fc0 + (1b - __kuser_cmpxchg)))
++	subs	r8, r2, r7
++	rsbcss	r8, r8, #(2b - 1b)
++	strcs	r7, [sp, #S_PC]
++	mov	pc, lr
++	.previous
++
++#else
++#warning "NPTL on non MMU needs fixing"
++	mov	r0, #-1
++	adds	r0, r0, #0
++	usr_ret	lr
++#endif
++
++#else
++
++	smp_dmb
++1:	ldrex	r3, [r2]
++	subs	r3, r3, r0
++	strexeq	r3, r1, [r2]
++	teqeq	r3, #1
++	beq	1b
++	rsbs	r0, r3, #0
++	/* beware -- each __kuser slot must be 8 instructions max */
++#ifdef CONFIG_SMP
++	b	__kuser_memory_barrier
++#else
++	usr_ret	lr
++#endif
++
++#endif
++
++	.align	5
++
++/*
++ * Reference prototype:
++ *
++ *	int __kernel_get_tls(void)
++ *
++ * Input:
++ *
++ *	lr = return address
++ *
++ * Output:
++ *
++ *	r0 = TLS value
++ *
++ * Clobbered:
++ *
++ *	none
++ *
++ * Definition and user space usage example:
++ *
++ *	typedef int (__kernel_get_tls_t)(void);
++ *	#define __kernel_get_tls (*(__kernel_get_tls_t *)0xffff0fe0)
++ *
++ * Get the TLS value as previously set via the __ARM_NR_set_tls syscall.
++ *
++ * This could be used as follows:
++ *
++ * #define __kernel_get_tls() \
++ *	({ register unsigned int __val asm("r0"); \
++ *         asm( "mov r0, #0xffff0fff; mov lr, pc; sub pc, r0, #31" \
++ *	        : "=r" (__val) : : "lr","cc" ); \
++ *	   __val; })
++ */
++
++__kuser_get_tls:				@ 0xffff0fe0
++
++#if !defined(CONFIG_HAS_TLS_REG) && !defined(CONFIG_TLS_REG_EMUL)
++	ldr	r0, [pc, #(16 - 8)]		@ TLS stored at 0xffff0ff0
++#else
++	mrc	p15, 0, r0, c13, c0, 3		@ read TLS register
++#endif
++	usr_ret	lr
++
++	.rep	5
++	.word	0			@ pad up to __kuser_helper_version
++	.endr
++
++/*
++ * Reference declaration:
++ *
++ *	extern unsigned int __kernel_helper_version;
++ *
++ * Definition and user space usage example:
++ *
++ *	#define __kernel_helper_version (*(unsigned int *)0xffff0ffc)
++ *
++ * User space may read this to determine the curent number of helpers
++ * available.
++ */
++
++__kuser_helper_version:				@ 0xffff0ffc
++	.word	((__kuser_helper_end - __kuser_helper_start) >> 5)
++
++	.globl	__kuser_helper_end
++__kuser_helper_end:
++
++ THUMB(	.thumb	)
++
++/*
++ * Vector stubs.
++ *
++ * This code is copied to 0xffff0200 so we can use branches in the
++ * vectors, rather than ldr's.  Note that this code must not
++ * exceed 0x300 bytes.
++ *
++ * Common stub entry macro:
++ *   Enter in IRQ mode, spsr = SVC/USR CPSR, lr = SVC/USR PC
++ *
++ * SP points to a minimal amount of processor-private memory, the address
++ * of which is copied into r0 for the mode specific abort handler.
++ */
++	.macro	vector_stub, name, mode, correction=0
++	.align	5
++
++vector_\name:
++	.if \correction
++	sub	lr, lr, #\correction
++	.endif
++
++	@
++	@ Save r0, lr_<exception> (parent PC) and spsr_<exception>
++	@ (parent CPSR)
++	@
++	stmia	sp, {r0, lr}		@ save r0, lr
++	mrs	lr, spsr
++	str	lr, [sp, #8]		@ save spsr
++
++	@
++	@ Prepare for SVC32 mode.  IRQs remain disabled.
++	@
++	mrs	r0, cpsr
++	eor	r0, r0, #(\mode ^ SVC_MODE | PSR_ISETSTATE)
++	msr	spsr_cxsf, r0
++
++	@
++	@ the branch table must immediately follow this code
++	@
++	and	lr, lr, #0x0f
++ THUMB(	adr	r0, 1f			)
++ THUMB(	ldr	lr, [r0, lr, lsl #2]	)
++	mov	r0, sp
++ ARM(	ldr	lr, [pc, lr, lsl #2]	)
++	movs	pc, lr			@ branch to handler in SVC mode
++ENDPROC(vector_\name)
++
++	.align	2
++	@ handler addresses follow this label
++1:
++	.endm
++
++	.globl	__stubs_start
++__stubs_start:
++/*
++ * Interrupt dispatcher
++ */
++	vector_stub	irq, IRQ_MODE, 4
++
++	.long	__irq_usr			@  0  (USR_26 / USR_32)
++	.long	__irq_invalid			@  1  (FIQ_26 / FIQ_32)
++	.long	__irq_invalid			@  2  (IRQ_26 / IRQ_32)
++	.long	__irq_svc			@  3  (SVC_26 / SVC_32)
++	.long	__irq_invalid			@  4
++	.long	__irq_invalid			@  5
++	.long	__irq_invalid			@  6
++	.long	__irq_invalid			@  7
++	.long	__irq_invalid			@  8
++	.long	__irq_invalid			@  9
++	.long	__irq_invalid			@  a
++	.long	__irq_invalid			@  b
++	.long	__irq_invalid			@  c
++	.long	__irq_invalid			@  d
++	.long	__irq_invalid			@  e
++	.long	__irq_invalid			@  f
++
++/*
++ * Data abort dispatcher
++ * Enter in ABT mode, spsr = USR CPSR, lr = USR PC
++ */
++	vector_stub	dabt, ABT_MODE, 8
++
++	.long	__dabt_usr			@  0  (USR_26 / USR_32)
++	.long	__dabt_invalid			@  1  (FIQ_26 / FIQ_32)
++	.long	__dabt_invalid			@  2  (IRQ_26 / IRQ_32)
++	.long	__dabt_svc			@  3  (SVC_26 / SVC_32)
++	.long	__dabt_invalid			@  4
++	.long	__dabt_invalid			@  5
++	.long	__dabt_invalid			@  6
++	.long	__dabt_invalid			@  7
++	.long	__dabt_invalid			@  8
++	.long	__dabt_invalid			@  9
++	.long	__dabt_invalid			@  a
++	.long	__dabt_invalid			@  b
++	.long	__dabt_invalid			@  c
++	.long	__dabt_invalid			@  d
++	.long	__dabt_invalid			@  e
++	.long	__dabt_invalid			@  f
++
++/*
++ * Prefetch abort dispatcher
++ * Enter in ABT mode, spsr = USR CPSR, lr = USR PC
++ */
++	vector_stub	pabt, ABT_MODE, 4
++
++	.long	__pabt_usr			@  0 (USR_26 / USR_32)
++	.long	__pabt_invalid			@  1 (FIQ_26 / FIQ_32)
++	.long	__pabt_invalid			@  2 (IRQ_26 / IRQ_32)
++	.long	__pabt_svc			@  3 (SVC_26 / SVC_32)
++	.long	__pabt_invalid			@  4
++	.long	__pabt_invalid			@  5
++	.long	__pabt_invalid			@  6
++	.long	__pabt_invalid			@  7
++	.long	__pabt_invalid			@  8
++	.long	__pabt_invalid			@  9
++	.long	__pabt_invalid			@  a
++	.long	__pabt_invalid			@  b
++	.long	__pabt_invalid			@  c
++	.long	__pabt_invalid			@  d
++	.long	__pabt_invalid			@  e
++	.long	__pabt_invalid			@  f
++
++/*
++ * Undef instr entry dispatcher
++ * Enter in UND mode, spsr = SVC/USR CPSR, lr = SVC/USR PC
++ */
++	vector_stub	und, UND_MODE
++
++	.long	__und_usr			@  0 (USR_26 / USR_32)
++	.long	__und_invalid			@  1 (FIQ_26 / FIQ_32)
++	.long	__und_invalid			@  2 (IRQ_26 / IRQ_32)
++	.long	__und_svc			@  3 (SVC_26 / SVC_32)
++	.long	__und_invalid			@  4
++	.long	__und_invalid			@  5
++	.long	__und_invalid			@  6
++	.long	__und_invalid			@  7
++	.long	__und_invalid			@  8
++	.long	__und_invalid			@  9
++	.long	__und_invalid			@  a
++	.long	__und_invalid			@  b
++	.long	__und_invalid			@  c
++	.long	__und_invalid			@  d
++	.long	__und_invalid			@  e
++	.long	__und_invalid			@  f
++
++	.align	5
++
++/*=============================================================================
++ * Undefined FIQs
++ *-----------------------------------------------------------------------------
++ * Enter in FIQ mode, spsr = ANY CPSR, lr = ANY PC
++ * MUST PRESERVE SVC SPSR, but need to switch to SVC mode to show our msg.
++ * Basically to switch modes, we *HAVE* to clobber one register...  brain
++ * damage alert!  I don't think that we can execute any code in here in any
++ * other mode than FIQ...  Ok you can switch to another mode, but you can't
++ * get out of that mode without clobbering one register.
++ */
++vector_fiq:
++	disable_fiq
++	subs	pc, lr, #4
++
++/*=============================================================================
++ * Address exception handler
++ *-----------------------------------------------------------------------------
++ * These aren't too critical.
++ * (they're not supposed to happen, and won't happen in 32-bit data mode).
++ */
++
++vector_addrexcptn:
++	b	vector_addrexcptn
++
++/*
++ * We group all the following data together to optimise
++ * for CPUs with separate I & D caches.
++ */
++	.align	5
++
++.LCvswi:
++	.word	vector_swi
++
++	.globl	__stubs_end
++__stubs_end:
++
++	.equ	stubs_offset, __vectors_start + 0x200 - __stubs_start
++
++	.globl	__vectors_start
++__vectors_start:
++ ARM(	swi	SYS_ERROR0	)
++ THUMB(	svc	#0		)
++ THUMB(	nop			)
++	W(b)	vector_und + stubs_offset
++	W(ldr)	pc, .LCvswi + stubs_offset
++	W(b)	vector_pabt + stubs_offset
++	W(b)	vector_dabt + stubs_offset
++	W(b)	vector_addrexcptn + stubs_offset
++	W(b)	vector_irq + stubs_offset
++	W(b)	vector_fiq + stubs_offset
++
++	.globl	__vectors_end
++__vectors_end:
++
++	.data
++
++	.globl	cr_alignment
++	.globl	cr_no_alignment
++cr_alignment:
++	.space	4
++cr_no_alignment:
++	.space	4
+diff -rupN linux-2.6.35.11/arch/arm/kernel/head-common.S linux-2.6.35.11-ts7500/arch/arm/kernel/head-common.S
+--- linux-2.6.35.11/arch/arm/kernel/head-common.S	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/kernel/head-common.S	2011-03-14 11:18:24.000000000 -0400
+@@ -39,6 +39,16 @@ __switch_data:
+  *  r9  = processor ID
+  */
+ __mmap_switched:
++
++# We come here right after the MMU is enabled
++
++#ifdef CONFIG_DEBUG_LL
++@   stmfd sp!, {r0, r1, r2, r3, r9, lr}
++@   adr	r0, str_mmap_switched
++@	bl	printascii
++@   ldmfd sp!, {r0, r1, r2, r3, r9, lr}
++#endif
++
+ 	adr	r3, __switch_data + 4
+ 
+ 	ldmia	r3!, {r4, r5, r6, r7}
+@@ -53,6 +63,7 @@ __mmap_switched:
+ 	strcc	fp, [r6],#4
+ 	bcc	1b
+ 
++   
+  ARM(	ldmia	r3, {r4, r5, r6, r7, sp})
+  THUMB(	ldmia	r3, {r4, r5, r6, r7}	)
+  THUMB(	ldr	sp, [r3, #16]		)
+@@ -61,7 +72,23 @@ __mmap_switched:
+ 	str	r2, [r6]			@ Save atags pointer
+ 	bic	r4, r0, #CR_A			@ Clear 'A' bit
+ 	stmia	r7, {r0, r4}			@ Save control register values
++   
++#ifdef CONFIG_DEBUG_LL
++   stmfd sp!, {r0, r1, r2, r3, r9, lr}
++   adr	r0, str_mmap_switched_done
++	bl	printascii
++   ldmfd sp!, {r0, r1, r2, r3, r9, lr}
++#endif
++
++
+ 	b	start_kernel
++
++#ifdef CONFIG_DEBUG_LL
++str_mmap_switched: .asciz "str_mmap_switched\n"   
++str_mmap_switched_done: .asciz "str_mmap_switched_done\n"
++.align 4
++#endif   
++   
+ ENDPROC(__mmap_switched)
+ 
+ /*
+@@ -74,7 +101,7 @@ ENDPROC(__mmap_switched)
+  * machine ID for example).
+  */
+ __error_p:
+-#ifdef CONFIG_DEBUG_LL
++#ifdef CONFIG_DEBUG_LL   
+ 	adr	r0, str_p1
+ 	bl	printascii
+ 	mov	r0, r9
+diff -rupN linux-2.6.35.11/arch/arm/kernel/head.S linux-2.6.35.11-ts7500/arch/arm/kernel/head.S
+--- linux-2.6.35.11/arch/arm/kernel/head.S	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/kernel/head.S	2011-03-14 11:18:24.000000000 -0400
+@@ -22,6 +22,10 @@
+ #include <asm/thread_info.h>
+ #include <asm/system.h>
+ 
++#if defined(CONFIG_ARCH_STR9100) || defined(CONFIG_ARCH_STR8100)
++//#define PROCINFO_INITFUNC	12
++#endif
++
+ #if (PHYS_OFFSET & 0x001fffff)
+ #error "PHYS_OFFSET must be at an even 2MiB boundary!"
+ #endif
+@@ -78,16 +82,75 @@
+ ENTRY(stext)
+ 	setmode	PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
+ 						@ and irqs disabled
++
++                       
++#ifdef CONFIG_DEBUG_LL
++   stmfd sp!, {r0, r1, r2}
++   mov r6, r1   
++   adr	r0, str_kernel_start
++	bl	printascii
++   adr   r0, str_machine_id
++   bl	printascii
++   mov r0, r6
++   bl printhex8
++   mov r0, #'\n'
++   bl printch
++   ldmfd sp!, {r0, r1, r2}
++#endif
++                  
+ 	mrc	p15, 0, r9, c0, c0		@ get processor id
++   
++#ifdef CONFIG_DEBUG_LL
++   stmfd sp!, {r0, r1, r2}  
++   adr	r0, str_processor_id
++	bl	printascii
++   mov r0, r9
++   bl printhex8
++   mov r0, #'\n'
++   bl printch
++   ldmfd sp!, {r0, r1, r2}
++#endif   
++   
+ 	bl	__lookup_processor_type		@ r5=procinfo r9=cpuid
+ 	movs	r10, r5				@ invalid processor (r5=0)?
+ 	beq	__error_p			@ yes, error 'p'
+ 	bl	__lookup_machine_type		@ r5=machinfo
+ 	movs	r8, r5				@ invalid machine (r5=0)?
+-	beq	__error_a			@ yes, error 'a'
++	beq	__error_a			@ yes, error 'a'   
+ 	bl	__vet_atags
+ 	bl	__create_page_tables
+ 
++   
++###########################
++
++	mov	ip, #0	
++	mcr	p15, 0, ip, c7,c14, 2		@ clean/flush D-cache
++	mcr	p15, 0, ip, c7, c10, 4		@ drain write buffer
++	mcr	p15, 0, ip, c7, c5, 6		@ invalidate BTB
++	nop
++	nop
++   nop 
++   nop
++   
++#################################
++   
++#ifdef CONFIG_DEBUG_LL
++   stmfd sp!, {r0, r1, r2}  
++   adr	r0, str_procinfo_at
++	bl	printascii
++   mov r0, r10
++   bl printhex8
++   mov r0, #'\n'   
++   bl printch
++   adr	r0, str_initfunc_offset
++	bl	printascii
++   mov r0, #PROCINFO_INITFUNC
++   bl printhex8
++   mov r0, #'\n'   
++   bl printch
++   ldmfd sp!, {r0, r1, r2}
++#endif      
++   
+ 	/*
+ 	 * The following calls CPU specific code in a position independent
+ 	 * manner.  See arch/arm/mm/proc-*.S for details.  r10 = base of
+@@ -101,6 +164,15 @@ ENTRY(stext)
+  ARM(	add	pc, r10, #PROCINFO_INITFUNC	)
+  THUMB(	add	r12, r10, #PROCINFO_INITFUNC	)
+  THUMB(	mov	pc, r12				)
++
++#ifdef CONFIG_DEBUG_LL
++str_kernel_start: .asciz "kernel_start\n"   
++str_machine_id: .asciz "machine ID: 0x"
++str_processor_id: .asciz "processor ID: 0x"
++str_procinfo_at:  .asciz "procinfo at:  0x"
++str_initfunc_offset:  .asciz "PROCINFO_INITFUNC:  0x"
++.align 4
++#endif   
+ ENDPROC(stext)
+ 
+ #if defined(CONFIG_SMP)
+@@ -158,6 +230,13 @@ __secondary_data:
+  * registers.
+  */
+ __enable_mmu:
++#ifdef CONFIG_DEBUG_LL
++@   stmfd sp!, {r0, r1, r2, r3, r6, r13, lr}
++@   adr	r0, str_enable_mmu
++@	bl	printascii
++@   ldmfd sp!, {r0, r1, r2, r3, r6, r13, lr}
++#endif
++
+ #ifdef CONFIG_ALIGNMENT_TRAP
+ 	orr	r0, r0, #CR_A
+ #else
+@@ -179,6 +258,12 @@ __enable_mmu:
+ 	mcr	p15, 0, r5, c3, c0, 0		@ load domain access register
+ 	mcr	p15, 0, r4, c2, c0, 0		@ load page table pointer
+ 	b	__turn_mmu_on
++   
++#ifdef CONFIG_DEBUG_LL   
++str_enable_mmu: .asciz "__enable_mmu\n"
++str_enable_mmu_done: .asciz "__enable_mmu done\n"
++.align 4
++#endif
+ ENDPROC(__enable_mmu)
+ 
+ /*
+@@ -196,10 +281,19 @@ ENDPROC(__enable_mmu)
+ __turn_mmu_on:
+ 	mov	r0, r0
+ 	mcr	p15, 0, r0, c1, c0, 0		@ write control reg
++#if defined(CONFIG_CPU_FA520) || defined(CONFIG_CPU_FA526) || defined(CONFIG_CPU_FA626)
++	nop
++	nop
++	nop
++	nop
++#endif   
+ 	mrc	p15, 0, r3, c0, c0, 0		@ read id reg
++   
+ 	mov	r3, r3
+-	mov	r3, r13
++   mov	r3, r3
++	mov	r3, r13   
+ 	mov	pc, r3
++   
+ ENDPROC(__turn_mmu_on)
+ 
+ 
+@@ -217,6 +311,12 @@ ENDPROC(__turn_mmu_on)
+  *  r4 = physical page table address
+  */
+ __create_page_tables:
++#ifdef CONFIG_DEBUG_LL
++   mov r6, lr
++   adr	r0, str_create_page_tables
++	bl	printascii
++   mov lr, r6
++#endif
+ 	pgtbl	r4				@ page table address
+ 
+ 	/*
+@@ -281,14 +381,15 @@ __create_page_tables:
+ 	/*
+ 	 * Then map first 1MB of ram in case it contains our boot params.
+ 	 */
+-	add	r0, r4, #PAGE_OFFSET >> 18
++	add	r0, r4, #PAGE_OFFSET >> 18   
+ 	orr	r6, r7, #(PHYS_OFFSET & 0xff000000)
+ 	.if	(PHYS_OFFSET & 0x00f00000)
+ 	orr	r6, r6, #(PHYS_OFFSET & 0x00f00000)
+ 	.endif
+ 	str	r6, [r0]
+ 
+-#ifdef CONFIG_DEBUG_LL
++@#if defined(CONFIG_DEBUG_LL) || defined(CONFIG_ARCH_STR9100) || defined(CONFIG_ARCH_STR8100)
++#if defined(CONFIG_DEBUG_LL)
+ 	ldr	r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags
+ 	/*
+ 	 * Map in IO space for serial debugging.
+@@ -329,7 +430,20 @@ __create_page_tables:
+ 	str	r3, [r0]
+ #endif
+ #endif
++
++#ifdef CONFIG_DEBUG_LL
++   mov r6, lr
++   adr	r0, str_create_page_tables_done
++	bl	printascii
++   mov lr, r6
++#endif
++
+ 	mov	pc, lr
++#ifdef CONFIG_DEBUG_LL
++str_create_page_tables: .asciz "create_page_tables\n"   
++str_create_page_tables_done: .asciz "create_page_tables_done\n"
++.align 4
++#endif
+ ENDPROC(__create_page_tables)
+ 	.ltorg
+ 
+diff -rupN linux-2.6.35.11/arch/arm/kernel/process.c linux-2.6.35.11-ts7500/arch/arm/kernel/process.c
+--- linux-2.6.35.11/arch/arm/kernel/process.c	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/kernel/process.c	2011-03-14 11:18:24.000000000 -0400
+@@ -126,9 +126,17 @@ EXPORT_SYMBOL_GPL(arm_pm_restart);
+  */
+ static void default_idle(void)
+ {
++#ifndef CONFIG_CPU_FA_IDLE
++                local_irq_disable();
++#endif
++
+ 	if (!need_resched())
+ 		arch_idle();
+-	local_irq_enable();
++//	local_irq_enable();
++#ifndef CONFIG_CPU_FA_IDLE
++        local_irq_enable();
++#endif
++
+ }
+ 
+ void (*pm_idle)(void) = default_idle;
+diff -rupN linux-2.6.35.11/arch/arm/kernel/process.c.orig linux-2.6.35.11-ts7500/arch/arm/kernel/process.c.orig
+--- linux-2.6.35.11/arch/arm/kernel/process.c.orig	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/kernel/process.c.orig	2011-02-06 14:04:07.000000000 -0500
+@@ -0,0 +1,428 @@
++/*
++ *  linux/arch/arm/kernel/process.c
++ *
++ *  Copyright (C) 1996-2000 Russell King - Converted to ARM.
++ *  Original Copyright (C) 1995  Linus Torvalds
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <stdarg.h>
++
++#include <linux/module.h>
++#include <linux/sched.h>
++#include <linux/kernel.h>
++#include <linux/mm.h>
++#include <linux/stddef.h>
++#include <linux/unistd.h>
++#include <linux/user.h>
++#include <linux/delay.h>
++#include <linux/reboot.h>
++#include <linux/interrupt.h>
++#include <linux/kallsyms.h>
++#include <linux/init.h>
++#include <linux/cpu.h>
++#include <linux/elfcore.h>
++#include <linux/pm.h>
++#include <linux/tick.h>
++#include <linux/utsname.h>
++#include <linux/uaccess.h>
++
++#include <asm/leds.h>
++#include <asm/processor.h>
++#include <asm/system.h>
++#include <asm/thread_notify.h>
++#include <asm/stacktrace.h>
++#include <asm/mach/time.h>
++
++static const char *processor_modes[] = {
++  "USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" , "UK4_26" , "UK5_26" , "UK6_26" , "UK7_26" ,
++  "UK8_26" , "UK9_26" , "UK10_26", "UK11_26", "UK12_26", "UK13_26", "UK14_26", "UK15_26",
++  "USER_32", "FIQ_32" , "IRQ_32" , "SVC_32" , "UK4_32" , "UK5_32" , "UK6_32" , "ABT_32" ,
++  "UK8_32" , "UK9_32" , "UK10_32", "UND_32" , "UK12_32", "UK13_32", "UK14_32", "SYS_32"
++};
++
++static const char *isa_modes[] = {
++  "ARM" , "Thumb" , "Jazelle", "ThumbEE"
++};
++
++extern void setup_mm_for_reboot(char mode);
++
++static volatile int hlt_counter;
++
++#include <mach/system.h>
++
++void disable_hlt(void)
++{
++	hlt_counter++;
++}
++
++EXPORT_SYMBOL(disable_hlt);
++
++void enable_hlt(void)
++{
++	hlt_counter--;
++}
++
++EXPORT_SYMBOL(enable_hlt);
++
++static int __init nohlt_setup(char *__unused)
++{
++	hlt_counter = 1;
++	return 1;
++}
++
++static int __init hlt_setup(char *__unused)
++{
++	hlt_counter = 0;
++	return 1;
++}
++
++__setup("nohlt", nohlt_setup);
++__setup("hlt", hlt_setup);
++
++void arm_machine_restart(char mode, const char *cmd)
++{
++	/*
++	 * Clean and disable cache, and turn off interrupts
++	 */
++	cpu_proc_fin();
++
++	/*
++	 * Tell the mm system that we are going to reboot -
++	 * we may need it to insert some 1:1 mappings so that
++	 * soft boot works.
++	 */
++	setup_mm_for_reboot(mode);
++
++	/*
++	 * Now call the architecture specific reboot code.
++	 */
++	arch_reset(mode, cmd);
++
++	/*
++	 * Whoops - the architecture was unable to reboot.
++	 * Tell the user!
++	 */
++	mdelay(1000);
++	printk("Reboot failed -- System halted\n");
++	while (1);
++}
++
++/*
++ * Function pointers to optional machine specific functions
++ */
++void (*pm_power_off)(void);
++EXPORT_SYMBOL(pm_power_off);
++
++void (*arm_pm_restart)(char str, const char *cmd) = arm_machine_restart;
++EXPORT_SYMBOL_GPL(arm_pm_restart);
++
++
++/*
++ * This is our default idle handler.  We need to disable
++ * interrupts here to ensure we don't miss a wakeup call.
++ */
++static void default_idle(void)
++{
++	if (!need_resched())
++		arch_idle();
++	local_irq_enable();
++}
++
++void (*pm_idle)(void) = default_idle;
++EXPORT_SYMBOL(pm_idle);
++
++/*
++ * The idle thread, has rather strange semantics for calling pm_idle,
++ * but this is what x86 does and we need to do the same, so that
++ * things like cpuidle get called in the same way.  The only difference
++ * is that we always respect 'hlt_counter' to prevent low power idle.
++ */
++void cpu_idle(void)
++{
++	local_fiq_enable();
++
++	/* endless idle loop with no priority at all */
++	while (1) {
++		tick_nohz_stop_sched_tick(1);
++		leds_event(led_idle_start);
++		while (!need_resched()) {
++#ifdef CONFIG_HOTPLUG_CPU
++			if (cpu_is_offline(smp_processor_id()))
++				cpu_die();
++#endif
++
++			local_irq_disable();
++			if (hlt_counter) {
++				local_irq_enable();
++				cpu_relax();
++			} else {
++				stop_critical_timings();
++				pm_idle();
++				start_critical_timings();
++				/*
++				 * This will eventually be removed - pm_idle
++				 * functions should always return with IRQs
++				 * enabled.
++				 */
++				WARN_ON(irqs_disabled());
++				local_irq_enable();
++			}
++		}
++		leds_event(led_idle_end);
++		tick_nohz_restart_sched_tick();
++		preempt_enable_no_resched();
++		schedule();
++		preempt_disable();
++	}
++}
++
++static char reboot_mode = 'h';
++
++int __init reboot_setup(char *str)
++{
++	reboot_mode = str[0];
++	return 1;
++}
++
++__setup("reboot=", reboot_setup);
++
++void machine_halt(void)
++{
++}
++
++
++void machine_power_off(void)
++{
++	if (pm_power_off)
++		pm_power_off();
++}
++
++void machine_restart(char *cmd)
++{
++	arm_pm_restart(reboot_mode, cmd);
++}
++
++void __show_regs(struct pt_regs *regs)
++{
++	unsigned long flags;
++	char buf[64];
++
++	printk("CPU: %d    %s  (%s %.*s)\n",
++		raw_smp_processor_id(), print_tainted(),
++		init_utsname()->release,
++		(int)strcspn(init_utsname()->version, " "),
++		init_utsname()->version);
++	print_symbol("PC is at %s\n", instruction_pointer(regs));
++	print_symbol("LR is at %s\n", regs->ARM_lr);
++	printk("pc : [<%08lx>]    lr : [<%08lx>]    psr: %08lx\n"
++	       "sp : %08lx  ip : %08lx  fp : %08lx\n",
++		regs->ARM_pc, regs->ARM_lr, regs->ARM_cpsr,
++		regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
++	printk("r10: %08lx  r9 : %08lx  r8 : %08lx\n",
++		regs->ARM_r10, regs->ARM_r9,
++		regs->ARM_r8);
++	printk("r7 : %08lx  r6 : %08lx  r5 : %08lx  r4 : %08lx\n",
++		regs->ARM_r7, regs->ARM_r6,
++		regs->ARM_r5, regs->ARM_r4);
++	printk("r3 : %08lx  r2 : %08lx  r1 : %08lx  r0 : %08lx\n",
++		regs->ARM_r3, regs->ARM_r2,
++		regs->ARM_r1, regs->ARM_r0);
++
++	flags = regs->ARM_cpsr;
++	buf[0] = flags & PSR_N_BIT ? 'N' : 'n';
++	buf[1] = flags & PSR_Z_BIT ? 'Z' : 'z';
++	buf[2] = flags & PSR_C_BIT ? 'C' : 'c';
++	buf[3] = flags & PSR_V_BIT ? 'V' : 'v';
++	buf[4] = '\0';
++
++	printk("Flags: %s  IRQs o%s  FIQs o%s  Mode %s  ISA %s  Segment %s\n",
++		buf, interrupts_enabled(regs) ? "n" : "ff",
++		fast_interrupts_enabled(regs) ? "n" : "ff",
++		processor_modes[processor_mode(regs)],
++		isa_modes[isa_mode(regs)],
++		get_fs() == get_ds() ? "kernel" : "user");
++#ifdef CONFIG_CPU_CP15
++	{
++		unsigned int ctrl;
++
++		buf[0] = '\0';
++#ifdef CONFIG_CPU_CP15_MMU
++		{
++			unsigned int transbase, dac;
++			asm("mrc p15, 0, %0, c2, c0\n\t"
++			    "mrc p15, 0, %1, c3, c0\n"
++			    : "=r" (transbase), "=r" (dac));
++			snprintf(buf, sizeof(buf), "  Table: %08x  DAC: %08x",
++			  	transbase, dac);
++		}
++#endif
++		asm("mrc p15, 0, %0, c1, c0\n" : "=r" (ctrl));
++
++		printk("Control: %08x%s\n", ctrl, buf);
++	}
++#endif
++}
++
++void show_regs(struct pt_regs * regs)
++{
++	printk("\n");
++	printk("Pid: %d, comm: %20s\n", task_pid_nr(current), current->comm);
++	__show_regs(regs);
++	__backtrace();
++}
++
++ATOMIC_NOTIFIER_HEAD(thread_notify_head);
++
++EXPORT_SYMBOL_GPL(thread_notify_head);
++
++/*
++ * Free current thread data structures etc..
++ */
++void exit_thread(void)
++{
++	thread_notify(THREAD_NOTIFY_EXIT, current_thread_info());
++}
++
++void flush_thread(void)
++{
++	struct thread_info *thread = current_thread_info();
++	struct task_struct *tsk = current;
++
++	memset(thread->used_cp, 0, sizeof(thread->used_cp));
++	memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
++	memset(&thread->fpstate, 0, sizeof(union fp_state));
++
++	thread_notify(THREAD_NOTIFY_FLUSH, thread);
++}
++
++void release_thread(struct task_struct *dead_task)
++{
++}
++
++asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
++
++int
++copy_thread(unsigned long clone_flags, unsigned long stack_start,
++	    unsigned long stk_sz, struct task_struct *p, struct pt_regs *regs)
++{
++	struct thread_info *thread = task_thread_info(p);
++	struct pt_regs *childregs = task_pt_regs(p);
++
++	*childregs = *regs;
++	childregs->ARM_r0 = 0;
++	childregs->ARM_sp = stack_start;
++
++	memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save));
++	thread->cpu_context.sp = (unsigned long)childregs;
++	thread->cpu_context.pc = (unsigned long)ret_from_fork;
++
++	if (clone_flags & CLONE_SETTLS)
++		thread->tp_value = regs->ARM_r3;
++
++	return 0;
++}
++
++/*
++ * Fill in the task's elfregs structure for a core dump.
++ */
++int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs)
++{
++	elf_core_copy_regs(elfregs, task_pt_regs(t));
++	return 1;
++}
++
++/*
++ * fill in the fpe structure for a core dump...
++ */
++int dump_fpu (struct pt_regs *regs, struct user_fp *fp)
++{
++	struct thread_info *thread = current_thread_info();
++	int used_math = thread->used_cp[1] | thread->used_cp[2];
++
++	if (used_math)
++		memcpy(fp, &thread->fpstate.soft, sizeof (*fp));
++
++	return used_math != 0;
++}
++EXPORT_SYMBOL(dump_fpu);
++
++/*
++ * Shuffle the argument into the correct register before calling the
++ * thread function.  r4 is the thread argument, r5 is the pointer to
++ * the thread function, and r6 points to the exit function.
++ */
++extern void kernel_thread_helper(void);
++asm(	".pushsection .text\n"
++"	.align\n"
++"	.type	kernel_thread_helper, #function\n"
++"kernel_thread_helper:\n"
++#ifdef CONFIG_TRACE_IRQFLAGS
++"	bl	trace_hardirqs_on\n"
++#endif
++"	msr	cpsr_c, r7\n"
++"	mov	r0, r4\n"
++"	mov	lr, r6\n"
++"	mov	pc, r5\n"
++"	.size	kernel_thread_helper, . - kernel_thread_helper\n"
++"	.popsection");
++
++#ifdef CONFIG_ARM_UNWIND
++extern void kernel_thread_exit(long code);
++asm(	".pushsection .text\n"
++"	.align\n"
++"	.type	kernel_thread_exit, #function\n"
++"kernel_thread_exit:\n"
++"	.fnstart\n"
++"	.cantunwind\n"
++"	bl	do_exit\n"
++"	nop\n"
++"	.fnend\n"
++"	.size	kernel_thread_exit, . - kernel_thread_exit\n"
++"	.popsection");
++#else
++#define kernel_thread_exit	do_exit
++#endif
++
++/*
++ * Create a kernel thread.
++ */
++pid_t kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
++{
++	struct pt_regs regs;
++
++	memset(&regs, 0, sizeof(regs));
++
++	regs.ARM_r4 = (unsigned long)arg;
++	regs.ARM_r5 = (unsigned long)fn;
++	regs.ARM_r6 = (unsigned long)kernel_thread_exit;
++	regs.ARM_r7 = SVC_MODE | PSR_ENDSTATE | PSR_ISETSTATE;
++	regs.ARM_pc = (unsigned long)kernel_thread_helper;
++	regs.ARM_cpsr = regs.ARM_r7 | PSR_I_BIT;
++
++	return do_fork(flags|CLONE_VM|CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
++}
++EXPORT_SYMBOL(kernel_thread);
++
++unsigned long get_wchan(struct task_struct *p)
++{
++	struct stackframe frame;
++	int count = 0;
++	if (!p || p == current || p->state == TASK_RUNNING)
++		return 0;
++
++	frame.fp = thread_saved_fp(p);
++	frame.sp = thread_saved_sp(p);
++	frame.lr = 0;			/* recovered from the stack */
++	frame.pc = thread_saved_pc(p);
++	do {
++		int ret = unwind_frame(&frame);
++		if (ret < 0)
++			return 0;
++		if (!in_sched_functions(frame.pc))
++			return frame.pc;
++	} while (count ++ < 16);
++	return 0;
++}
+diff -rupN linux-2.6.35.11/arch/arm/kernel/setup.c linux-2.6.35.11-ts7500/arch/arm/kernel/setup.c
+--- linux-2.6.35.11/arch/arm/kernel/setup.c	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/kernel/setup.c	2011-03-14 11:18:24.000000000 -0400
+@@ -370,6 +370,7 @@ static struct machine_desc * __init setu
+ {
+ 	struct machine_desc *list;
+ 
++   //printk("setup_machine()\n");
+ 	/*
+ 	 * locate machine in the list of supported machines.
+ 	 */
+@@ -656,6 +657,7 @@ static void (*init_machine)(void) __init
+ 
+ static int __init customize_machine(void)
+ {
++   printk("customize_machine(), calling init_machine()\n");
+ 	/* customizes platform devices, or adds new ones */
+ 	if (init_machine)
+ 		init_machine();
+@@ -667,8 +669,10 @@ void __init setup_arch(char **cmdline_p)
+ {
+ 	struct tag *tags = (struct tag *)&init_tags;
+ 	struct machine_desc *mdesc;
+-	char *from = default_command_line;
++	char *from = default_command_line;               
+ 
++   //printk("setup_arch()\n");
++   
+ 	unwind_init();
+ 
+ 	setup_processor();
+@@ -726,6 +730,22 @@ void __init setup_arch(char **cmdline_p)
+ 	cpu_init();
+ 	tcm_init();
+ 
++#ifdef CONFIG_ARCH_STR9100
++	{
++		extern void __init str9100_early_init(void);
++
++		str9100_early_init();
++	}
++#endif
++
++#ifdef CONFIG_ARCH_STR8100
++	{
++		extern void __init str8100_early_init(void);
++
++		str8100_early_init();
++	}
++#endif   
++   
+ 	/*
+ 	 * Set up various architecture-specific pointers
+ 	 */
+@@ -760,9 +780,11 @@ subsys_initcall(topology_init);
+ 
+ #ifdef CONFIG_HAVE_PROC_CPU
+ static int __init proc_cpu_init(void)
+-{
++{   
+ 	struct proc_dir_entry *res;
+ 
++   printk("proc_cpu_init()\n");
++   
+ 	res = proc_mkdir("cpu", NULL);
+ 	if (!res)
+ 		return -ENOMEM;
+diff -rupN linux-2.6.35.11/arch/arm/kernel/setup.c.orig linux-2.6.35.11-ts7500/arch/arm/kernel/setup.c.orig
+--- linux-2.6.35.11/arch/arm/kernel/setup.c.orig	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/kernel/setup.c.orig	2011-02-06 14:04:07.000000000 -0500
+@@ -0,0 +1,876 @@
++/*
++ *  linux/arch/arm/kernel/setup.c
++ *
++ *  Copyright (C) 1995-2001 Russell King
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/stddef.h>
++#include <linux/ioport.h>
++#include <linux/delay.h>
++#include <linux/utsname.h>
++#include <linux/initrd.h>
++#include <linux/console.h>
++#include <linux/bootmem.h>
++#include <linux/seq_file.h>
++#include <linux/screen_info.h>
++#include <linux/init.h>
++#include <linux/root_dev.h>
++#include <linux/cpu.h>
++#include <linux/interrupt.h>
++#include <linux/smp.h>
++#include <linux/fs.h>
++#include <linux/proc_fs.h>
++
++#include <asm/unified.h>
++#include <asm/cpu.h>
++#include <asm/cputype.h>
++#include <asm/elf.h>
++#include <asm/procinfo.h>
++#include <asm/sections.h>
++#include <asm/setup.h>
++#include <asm/mach-types.h>
++#include <asm/cacheflush.h>
++#include <asm/cachetype.h>
++#include <asm/tlbflush.h>
++
++#include <asm/mach/arch.h>
++#include <asm/mach/irq.h>
++#include <asm/mach/time.h>
++#include <asm/traps.h>
++#include <asm/unwind.h>
++
++#include "compat.h"
++#include "atags.h"
++#include "tcm.h"
++
++#ifndef MEM_SIZE
++#define MEM_SIZE	(16*1024*1024)
++#endif
++
++#if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
++char fpe_type[8];
++
++static int __init fpe_setup(char *line)
++{
++	memcpy(fpe_type, line, 8);
++	return 1;
++}
++
++__setup("fpe=", fpe_setup);
++#endif
++
++extern void paging_init(struct machine_desc *desc);
++extern void reboot_setup(char *str);
++
++unsigned int processor_id;
++EXPORT_SYMBOL(processor_id);
++unsigned int __machine_arch_type;
++EXPORT_SYMBOL(__machine_arch_type);
++unsigned int cacheid;
++EXPORT_SYMBOL(cacheid);
++
++unsigned int __atags_pointer __initdata;
++
++unsigned int system_rev;
++EXPORT_SYMBOL(system_rev);
++
++unsigned int system_serial_low;
++EXPORT_SYMBOL(system_serial_low);
++
++unsigned int system_serial_high;
++EXPORT_SYMBOL(system_serial_high);
++
++unsigned int elf_hwcap;
++EXPORT_SYMBOL(elf_hwcap);
++
++
++#ifdef MULTI_CPU
++struct processor processor;
++#endif
++#ifdef MULTI_TLB
++struct cpu_tlb_fns cpu_tlb;
++#endif
++#ifdef MULTI_USER
++struct cpu_user_fns cpu_user;
++#endif
++#ifdef MULTI_CACHE
++struct cpu_cache_fns cpu_cache;
++#endif
++#ifdef CONFIG_OUTER_CACHE
++struct outer_cache_fns outer_cache;
++EXPORT_SYMBOL(outer_cache);
++#endif
++
++struct stack {
++	u32 irq[3];
++	u32 abt[3];
++	u32 und[3];
++} ____cacheline_aligned;
++
++static struct stack stacks[NR_CPUS];
++
++char elf_platform[ELF_PLATFORM_SIZE];
++EXPORT_SYMBOL(elf_platform);
++
++static const char *cpu_name;
++static const char *machine_name;
++static char __initdata cmd_line[COMMAND_LINE_SIZE];
++
++static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
++static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } };
++#define ENDIANNESS ((char)endian_test.l)
++
++DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data);
++
++/*
++ * Standard memory resources
++ */
++static struct resource mem_res[] = {
++	{
++		.name = "Video RAM",
++		.start = 0,
++		.end = 0,
++		.flags = IORESOURCE_MEM
++	},
++	{
++		.name = "Kernel text",
++		.start = 0,
++		.end = 0,
++		.flags = IORESOURCE_MEM
++	},
++	{
++		.name = "Kernel data",
++		.start = 0,
++		.end = 0,
++		.flags = IORESOURCE_MEM
++	}
++};
++
++#define video_ram   mem_res[0]
++#define kernel_code mem_res[1]
++#define kernel_data mem_res[2]
++
++static struct resource io_res[] = {
++	{
++		.name = "reserved",
++		.start = 0x3bc,
++		.end = 0x3be,
++		.flags = IORESOURCE_IO | IORESOURCE_BUSY
++	},
++	{
++		.name = "reserved",
++		.start = 0x378,
++		.end = 0x37f,
++		.flags = IORESOURCE_IO | IORESOURCE_BUSY
++	},
++	{
++		.name = "reserved",
++		.start = 0x278,
++		.end = 0x27f,
++		.flags = IORESOURCE_IO | IORESOURCE_BUSY
++	}
++};
++
++#define lp0 io_res[0]
++#define lp1 io_res[1]
++#define lp2 io_res[2]
++
++static const char *proc_arch[] = {
++	"undefined/unknown",
++	"3",
++	"4",
++	"4T",
++	"5",
++	"5T",
++	"5TE",
++	"5TEJ",
++	"6TEJ",
++	"7",
++	"?(11)",
++	"?(12)",
++	"?(13)",
++	"?(14)",
++	"?(15)",
++	"?(16)",
++	"?(17)",
++};
++
++int cpu_architecture(void)
++{
++	int cpu_arch;
++
++	if ((read_cpuid_id() & 0x0008f000) == 0) {
++		cpu_arch = CPU_ARCH_UNKNOWN;
++	} else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
++		cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
++	} else if ((read_cpuid_id() & 0x00080000) == 0x00000000) {
++		cpu_arch = (read_cpuid_id() >> 16) & 7;
++		if (cpu_arch)
++			cpu_arch += CPU_ARCH_ARMv3;
++	} else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
++		unsigned int mmfr0;
++
++		/* Revised CPUID format. Read the Memory Model Feature
++		 * Register 0 and check for VMSAv7 or PMSAv7 */
++		asm("mrc	p15, 0, %0, c0, c1, 4"
++		    : "=r" (mmfr0));
++		if ((mmfr0 & 0x0000000f) == 0x00000003 ||
++		    (mmfr0 & 0x000000f0) == 0x00000030)
++			cpu_arch = CPU_ARCH_ARMv7;
++		else if ((mmfr0 & 0x0000000f) == 0x00000002 ||
++			 (mmfr0 & 0x000000f0) == 0x00000020)
++			cpu_arch = CPU_ARCH_ARMv6;
++		else
++			cpu_arch = CPU_ARCH_UNKNOWN;
++	} else
++		cpu_arch = CPU_ARCH_UNKNOWN;
++
++	return cpu_arch;
++}
++
++static void __init cacheid_init(void)
++{
++	unsigned int cachetype = read_cpuid_cachetype();
++	unsigned int arch = cpu_architecture();
++
++	if (arch >= CPU_ARCH_ARMv6) {
++		if ((cachetype & (7 << 29)) == 4 << 29) {
++			/* ARMv7 register format */
++			cacheid = CACHEID_VIPT_NONALIASING;
++			if ((cachetype & (3 << 14)) == 1 << 14)
++				cacheid |= CACHEID_ASID_TAGGED;
++		} else if (cachetype & (1 << 23))
++			cacheid = CACHEID_VIPT_ALIASING;
++		else
++			cacheid = CACHEID_VIPT_NONALIASING;
++	} else {
++		cacheid = CACHEID_VIVT;
++	}
++
++	printk("CPU: %s data cache, %s instruction cache\n",
++		cache_is_vivt() ? "VIVT" :
++		cache_is_vipt_aliasing() ? "VIPT aliasing" :
++		cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown",
++		cache_is_vivt() ? "VIVT" :
++		icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
++		cache_is_vipt_aliasing() ? "VIPT aliasing" :
++		cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
++}
++
++/*
++ * These functions re-use the assembly code in head.S, which
++ * already provide the required functionality.
++ */
++extern struct proc_info_list *lookup_processor_type(unsigned int);
++extern struct machine_desc *lookup_machine_type(unsigned int);
++
++static void __init setup_processor(void)
++{
++	struct proc_info_list *list;
++
++	/*
++	 * locate processor in the list of supported processor
++	 * types.  The linker builds this table for us from the
++	 * entries in arch/arm/mm/proc-*.S
++	 */
++	list = lookup_processor_type(read_cpuid_id());
++	if (!list) {
++		printk("CPU configuration botched (ID %08x), unable "
++		       "to continue.\n", read_cpuid_id());
++		while (1);
++	}
++
++	cpu_name = list->cpu_name;
++
++#ifdef MULTI_CPU
++	processor = *list->proc;
++#endif
++#ifdef MULTI_TLB
++	cpu_tlb = *list->tlb;
++#endif
++#ifdef MULTI_USER
++	cpu_user = *list->user;
++#endif
++#ifdef MULTI_CACHE
++	cpu_cache = *list->cache;
++#endif
++
++	printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
++	       cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
++	       proc_arch[cpu_architecture()], cr_alignment);
++
++	sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
++	sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
++	elf_hwcap = list->elf_hwcap;
++#ifndef CONFIG_ARM_THUMB
++	elf_hwcap &= ~HWCAP_THUMB;
++#endif
++
++	cacheid_init();
++	cpu_proc_init();
++}
++
++/*
++ * cpu_init - initialise one CPU.
++ *
++ * cpu_init sets up the per-CPU stacks.
++ */
++void cpu_init(void)
++{
++	unsigned int cpu = smp_processor_id();
++	struct stack *stk = &stacks[cpu];
++
++	if (cpu >= NR_CPUS) {
++		printk(KERN_CRIT "CPU%u: bad primary CPU number\n", cpu);
++		BUG();
++	}
++
++	/*
++	 * Define the placement constraint for the inline asm directive below.
++	 * In Thumb-2, msr with an immediate value is not allowed.
++	 */
++#ifdef CONFIG_THUMB2_KERNEL
++#define PLC	"r"
++#else
++#define PLC	"I"
++#endif
++
++	/*
++	 * setup stacks for re-entrant exception handlers
++	 */
++	__asm__ (
++	"msr	cpsr_c, %1\n\t"
++	"add	r14, %0, %2\n\t"
++	"mov	sp, r14\n\t"
++	"msr	cpsr_c, %3\n\t"
++	"add	r14, %0, %4\n\t"
++	"mov	sp, r14\n\t"
++	"msr	cpsr_c, %5\n\t"
++	"add	r14, %0, %6\n\t"
++	"mov	sp, r14\n\t"
++	"msr	cpsr_c, %7"
++	    :
++	    : "r" (stk),
++	      PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
++	      "I" (offsetof(struct stack, irq[0])),
++	      PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
++	      "I" (offsetof(struct stack, abt[0])),
++	      PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
++	      "I" (offsetof(struct stack, und[0])),
++	      PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
++	    : "r14");
++}
++
++static struct machine_desc * __init setup_machine(unsigned int nr)
++{
++	struct machine_desc *list;
++
++	/*
++	 * locate machine in the list of supported machines.
++	 */
++	list = lookup_machine_type(nr);
++	if (!list) {
++		printk("Machine configuration botched (nr %d), unable "
++		       "to continue.\n", nr);
++		while (1);
++	}
++
++	printk("Machine: %s\n", list->name);
++
++	return list;
++}
++
++static int __init arm_add_memory(unsigned long start, unsigned long size)
++{
++	struct membank *bank = &meminfo.bank[meminfo.nr_banks];
++
++	if (meminfo.nr_banks >= NR_BANKS) {
++		printk(KERN_CRIT "NR_BANKS too low, "
++			"ignoring memory at %#lx\n", start);
++		return -EINVAL;
++	}
++
++	/*
++	 * Ensure that start/size are aligned to a page boundary.
++	 * Size is appropriately rounded down, start is rounded up.
++	 */
++	size -= start & ~PAGE_MASK;
++	bank->start = PAGE_ALIGN(start);
++	bank->size  = size & PAGE_MASK;
++	bank->node  = PHYS_TO_NID(start);
++
++	/*
++	 * Check whether this memory region has non-zero size or
++	 * invalid node number.
++	 */
++	if (bank->size == 0 || bank->node >= MAX_NUMNODES)
++		return -EINVAL;
++
++	meminfo.nr_banks++;
++	return 0;
++}
++
++/*
++ * Pick out the memory size.  We look for mem=size@start,
++ * where start and size are "size[KkMm]"
++ */
++static int __init early_mem(char *p)
++{
++	static int usermem __initdata = 0;
++	unsigned long size, start;
++	char *endp;
++
++	/*
++	 * If the user specifies memory size, we
++	 * blow away any automatically generated
++	 * size.
++	 */
++	if (usermem == 0) {
++		usermem = 1;
++		meminfo.nr_banks = 0;
++	}
++
++	start = PHYS_OFFSET;
++	size  = memparse(p, &endp);
++	if (*endp == '@')
++		start = memparse(endp + 1, NULL);
++
++	arm_add_memory(start, size);
++
++	return 0;
++}
++early_param("mem", early_mem);
++
++static void __init
++setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz)
++{
++#ifdef CONFIG_BLK_DEV_RAM
++	extern int rd_size, rd_image_start, rd_prompt, rd_doload;
++
++	rd_image_start = image_start;
++	rd_prompt = prompt;
++	rd_doload = doload;
++
++	if (rd_sz)
++		rd_size = rd_sz;
++#endif
++}
++
++static void __init
++request_standard_resources(struct meminfo *mi, struct machine_desc *mdesc)
++{
++	struct resource *res;
++	int i;
++
++	kernel_code.start   = virt_to_phys(_text);
++	kernel_code.end     = virt_to_phys(_etext - 1);
++	kernel_data.start   = virt_to_phys(_data);
++	kernel_data.end     = virt_to_phys(_end - 1);
++
++	for (i = 0; i < mi->nr_banks; i++) {
++		if (mi->bank[i].size == 0)
++			continue;
++
++		res = alloc_bootmem_low(sizeof(*res));
++		res->name  = "System RAM";
++		res->start = mi->bank[i].start;
++		res->end   = mi->bank[i].start + mi->bank[i].size - 1;
++		res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
++
++		request_resource(&iomem_resource, res);
++
++		if (kernel_code.start >= res->start &&
++		    kernel_code.end <= res->end)
++			request_resource(res, &kernel_code);
++		if (kernel_data.start >= res->start &&
++		    kernel_data.end <= res->end)
++			request_resource(res, &kernel_data);
++	}
++
++	if (mdesc->video_start) {
++		video_ram.start = mdesc->video_start;
++		video_ram.end   = mdesc->video_end;
++		request_resource(&iomem_resource, &video_ram);
++	}
++
++	/*
++	 * Some machines don't have the possibility of ever
++	 * possessing lp0, lp1 or lp2
++	 */
++	if (mdesc->reserve_lp0)
++		request_resource(&ioport_resource, &lp0);
++	if (mdesc->reserve_lp1)
++		request_resource(&ioport_resource, &lp1);
++	if (mdesc->reserve_lp2)
++		request_resource(&ioport_resource, &lp2);
++}
++
++/*
++ *  Tag parsing.
++ *
++ * This is the new way of passing data to the kernel at boot time.  Rather
++ * than passing a fixed inflexible structure to the kernel, we pass a list
++ * of variable-sized tags to the kernel.  The first tag must be a ATAG_CORE
++ * tag for the list to be recognised (to distinguish the tagged list from
++ * a param_struct).  The list is terminated with a zero-length tag (this tag
++ * is not parsed in any way).
++ */
++static int __init parse_tag_core(const struct tag *tag)
++{
++	if (tag->hdr.size > 2) {
++		if ((tag->u.core.flags & 1) == 0)
++			root_mountflags &= ~MS_RDONLY;
++		ROOT_DEV = old_decode_dev(tag->u.core.rootdev);
++	}
++	return 0;
++}
++
++__tagtable(ATAG_CORE, parse_tag_core);
++
++static int __init parse_tag_mem32(const struct tag *tag)
++{
++	return arm_add_memory(tag->u.mem.start, tag->u.mem.size);
++}
++
++__tagtable(ATAG_MEM, parse_tag_mem32);
++
++#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
++struct screen_info screen_info = {
++ .orig_video_lines	= 30,
++ .orig_video_cols	= 80,
++ .orig_video_mode	= 0,
++ .orig_video_ega_bx	= 0,
++ .orig_video_isVGA	= 1,
++ .orig_video_points	= 8
++};
++
++static int __init parse_tag_videotext(const struct tag *tag)
++{
++	screen_info.orig_x            = tag->u.videotext.x;
++	screen_info.orig_y            = tag->u.videotext.y;
++	screen_info.orig_video_page   = tag->u.videotext.video_page;
++	screen_info.orig_video_mode   = tag->u.videotext.video_mode;
++	screen_info.orig_video_cols   = tag->u.videotext.video_cols;
++	screen_info.orig_video_ega_bx = tag->u.videotext.video_ega_bx;
++	screen_info.orig_video_lines  = tag->u.videotext.video_lines;
++	screen_info.orig_video_isVGA  = tag->u.videotext.video_isvga;
++	screen_info.orig_video_points = tag->u.videotext.video_points;
++	return 0;
++}
++
++__tagtable(ATAG_VIDEOTEXT, parse_tag_videotext);
++#endif
++
++static int __init parse_tag_ramdisk(const struct tag *tag)
++{
++	setup_ramdisk((tag->u.ramdisk.flags & 1) == 0,
++		      (tag->u.ramdisk.flags & 2) == 0,
++		      tag->u.ramdisk.start, tag->u.ramdisk.size);
++	return 0;
++}
++
++__tagtable(ATAG_RAMDISK, parse_tag_ramdisk);
++
++static int __init parse_tag_serialnr(const struct tag *tag)
++{
++	system_serial_low = tag->u.serialnr.low;
++	system_serial_high = tag->u.serialnr.high;
++	return 0;
++}
++
++__tagtable(ATAG_SERIAL, parse_tag_serialnr);
++
++static int __init parse_tag_revision(const struct tag *tag)
++{
++	system_rev = tag->u.revision.rev;
++	return 0;
++}
++
++__tagtable(ATAG_REVISION, parse_tag_revision);
++
++#ifndef CONFIG_CMDLINE_FORCE
++static int __init parse_tag_cmdline(const struct tag *tag)
++{
++	strlcpy(default_command_line, tag->u.cmdline.cmdline, COMMAND_LINE_SIZE);
++	return 0;
++}
++
++__tagtable(ATAG_CMDLINE, parse_tag_cmdline);
++#endif /* CONFIG_CMDLINE_FORCE */
++
++/*
++ * Scan the tag table for this tag, and call its parse function.
++ * The tag table is built by the linker from all the __tagtable
++ * declarations.
++ */
++static int __init parse_tag(const struct tag *tag)
++{
++	extern struct tagtable __tagtable_begin, __tagtable_end;
++	struct tagtable *t;
++
++	for (t = &__tagtable_begin; t < &__tagtable_end; t++)
++		if (tag->hdr.tag == t->tag) {
++			t->parse(tag);
++			break;
++		}
++
++	return t < &__tagtable_end;
++}
++
++/*
++ * Parse all tags in the list, checking both the global and architecture
++ * specific tag tables.
++ */
++static void __init parse_tags(const struct tag *t)
++{
++	for (; t->hdr.size; t = tag_next(t))
++		if (!parse_tag(t))
++			printk(KERN_WARNING
++				"Ignoring unrecognised tag 0x%08x\n",
++				t->hdr.tag);
++}
++
++/*
++ * This holds our defaults.
++ */
++static struct init_tags {
++	struct tag_header hdr1;
++	struct tag_core   core;
++	struct tag_header hdr2;
++	struct tag_mem32  mem;
++	struct tag_header hdr3;
++} init_tags __initdata = {
++	{ tag_size(tag_core), ATAG_CORE },
++	{ 1, PAGE_SIZE, 0xff },
++	{ tag_size(tag_mem32), ATAG_MEM },
++	{ MEM_SIZE, PHYS_OFFSET },
++	{ 0, ATAG_NONE }
++};
++
++static void (*init_machine)(void) __initdata;
++
++static int __init customize_machine(void)
++{
++	/* customizes platform devices, or adds new ones */
++	if (init_machine)
++		init_machine();
++	return 0;
++}
++arch_initcall(customize_machine);
++
++void __init setup_arch(char **cmdline_p)
++{
++	struct tag *tags = (struct tag *)&init_tags;
++	struct machine_desc *mdesc;
++	char *from = default_command_line;
++
++	unwind_init();
++
++	setup_processor();
++	mdesc = setup_machine(machine_arch_type);
++	machine_name = mdesc->name;
++
++	if (mdesc->soft_reboot)
++		reboot_setup("s");
++
++	if (__atags_pointer)
++		tags = phys_to_virt(__atags_pointer);
++	else if (mdesc->boot_params)
++		tags = phys_to_virt(mdesc->boot_params);
++
++	/*
++	 * If we have the old style parameters, convert them to
++	 * a tag list.
++	 */
++	if (tags->hdr.tag != ATAG_CORE)
++		convert_to_tag_list(tags);
++	if (tags->hdr.tag != ATAG_CORE)
++		tags = (struct tag *)&init_tags;
++
++	if (mdesc->fixup)
++		mdesc->fixup(mdesc, tags, &from, &meminfo);
++
++	if (tags->hdr.tag == ATAG_CORE) {
++		if (meminfo.nr_banks != 0)
++			squash_mem_tags(tags);
++		save_atags(tags);
++		parse_tags(tags);
++	}
++
++	init_mm.start_code = (unsigned long) _text;
++	init_mm.end_code   = (unsigned long) _etext;
++	init_mm.end_data   = (unsigned long) _edata;
++	init_mm.brk	   = (unsigned long) _end;
++
++	/* parse_early_param needs a boot_command_line */
++	strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
++
++	/* populate cmd_line too for later use, preserving boot_command_line */
++	strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
++	*cmdline_p = cmd_line;
++
++	parse_early_param();
++
++	paging_init(mdesc);
++	request_standard_resources(&meminfo, mdesc);
++
++#ifdef CONFIG_SMP
++	smp_init_cpus();
++#endif
++
++	cpu_init();
++	tcm_init();
++
++	/*
++	 * Set up various architecture-specific pointers
++	 */
++	init_arch_irq = mdesc->init_irq;
++	system_timer = mdesc->timer;
++	init_machine = mdesc->init_machine;
++
++#ifdef CONFIG_VT
++#if defined(CONFIG_VGA_CONSOLE)
++	conswitchp = &vga_con;
++#elif defined(CONFIG_DUMMY_CONSOLE)
++	conswitchp = &dummy_con;
++#endif
++#endif
++	early_trap_init();
++}
++
++
++static int __init topology_init(void)
++{
++	int cpu;
++
++	for_each_possible_cpu(cpu) {
++		struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu);
++		cpuinfo->cpu.hotpluggable = 1;
++		register_cpu(&cpuinfo->cpu, cpu);
++	}
++
++	return 0;
++}
++subsys_initcall(topology_init);
++
++#ifdef CONFIG_HAVE_PROC_CPU
++static int __init proc_cpu_init(void)
++{
++	struct proc_dir_entry *res;
++
++	res = proc_mkdir("cpu", NULL);
++	if (!res)
++		return -ENOMEM;
++	return 0;
++}
++fs_initcall(proc_cpu_init);
++#endif
++
++static const char *hwcap_str[] = {
++	"swp",
++	"half",
++	"thumb",
++	"26bit",
++	"fastmult",
++	"fpa",
++	"vfp",
++	"edsp",
++	"java",
++	"iwmmxt",
++	"crunch",
++	"thumbee",
++	"neon",
++	"vfpv3",
++	"vfpv3d16",
++	NULL
++};
++
++static int c_show(struct seq_file *m, void *v)
++{
++	int i;
++
++	seq_printf(m, "Processor\t: %s rev %d (%s)\n",
++		   cpu_name, read_cpuid_id() & 15, elf_platform);
++
++#if defined(CONFIG_SMP)
++	for_each_online_cpu(i) {
++		/*
++		 * glibc reads /proc/cpuinfo to determine the number of
++		 * online processors, looking for lines beginning with
++		 * "processor".  Give glibc what it expects.
++		 */
++		seq_printf(m, "processor\t: %d\n", i);
++		seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
++			   per_cpu(cpu_data, i).loops_per_jiffy / (500000UL/HZ),
++			   (per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ)) % 100);
++	}
++#else /* CONFIG_SMP */
++	seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
++		   loops_per_jiffy / (500000/HZ),
++		   (loops_per_jiffy / (5000/HZ)) % 100);
++#endif
++
++	/* dump out the processor features */
++	seq_puts(m, "Features\t: ");
++
++	for (i = 0; hwcap_str[i]; i++)
++		if (elf_hwcap & (1 << i))
++			seq_printf(m, "%s ", hwcap_str[i]);
++
++	seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
++	seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]);
++
++	if ((read_cpuid_id() & 0x0008f000) == 0x00000000) {
++		/* pre-ARM7 */
++		seq_printf(m, "CPU part\t: %07x\n", read_cpuid_id() >> 4);
++	} else {
++		if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
++			/* ARM7 */
++			seq_printf(m, "CPU variant\t: 0x%02x\n",
++				   (read_cpuid_id() >> 16) & 127);
++		} else {
++			/* post-ARM7 */
++			seq_printf(m, "CPU variant\t: 0x%x\n",
++				   (read_cpuid_id() >> 20) & 15);
++		}
++		seq_printf(m, "CPU part\t: 0x%03x\n",
++			   (read_cpuid_id() >> 4) & 0xfff);
++	}
++	seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
++
++	seq_puts(m, "\n");
++
++	seq_printf(m, "Hardware\t: %s\n", machine_name);
++	seq_printf(m, "Revision\t: %04x\n", system_rev);
++	seq_printf(m, "Serial\t\t: %08x%08x\n",
++		   system_serial_high, system_serial_low);
++
++	return 0;
++}
++
++static void *c_start(struct seq_file *m, loff_t *pos)
++{
++	return *pos < 1 ? (void *)1 : NULL;
++}
++
++static void *c_next(struct seq_file *m, void *v, loff_t *pos)
++{
++	++*pos;
++	return NULL;
++}
++
++static void c_stop(struct seq_file *m, void *v)
++{
++}
++
++const struct seq_operations cpuinfo_op = {
++	.start	= c_start,
++	.next	= c_next,
++	.stop	= c_stop,
++	.show	= c_show
++};
+diff -rupN linux-2.6.35.11/arch/arm/kernel/traps.c linux-2.6.35.11-ts7500/arch/arm/kernel/traps.c
+--- linux-2.6.35.11/arch/arm/kernel/traps.c	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/kernel/traps.c	2011-03-14 11:18:24.000000000 -0400
+@@ -467,7 +467,7 @@ asmlinkage int arm_syscall(int no, struc
+ {
+ 	struct thread_info *thread = current_thread_info();
+ 	siginfo_t info;
+-
++	
+ 	if ((no >> 16) != (__ARM_NR_BASE>> 16))
+ 		return bad_syscall(no, regs);
+ 
+diff -rupN linux-2.6.35.11/arch/arm/kernel/traps.c.orig linux-2.6.35.11-ts7500/arch/arm/kernel/traps.c.orig
+--- linux-2.6.35.11/arch/arm/kernel/traps.c.orig	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/kernel/traps.c.orig	2011-02-06 14:04:07.000000000 -0500
+@@ -0,0 +1,774 @@
++/*
++ *  linux/arch/arm/kernel/traps.c
++ *
++ *  Copyright (C) 1995-2009 Russell King
++ *  Fragments that appear the same as linux/arch/i386/kernel/traps.c (C) Linus Torvalds
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ *  'traps.c' handles hardware exceptions after we have saved some state in
++ *  'linux/arch/arm/lib/traps.S'.  Mostly a debugging aid, but will probably
++ *  kill the offending process.
++ */
++#include <linux/signal.h>
++#include <linux/personality.h>
++#include <linux/kallsyms.h>
++#include <linux/spinlock.h>
++#include <linux/uaccess.h>
++#include <linux/hardirq.h>
++#include <linux/kdebug.h>
++#include <linux/module.h>
++#include <linux/kexec.h>
++#include <linux/delay.h>
++#include <linux/init.h>
++
++#include <asm/atomic.h>
++#include <asm/cacheflush.h>
++#include <asm/system.h>
++#include <asm/unistd.h>
++#include <asm/traps.h>
++#include <asm/unwind.h>
++
++#include "ptrace.h"
++#include "signal.h"
++
++static const char *handler[]= { "prefetch abort", "data abort", "address exception", "interrupt" };
++
++#ifdef CONFIG_DEBUG_USER
++unsigned int user_debug;
++
++static int __init user_debug_setup(char *str)
++{
++	get_option(&str, &user_debug);
++	return 1;
++}
++__setup("user_debug=", user_debug_setup);
++#endif
++
++static void dump_mem(const char *, const char *, unsigned long, unsigned long);
++
++void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame)
++{
++#ifdef CONFIG_KALLSYMS
++	char sym1[KSYM_SYMBOL_LEN], sym2[KSYM_SYMBOL_LEN];
++	sprint_symbol(sym1, where);
++	sprint_symbol(sym2, from);
++	printk("[<%08lx>] (%s) from [<%08lx>] (%s)\n", where, sym1, from, sym2);
++#else
++	printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from);
++#endif
++
++	if (in_exception_text(where))
++		dump_mem("", "Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs));
++}
++
++#ifndef CONFIG_ARM_UNWIND
++/*
++ * Stack pointers should always be within the kernels view of
++ * physical memory.  If it is not there, then we can't dump
++ * out any information relating to the stack.
++ */
++static int verify_stack(unsigned long sp)
++{
++	if (sp < PAGE_OFFSET ||
++	    (sp > (unsigned long)high_memory && high_memory != NULL))
++		return -EFAULT;
++
++	return 0;
++}
++#endif
++
++/*
++ * Dump out the contents of some memory nicely...
++ */
++static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
++		     unsigned long top)
++{
++	unsigned long first;
++	mm_segment_t fs;
++	int i;
++
++	/*
++	 * We need to switch to kernel mode so that we can use __get_user
++	 * to safely read from kernel space.  Note that we now dump the
++	 * code first, just in case the backtrace kills us.
++	 */
++	fs = get_fs();
++	set_fs(KERNEL_DS);
++
++	printk("%s%s(0x%08lx to 0x%08lx)\n", lvl, str, bottom, top);
++
++	for (first = bottom & ~31; first < top; first += 32) {
++		unsigned long p;
++		char str[sizeof(" 12345678") * 8 + 1];
++
++		memset(str, ' ', sizeof(str));
++		str[sizeof(str) - 1] = '\0';
++
++		for (p = first, i = 0; i < 8 && p < top; i++, p += 4) {
++			if (p >= bottom && p < top) {
++				unsigned long val;
++				if (__get_user(val, (unsigned long *)p) == 0)
++					sprintf(str + i * 9, " %08lx", val);
++				else
++					sprintf(str + i * 9, " ????????");
++			}
++		}
++		printk("%s%04lx:%s\n", lvl, first & 0xffff, str);
++	}
++
++	set_fs(fs);
++}
++
++static void dump_instr(const char *lvl, struct pt_regs *regs)
++{
++	unsigned long addr = instruction_pointer(regs);
++	const int thumb = thumb_mode(regs);
++	const int width = thumb ? 4 : 8;
++	mm_segment_t fs;
++	char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
++	int i;
++
++	/*
++	 * We need to switch to kernel mode so that we can use __get_user
++	 * to safely read from kernel space.  Note that we now dump the
++	 * code first, just in case the backtrace kills us.
++	 */
++	fs = get_fs();
++	set_fs(KERNEL_DS);
++
++	for (i = -4; i < 1; i++) {
++		unsigned int val, bad;
++
++		if (thumb)
++			bad = __get_user(val, &((u16 *)addr)[i]);
++		else
++			bad = __get_user(val, &((u32 *)addr)[i]);
++
++		if (!bad)
++			p += sprintf(p, i == 0 ? "(%0*x) " : "%0*x ",
++					width, val);
++		else {
++			p += sprintf(p, "bad PC value");
++			break;
++		}
++	}
++	printk("%sCode: %s\n", lvl, str);
++
++	set_fs(fs);
++}
++
++#ifdef CONFIG_ARM_UNWIND
++static inline void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
++{
++	unwind_backtrace(regs, tsk);
++}
++#else
++static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
++{
++	unsigned int fp, mode;
++	int ok = 1;
++
++	printk("Backtrace: ");
++
++	if (!tsk)
++		tsk = current;
++
++	if (regs) {
++		fp = regs->ARM_fp;
++		mode = processor_mode(regs);
++	} else if (tsk != current) {
++		fp = thread_saved_fp(tsk);
++		mode = 0x10;
++	} else {
++		asm("mov %0, fp" : "=r" (fp) : : "cc");
++		mode = 0x10;
++	}
++
++	if (!fp) {
++		printk("no frame pointer");
++		ok = 0;
++	} else if (verify_stack(fp)) {
++		printk("invalid frame pointer 0x%08x", fp);
++		ok = 0;
++	} else if (fp < (unsigned long)end_of_stack(tsk))
++		printk("frame pointer underflow");
++	printk("\n");
++
++	if (ok)
++		c_backtrace(fp, mode);
++}
++#endif
++
++void dump_stack(void)
++{
++	dump_backtrace(NULL, NULL);
++}
++
++EXPORT_SYMBOL(dump_stack);
++
++void show_stack(struct task_struct *tsk, unsigned long *sp)
++{
++	dump_backtrace(NULL, tsk);
++	barrier();
++}
++
++#ifdef CONFIG_PREEMPT
++#define S_PREEMPT " PREEMPT"
++#else
++#define S_PREEMPT ""
++#endif
++#ifdef CONFIG_SMP
++#define S_SMP " SMP"
++#else
++#define S_SMP ""
++#endif
++
++static int __die(const char *str, int err, struct thread_info *thread, struct pt_regs *regs)
++{
++	struct task_struct *tsk = thread->task;
++	static int die_counter;
++	int ret;
++
++	printk(KERN_EMERG "Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
++	       str, err, ++die_counter);
++	sysfs_printk_last_file();
++
++	/* trap and error numbers are mostly meaningless on ARM */
++	ret = notify_die(DIE_OOPS, str, regs, err, tsk->thread.trap_no, SIGSEGV);
++	if (ret == NOTIFY_STOP)
++		return ret;
++
++	print_modules();
++	__show_regs(regs);
++	printk(KERN_EMERG "Process %.*s (pid: %d, stack limit = 0x%p)\n",
++		TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), thread + 1);
++
++	if (!user_mode(regs) || in_interrupt()) {
++		dump_mem(KERN_EMERG, "Stack: ", regs->ARM_sp,
++			 THREAD_SIZE + (unsigned long)task_stack_page(tsk));
++		dump_backtrace(regs, tsk);
++		dump_instr(KERN_EMERG, regs);
++	}
++
++	return ret;
++}
++
++DEFINE_SPINLOCK(die_lock);
++
++/*
++ * This function is protected against re-entrancy.
++ */
++void die(const char *str, struct pt_regs *regs, int err)
++{
++	struct thread_info *thread = current_thread_info();
++	int ret;
++
++	oops_enter();
++
++	spin_lock_irq(&die_lock);
++	console_verbose();
++	bust_spinlocks(1);
++	ret = __die(str, err, thread, regs);
++
++	if (regs && kexec_should_crash(thread->task))
++		crash_kexec(regs);
++
++	bust_spinlocks(0);
++	add_taint(TAINT_DIE);
++	spin_unlock_irq(&die_lock);
++	oops_exit();
++
++	if (in_interrupt())
++		panic("Fatal exception in interrupt");
++	if (panic_on_oops)
++		panic("Fatal exception");
++	if (ret != NOTIFY_STOP)
++		do_exit(SIGSEGV);
++}
++
++void arm_notify_die(const char *str, struct pt_regs *regs,
++		struct siginfo *info, unsigned long err, unsigned long trap)
++{
++	if (user_mode(regs)) {
++		current->thread.error_code = err;
++		current->thread.trap_no = trap;
++
++		force_sig_info(info->si_signo, info, current);
++	} else {
++		die(str, regs, err);
++	}
++}
++
++static LIST_HEAD(undef_hook);
++static DEFINE_SPINLOCK(undef_lock);
++
++void register_undef_hook(struct undef_hook *hook)
++{
++	unsigned long flags;
++
++	spin_lock_irqsave(&undef_lock, flags);
++	list_add(&hook->node, &undef_hook);
++	spin_unlock_irqrestore(&undef_lock, flags);
++}
++
++void unregister_undef_hook(struct undef_hook *hook)
++{
++	unsigned long flags;
++
++	spin_lock_irqsave(&undef_lock, flags);
++	list_del(&hook->node);
++	spin_unlock_irqrestore(&undef_lock, flags);
++}
++
++static int call_undef_hook(struct pt_regs *regs, unsigned int instr)
++{
++	struct undef_hook *hook;
++	unsigned long flags;
++	int (*fn)(struct pt_regs *regs, unsigned int instr) = NULL;
++
++	spin_lock_irqsave(&undef_lock, flags);
++	list_for_each_entry(hook, &undef_hook, node)
++		if ((instr & hook->instr_mask) == hook->instr_val &&
++		    (regs->ARM_cpsr & hook->cpsr_mask) == hook->cpsr_val)
++			fn = hook->fn;
++	spin_unlock_irqrestore(&undef_lock, flags);
++
++	return fn ? fn(regs, instr) : 1;
++}
++
++asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
++{
++	unsigned int correction = thumb_mode(regs) ? 2 : 4;
++	unsigned int instr;
++	siginfo_t info;
++	void __user *pc;
++
++	/*
++	 * According to the ARM ARM, PC is 2 or 4 bytes ahead,
++	 * depending whether we're in Thumb mode or not.
++	 * Correct this offset.
++	 */
++	regs->ARM_pc -= correction;
++
++	pc = (void __user *)instruction_pointer(regs);
++
++	if (processor_mode(regs) == SVC_MODE) {
++		instr = *(u32 *) pc;
++	} else if (thumb_mode(regs)) {
++		get_user(instr, (u16 __user *)pc);
++	} else {
++		get_user(instr, (u32 __user *)pc);
++	}
++
++	if (call_undef_hook(regs, instr) == 0)
++		return;
++
++#ifdef CONFIG_DEBUG_USER
++	if (user_debug & UDBG_UNDEFINED) {
++		printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n",
++			current->comm, task_pid_nr(current), pc);
++		dump_instr(KERN_INFO, regs);
++	}
++#endif
++
++	info.si_signo = SIGILL;
++	info.si_errno = 0;
++	info.si_code  = ILL_ILLOPC;
++	info.si_addr  = pc;
++
++	arm_notify_die("Oops - undefined instruction", regs, &info, 0, 6);
++}
++
++asmlinkage void do_unexp_fiq (struct pt_regs *regs)
++{
++	printk("Hmm.  Unexpected FIQ received, but trying to continue\n");
++	printk("You may have a hardware problem...\n");
++}
++
++/*
++ * bad_mode handles the impossible case in the vectors.  If you see one of
++ * these, then it's extremely serious, and could mean you have buggy hardware.
++ * It never returns, and never tries to sync.  We hope that we can at least
++ * dump out some state information...
++ */
++asmlinkage void bad_mode(struct pt_regs *regs, int reason)
++{
++	console_verbose();
++
++	printk(KERN_CRIT "Bad mode in %s handler detected\n", handler[reason]);
++
++	die("Oops - bad mode", regs, 0);
++	local_irq_disable();
++	panic("bad mode");
++}
++
++static int bad_syscall(int n, struct pt_regs *regs)
++{
++	struct thread_info *thread = current_thread_info();
++	siginfo_t info;
++
++	if (current->personality != PER_LINUX &&
++	    current->personality != PER_LINUX_32BIT &&
++	    thread->exec_domain->handler) {
++		thread->exec_domain->handler(n, regs);
++		return regs->ARM_r0;
++	}
++
++#ifdef CONFIG_DEBUG_USER
++	if (user_debug & UDBG_SYSCALL) {
++		printk(KERN_ERR "[%d] %s: obsolete system call %08x.\n",
++			task_pid_nr(current), current->comm, n);
++		dump_instr(KERN_ERR, regs);
++	}
++#endif
++
++	info.si_signo = SIGILL;
++	info.si_errno = 0;
++	info.si_code  = ILL_ILLTRP;
++	info.si_addr  = (void __user *)instruction_pointer(regs) -
++			 (thumb_mode(regs) ? 2 : 4);
++
++	arm_notify_die("Oops - bad syscall", regs, &info, n, 0);
++
++	return regs->ARM_r0;
++}
++
++static inline void
++do_cache_op(unsigned long start, unsigned long end, int flags)
++{
++	struct mm_struct *mm = current->active_mm;
++	struct vm_area_struct *vma;
++
++	if (end < start || flags)
++		return;
++
++	down_read(&mm->mmap_sem);
++	vma = find_vma(mm, start);
++	if (vma && vma->vm_start < end) {
++		if (start < vma->vm_start)
++			start = vma->vm_start;
++		if (end > vma->vm_end)
++			end = vma->vm_end;
++
++		flush_cache_user_range(vma, start, end);
++	}
++	up_read(&mm->mmap_sem);
++}
++
++/*
++ * Handle all unrecognised system calls.
++ *  0x9f0000 - 0x9fffff are some more esoteric system calls
++ */
++#define NR(x) ((__ARM_NR_##x) - __ARM_NR_BASE)
++asmlinkage int arm_syscall(int no, struct pt_regs *regs)
++{
++	struct thread_info *thread = current_thread_info();
++	siginfo_t info;
++
++	if ((no >> 16) != (__ARM_NR_BASE>> 16))
++		return bad_syscall(no, regs);
++
++	switch (no & 0xffff) {
++	case 0: /* branch through 0 */
++		info.si_signo = SIGSEGV;
++		info.si_errno = 0;
++		info.si_code  = SEGV_MAPERR;
++		info.si_addr  = NULL;
++
++		arm_notify_die("branch through zero", regs, &info, 0, 0);
++		return 0;
++
++	case NR(breakpoint): /* SWI BREAK_POINT */
++		regs->ARM_pc -= thumb_mode(regs) ? 2 : 4;
++		ptrace_break(current, regs);
++		return regs->ARM_r0;
++
++	/*
++	 * Flush a region from virtual address 'r0' to virtual address 'r1'
++	 * _exclusive_.  There is no alignment requirement on either address;
++	 * user space does not need to know the hardware cache layout.
++	 *
++	 * r2 contains flags.  It should ALWAYS be passed as ZERO until it
++	 * is defined to be something else.  For now we ignore it, but may
++	 * the fires of hell burn in your belly if you break this rule. ;)
++	 *
++	 * (at a later date, we may want to allow this call to not flush
++	 * various aspects of the cache.  Passing '0' will guarantee that
++	 * everything necessary gets flushed to maintain consistency in
++	 * the specified region).
++	 */
++	case NR(cacheflush):
++		do_cache_op(regs->ARM_r0, regs->ARM_r1, regs->ARM_r2);
++		return 0;
++
++	case NR(usr26):
++		if (!(elf_hwcap & HWCAP_26BIT))
++			break;
++		regs->ARM_cpsr &= ~MODE32_BIT;
++		return regs->ARM_r0;
++
++	case NR(usr32):
++		if (!(elf_hwcap & HWCAP_26BIT))
++			break;
++		regs->ARM_cpsr |= MODE32_BIT;
++		return regs->ARM_r0;
++
++	case NR(set_tls):
++		thread->tp_value = regs->ARM_r0;
++#if defined(CONFIG_HAS_TLS_REG)
++		asm ("mcr p15, 0, %0, c13, c0, 3" : : "r" (regs->ARM_r0) );
++#elif !defined(CONFIG_TLS_REG_EMUL)
++		/*
++		 * User space must never try to access this directly.
++		 * Expect your app to break eventually if you do so.
++		 * The user helper at 0xffff0fe0 must be used instead.
++		 * (see entry-armv.S for details)
++		 */
++		*((unsigned int *)0xffff0ff0) = regs->ARM_r0;
++#endif
++		return 0;
++
++#ifdef CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG
++	/*
++	 * Atomically store r1 in *r2 if *r2 is equal to r0 for user space.
++	 * Return zero in r0 if *MEM was changed or non-zero if no exchange
++	 * happened.  Also set the user C flag accordingly.
++	 * If access permissions have to be fixed up then non-zero is
++	 * returned and the operation has to be re-attempted.
++	 *
++	 * *NOTE*: This is a ghost syscall private to the kernel.  Only the
++	 * __kuser_cmpxchg code in entry-armv.S should be aware of its
++	 * existence.  Don't ever use this from user code.
++	 */
++	case NR(cmpxchg):
++	for (;;) {
++		extern void do_DataAbort(unsigned long addr, unsigned int fsr,
++					 struct pt_regs *regs);
++		unsigned long val;
++		unsigned long addr = regs->ARM_r2;
++		struct mm_struct *mm = current->mm;
++		pgd_t *pgd; pmd_t *pmd; pte_t *pte;
++		spinlock_t *ptl;
++
++		regs->ARM_cpsr &= ~PSR_C_BIT;
++		down_read(&mm->mmap_sem);
++		pgd = pgd_offset(mm, addr);
++		if (!pgd_present(*pgd))
++			goto bad_access;
++		pmd = pmd_offset(pgd, addr);
++		if (!pmd_present(*pmd))
++			goto bad_access;
++		pte = pte_offset_map_lock(mm, pmd, addr, &ptl);
++		if (!pte_present(*pte) || !pte_dirty(*pte)) {
++			pte_unmap_unlock(pte, ptl);
++			goto bad_access;
++		}
++		val = *(unsigned long *)addr;
++		val -= regs->ARM_r0;
++		if (val == 0) {
++			*(unsigned long *)addr = regs->ARM_r1;
++			regs->ARM_cpsr |= PSR_C_BIT;
++		}
++		pte_unmap_unlock(pte, ptl);
++		up_read(&mm->mmap_sem);
++		return val;
++
++		bad_access:
++		up_read(&mm->mmap_sem);
++		/* simulate a write access fault */
++		do_DataAbort(addr, 15 + (1 << 11), regs);
++	}
++#endif
++
++	default:
++		/* Calls 9f00xx..9f07ff are defined to return -ENOSYS
++		   if not implemented, rather than raising SIGILL.  This
++		   way the calling program can gracefully determine whether
++		   a feature is supported.  */
++		if ((no & 0xffff) <= 0x7ff)
++			return -ENOSYS;
++		break;
++	}
++#ifdef CONFIG_DEBUG_USER
++	/*
++	 * experience shows that these seem to indicate that
++	 * something catastrophic has happened
++	 */
++	if (user_debug & UDBG_SYSCALL) {
++		printk("[%d] %s: arm syscall %d\n",
++		       task_pid_nr(current), current->comm, no);
++		dump_instr("", regs);
++		if (user_mode(regs)) {
++			__show_regs(regs);
++			c_backtrace(regs->ARM_fp, processor_mode(regs));
++		}
++	}
++#endif
++	info.si_signo = SIGILL;
++	info.si_errno = 0;
++	info.si_code  = ILL_ILLTRP;
++	info.si_addr  = (void __user *)instruction_pointer(regs) -
++			 (thumb_mode(regs) ? 2 : 4);
++
++	arm_notify_die("Oops - bad syscall(2)", regs, &info, no, 0);
++	return 0;
++}
++
++#ifdef CONFIG_TLS_REG_EMUL
++
++/*
++ * We might be running on an ARMv6+ processor which should have the TLS
++ * register but for some reason we can't use it, or maybe an SMP system
++ * using a pre-ARMv6 processor (there are apparently a few prototypes like
++ * that in existence) and therefore access to that register must be
++ * emulated.
++ */
++
++static int get_tp_trap(struct pt_regs *regs, unsigned int instr)
++{
++	int reg = (instr >> 12) & 15;
++	if (reg == 15)
++		return 1;
++	regs->uregs[reg] = current_thread_info()->tp_value;
++	regs->ARM_pc += 4;
++	return 0;
++}
++
++static struct undef_hook arm_mrc_hook = {
++	.instr_mask	= 0x0fff0fff,
++	.instr_val	= 0x0e1d0f70,
++	.cpsr_mask	= PSR_T_BIT,
++	.cpsr_val	= 0,
++	.fn		= get_tp_trap,
++};
++
++static int __init arm_mrc_hook_init(void)
++{
++	register_undef_hook(&arm_mrc_hook);
++	return 0;
++}
++
++late_initcall(arm_mrc_hook_init);
++
++#endif
++
++void __bad_xchg(volatile void *ptr, int size)
++{
++	printk("xchg: bad data size: pc 0x%p, ptr 0x%p, size %d\n",
++		__builtin_return_address(0), ptr, size);
++	BUG();
++}
++EXPORT_SYMBOL(__bad_xchg);
++
++/*
++ * A data abort trap was taken, but we did not handle the instruction.
++ * Try to abort the user program, or panic if it was the kernel.
++ */
++asmlinkage void
++baddataabort(int code, unsigned long instr, struct pt_regs *regs)
++{
++	unsigned long addr = instruction_pointer(regs);
++	siginfo_t info;
++
++#ifdef CONFIG_DEBUG_USER
++	if (user_debug & UDBG_BADABORT) {
++		printk(KERN_ERR "[%d] %s: bad data abort: code %d instr 0x%08lx\n",
++			task_pid_nr(current), current->comm, code, instr);
++		dump_instr(KERN_ERR, regs);
++		show_pte(current->mm, addr);
++	}
++#endif
++
++	info.si_signo = SIGILL;
++	info.si_errno = 0;
++	info.si_code  = ILL_ILLOPC;
++	info.si_addr  = (void __user *)addr;
++
++	arm_notify_die("unknown data abort code", regs, &info, instr, 0);
++}
++
++void __attribute__((noreturn)) __bug(const char *file, int line)
++{
++	printk(KERN_CRIT"kernel BUG at %s:%d!\n", file, line);
++	*(int *)0 = 0;
++
++	/* Avoid "noreturn function does return" */
++	for (;;);
++}
++EXPORT_SYMBOL(__bug);
++
++void __readwrite_bug(const char *fn)
++{
++	printk("%s called, but not implemented\n", fn);
++	BUG();
++}
++EXPORT_SYMBOL(__readwrite_bug);
++
++void __pte_error(const char *file, int line, unsigned long val)
++{
++	printk("%s:%d: bad pte %08lx.\n", file, line, val);
++}
++
++void __pmd_error(const char *file, int line, unsigned long val)
++{
++	printk("%s:%d: bad pmd %08lx.\n", file, line, val);
++}
++
++void __pgd_error(const char *file, int line, unsigned long val)
++{
++	printk("%s:%d: bad pgd %08lx.\n", file, line, val);
++}
++
++asmlinkage void __div0(void)
++{
++	printk("Division by zero in kernel.\n");
++	dump_stack();
++}
++EXPORT_SYMBOL(__div0);
++
++void abort(void)
++{
++	BUG();
++
++	/* if that doesn't kill us, halt */
++	panic("Oops failed to kill thread");
++}
++EXPORT_SYMBOL(abort);
++
++void __init trap_init(void)
++{
++	return;
++}
++
++void __init early_trap_init(void)
++{
++	unsigned long vectors = CONFIG_VECTORS_BASE;
++	extern char __stubs_start[], __stubs_end[];
++	extern char __vectors_start[], __vectors_end[];
++	extern char __kuser_helper_start[], __kuser_helper_end[];
++	int kuser_sz = __kuser_helper_end - __kuser_helper_start;
++
++	/*
++	 * Copy the vectors, stubs and kuser helpers (in entry-armv.S)
++	 * into the vector page, mapped at 0xffff0000, and ensure these
++	 * are visible to the instruction stream.
++	 */
++	memcpy((void *)vectors, __vectors_start, __vectors_end - __vectors_start);
++	memcpy((void *)vectors + 0x200, __stubs_start, __stubs_end - __stubs_start);
++	memcpy((void *)vectors + 0x1000 - kuser_sz, __kuser_helper_start, kuser_sz);
++
++	/*
++	 * Copy signal return handlers into the vector page, and
++	 * set sigreturn to be a pointer to these.
++	 */
++	memcpy((void *)KERN_SIGRETURN_CODE, sigreturn_codes,
++	       sizeof(sigreturn_codes));
++	memcpy((void *)KERN_RESTART_CODE, syscall_restart_code,
++	       sizeof(syscall_restart_code));
++
++	flush_icache_range(vectors, vectors + PAGE_SIZE);
++	modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
++}
+diff -rupN linux-2.6.35.11/arch/arm/kernel/vmlinux.lds.S linux-2.6.35.11-ts7500/arch/arm/kernel/vmlinux.lds.S
+--- linux-2.6.35.11/arch/arm/kernel/vmlinux.lds.S	2011-02-06 14:04:07.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/kernel/vmlinux.lds.S	2011-03-14 11:18:24.000000000 -0400
+@@ -84,6 +84,12 @@ SECTIONS
+ 
+ 	.text : {			/* Real text segment		*/
+ 		_text = .;		/* Text and read-only data	*/
++#ifdef CONFIG_CPU_ISPAD_ENABLE
++			. = ALIGN(1024);
++			__ispad_begin = .;
++			*(.ispad)
++			__ispad_end = .;
++#endif      
+ 			__exception_text_start = .;
+ 			*(.exception.text)
+ 			__exception_text_end = .;
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/debug-macro.S linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/debug-macro.S
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/debug-macro.S	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/debug-macro.S	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,54 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++//#include <linux/config.h>
++#include <linux/linkage.h>
++#include <mach/hardware.h>
++
++		.macro	addruart,rx,tmp
++		mrc	p15, 0, \rx, c1, c0
++		tst	\rx, #1				@ MMU enabled ?
++		moveq	\rx, #(SYSPA_UART0_BASE_ADDR)	@ physical base address of UART0
++		movne	\rx, #(SYSVA_UART0_BASE_ADDR & 0xFF000000) @ virtual base address of UART0
++		orrne	\rx, \rx, #(SYSVA_UART0_BASE_ADDR & 0x00FF0000)
++		orrne	\rx, \rx, #(SYSVA_UART0_BASE_ADDR & 0x0000FF00)
++		orrne	\rx, \rx, #(SYSVA_UART0_BASE_ADDR & 0x000000FF)
++		.endm
++
++		.macro	senduart,rd,rx
++		strb	\rd, [\rx, #0x00]
++		.endm
++
++		.macro	waituart,rd,rx
++		mov	\rd, #0xf000
++1001:		subs	\rd, \rd, #1
++		bne	1001b	
++		.endm
++
++		.macro	busyuart,rd,rx
++		nop
++		mov	\rd, #0xf000
++1010:		subs	\rd, \rd, #1
++		bne	1010b
++		.endm
++
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/dma.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/dma.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/dma.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/dma.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,27 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef __ASM_ARCH_DMA_H__
++#define __ASM_ARCH_DMA_H__
++
++#endif
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/entry-macro.S linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/entry-macro.S
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/entry-macro.S	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/entry-macro.S	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,79 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++//#include <mach/star_intc.h>
++#include <mach/star_intc.h>
++
++	.macro	disable_fiq
++	.endm
++
++	.macro	get_irqnr_preamble, base, tmp
++	.endm
++
++	.macro	arch_ret_to_user, tmp1, tmp2
++	.endm
++
++
++#ifdef CONFIG_VIC_INTERRUPT
++	.macro	get_fiqnr_and_base, irqnr, irqstat, base, tmp
++	ldr	\base, =(SYSVA_VIC_BASE_ADDR + 0x140)
++	ldr	\irqnr, [\base]
++	.endm
++
++	.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
++	ldr	\base, =(SYSVA_VIC_BASE_ADDR + 0x140)
++	ldr	\irqnr, [\base]
++	.endm
++#else
++	.macro	get_fiqnr_and_base, irqnr, irqstat, base, tmp
++	ldr	\base, =(SYSVA_VIC_BASE_ADDR + 0x20)
++	ldr	\irqstat, [\base]
++	mov	\irqnr, #0
++9001:
++	tst	\irqstat, #1
++	bne	9002f
++	add	\irqnr, \irqnr, #1
++	mov	\irqstat, \irqstat, lsr #1
++	cmp	\irqnr, #32
++	bcc	9001b
++9002:
++	.endm
++
++	.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
++	ldr	\base, =(SYSVA_VIC_BASE_ADDR + 0x1C)
++	ldr	\irqstat, [\base]
++	mov	\irqnr, #0
++9003:
++	tst	\irqstat, #1
++	bne	9004f
++	add	\irqnr, \irqnr, #1
++	mov	\irqstat, \irqstat, lsr #1
++	cmp	\irqnr, #32
++	bcc	9003b
++9004:
++	.endm
++#endif
++
++	.macro	irq_prio_table
++	.endm
++
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/hardware.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/hardware.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/hardware.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/hardware.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,71 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef __ASM_ARCH_HARDWARE_H__
++#define __ASM_ARCH_HARDWARE_H__
++
++//#include <linux/config.h>
++#include <mach/param.h>
++
++#include <mach/star_sys_memory_map.h>
++#include <mach/star_intc.h>
++#include <mach/star_timer.h>
++#include <mach/star_uart.h>
++#include <mach/star_gpio.h>
++#include <mach/star_pci_bridge.h>
++#include <mach/star_misc.h>
++#include <mach/star_powermgt.h>
++#include <mach/star_rtc.h>
++#include <mach/star_wdtimer.h>
++#include <mach/star_smc.h>
++#include <mach/star_nic.h>
++#include <mach/star_ide.h>
++
++#if 1 // on ASIC
++#define SYS_CLK			(87500000) // 87.5MHz
++#define UART_CLK		(24000000) // 24MHz
++#define AHB_CLK			(SYS_CLK)
++#define APB_CLK			(AHB_CLK >> 1)
++#define TIMER_COUNTER		(APB_CLK / HZ)
++#else // on FPGA
++#define SYS_CLK			(13000000) // 13MHz
++#define UART_CLK		(13000000) // 13Mhz
++#define AHB_CLK			(SYS_CLK)
++#define APB_CLK			(AHB_CLK)
++#define TIMER_COUNTER		(APB_CLK / HZ)
++#endif
++
++#define DEBUG_CONSOLE		(0)
++
++#define FLASH_BASE_ADDR		SYSPA_FLASH_SRAM_BANK0_BASE_ADDR
++#define FLASH_SIZE		0x800000
++
++#define PCIBIOS_MIN_IO		0x00000000
++#define PCIBIOS_MIN_MEM		0x00000000
++#if 1
++#define pcibios_assign_all_busses()	0
++#else
++#define pcibios_assign_all_busses()	1
++#endif
++
++#endif /* __ASM_ARCH_HARDWARE_H__ */
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/io.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/io.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/io.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/io.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,35 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef __ASM_ARCH_IO_H__
++#define __ASM_ARCH_IO_H__
++
++//#include <asm/hardware.h>
++
++#define IO_SPACE_LIMIT		0xffffffff
++
++#define __io(p)			((void __iomem *)(p))
++#define __mem_pci(a)		(a)
++#define __mem_isa(a)		(a)
++
++#endif
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/irqs.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/irqs.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/irqs.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/irqs.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,36 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef __ASM_ARCH_IRQS_H__
++#define __ASM_ARCH_IRQS_H__
++
++//#include <mach/star_intc.h>
++#include <mach/star_intc.h>
++
++#define NR_IRQS (32)
++
++#ifdef CONFIG_VIC_INTERRUPT 
++#define irq_finish(irq) do { INTC_IRQ_VECTOR_ADDRESS_REG = 0; } while (0)
++#endif
++
++#endif /* __ASM_ARCH_IRQS_H__ */
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/memory.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/memory.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/memory.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/memory.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,82 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef __ASM_ARCH_MEMORY_H
++#define __ASM_ARCH_MEMORY_H
++
++#if 0
++#define TASK_SIZE		(0xC0000000UL)	
++#define TASK_SIZE_26		(0x04000000UL)
++#define TASK_UNMAPPED_BASE	(TASK_SIZE / 3)
++#endif
++
++#define CONFIG_SYSTEM_DRAM_BASE	0x00000000
++#if defined(CONFIG_STR8100_DRAM_64M)
++#define CONFIG_SYSTEM_DRAM_SIZE 64
++#elif defined(CONFIG_STR8100_DRAM_32M)
++#define CONFIG_SYSTEM_DRAM_SIZE 32
++#elif defined(CONFIG_STR8100_DRAM_16M)
++#define CONFIG_SYSTEM_DRAM_SIZE 16
++#endif
++#define MEM_SIZE		(CONFIG_SYSTEM_DRAM_SIZE)
++#define END_MEM			(CONFIG_SYSTEM_DRAM_BASE + CONFIG_SYSTEM_DRAM_SIZE)
++#define DMA_SIZE		0xffffffff
++#define PHYS_OFFSET		(CONFIG_SYSTEM_DRAM_BASE) // physical start address of memory
++#if 0
++#define PAGE_OFFSET 		(0xC0000000UL)
++#endif
++
++/*
++#define __virt_to_bus(x)	((x) - PAGE_OFFSET)
++#define __bus_to_virt(x)	((x) + PAGE_OFFSET)
++*/
++#if 0
++#define __virt_to_phys__is_a_macro
++#define __virt_to_phys(vpage)	((vpage) - PAGE_OFFSET)
++
++#define __phys_to_virt__is_a_macro
++#define __phys_to_virt(ppage)	((ppage) + PAGE_OFFSET)
++
++#define __virt_to_bus__is_a_macro
++#define __virt_to_bus(x)	((x) - PAGE_OFFSET)
++
++#define __bus_to_virt__is_a_macro
++#define __bus_to_virt(x)	((x) + PAGE_OFFSET)
++#endif
++
++/*
++#define __virt_to_bus(x) __virt_to_phys(x)
++#define __bus_to_virt(x) __phys_to_virt(x)
++
++#define __pfn_to_bus(x) __pfn_to_phys(x)
++#define __bus_to_pfn(x) __phys_to_pfn(x)
++*/
++
++/*
++#define __pfn_to_bus(p)         __phys_to_bus(__pfn_to_phys(p))
++#define __bus_to_pfn(b)         __phys_to_pfn(__bus_to_phys(b))
++*/
++
++
++
++#endif
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/param.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/param.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/param.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/param.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,32 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef __ASM_ARCH_PARAM_H__
++#define __ASM_ARCH_PARAM_H__
++
++// For timer, there will be HZ ticks per second
++/* scott.patch
++#define HZ	100
++*/
++
++#endif /* __ARCH_ASM_PARAM_H__ */
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_demo_dma.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_demo_dma.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_demo_dma.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_demo_dma.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,189 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef __DEMO_DMA_H__
++#define __DEMO_DMA_H__
++#include <linux/types.h>	/* size_t */
++#include <linux/interrupt.h>
++#include <linux/module.h>
++
++#include <mach/star_dmac.h>
++
++/*
++ * defines for each channel
++ */
++#define DMAC_CH_DISABLE                0
++#define DMAC_CH_ENABLE                 1
++
++#define DMAC_CH_DST_SEL_M0             0
++#define DMAC_CH_DST_SEL_M1             1
++
++#define DMAC_CH_SRC_SEL_M0             0
++#define DMAC_CH_SRC_SEL_M1             1
++
++#define DMAC_CH_DSTAD_CTL_INC          0
++#define DMAC_CH_DSTAD_CTL_DEC          1
++#define DMAC_CH_DSTAD_CTL_FIX          2
++
++#define DMAC_CH_SRCAD_CTL_INC          0
++#define DMAC_CH_SRCAD_CTL_DEC          1
++#define DMAC_CH_SRCAD_CTL_FIX          2
++
++#define DMAC_CH_MODE_HW_HANDSHAKE      1
++
++#define DMAC_CH_SRC_WIDTH_8_BITS       0
++#define DMAC_CH_SRC_WIDTH_16_BITS      1
++#define DMAC_CH_SRC_WIDTH_32_BITS      2
++
++#define DMAC_CH_DST_WIDTH_8_BITS       0
++#define DMAC_CH_DST_WIDTH_16_BITS      1
++#define DMAC_CH_DST_WIDTH_32_BITS      2
++
++#define DMAC_CH_ABT_TRANSFER           1
++
++#define DMAC_CH_PROT1_PRIVILEGED_MODE  1
++#define DMAC_CH_PROT1_USER_MODE        0
++
++#define DMAC_CH_PROT2_BUFFERABLE       1
++#define DMAC_CH_PROT2_NON_BUFFERABLE   0
++
++#define DMAC_CH_PROT3_CACHEABLE        1
++#define DMAC_CH_PROT3_NON_CACHEABLE    0
++
++#define DMAC_CH_PRI_LEVEL_0            0
++#define DMAC_CH_PRI_LEVEL_1            1
++#define DMAC_CH_PRI_LEVEL_2            2
++#define DMAC_CH_PRI_LEVEL_3            3
++
++#define DMAC_CH_TC_MASK_DISABLE        0
++#define DMAC_CH_TC_MASK_ENABLE         1
++
++#define DMAC_MAX_CHANNEL_NUM           (8)
++
++
++#define DMAC_CH0_ID                    (1 << 0)
++#define DMAC_CH1_ID                    (1 << 1)
++#define DMAC_CH2_ID                    (1 << 2)
++#define DMAC_CH3_ID                    (1 << 3)
++#define DMAC_CH4_ID                    (1 << 4)
++#define DMAC_CH5_ID                    (1 << 5)
++#define DMAC_CH6_ID                    (1 << 6)
++#define DMAC_CH7_ID                    (1 << 7)
++#define DMAC_CH_ID(idx)                (1 << idx) 
++
++#define DMAC_LITTLE_ENDIAN             (0)
++#define DMAC_BIG_ENDIAN                (1)
++
++/* 
++ * DMAC LLP Descriptor
++ */
++typedef struct _DMAC_LLP_CONTROL_    DMAC_LLP_CONTROL_T;
++
++struct _DMAC_LLP_CONTROL_
++{
++//#if (ENDIAN_MODE == LITTLE_ENDIAN)
++#if 1
++    unsigned int    tot_size              : 12;//b11-0
++    unsigned int    reserved_1            : 4; //b15-12    
++    unsigned int    dst_sel               : 1; //b16
++    unsigned int    src_sel               : 1; //b17    
++    unsigned int    dstad_ctl             : 2; //b19-18        
++    unsigned int    srcad_ctl             : 2; //b21-20        
++    unsigned int    dst_width             : 3; //b24-22
++    unsigned int    src_width             : 3; //b27-25
++    unsigned int    tc_status_mask        : 1; //b28
++    unsigned int    reserved_0            : 3; //b31-29
++
++#else
++
++
++    unsigned int    reserved_0            : 3; //b31-29
++    unsigned int    tc_status_mask        : 1; //b28
++    unsigned int    src_width             : 3; //b27-25
++    unsigned int    dst_width             : 3; //b24-22
++    unsigned int    srcad_ctl             : 2; //b21-20
++    unsigned int    dstad_ctl             : 2; //b19-18    
++    unsigned int    src_sel               : 1; //b17
++    unsigned int    dst_sel               : 1; //b16
++    unsigned int    reserved_1            : 4; //b15-12
++    unsigned int    tot_size              : 12;//b11-0
++
++
++#endif
++}; 
++
++
++/* 
++ * DMAC LLP Descriptor object
++ */
++typedef struct _DMAC_LLP_    DMAC_LLP_T;
++struct _DMAC_LLP_
++{
++    unsigned int    SrcAddr;
++    
++    unsigned int    DstAddr;
++    
++    DMAC_LLP_T     *LLP;
++
++    DMAC_LLP_CONTROL_T    Ctrl_TotSize;    
++};
++
++typedef struct _DMAC_HARDWARE_HANDSHAKE_OBJ_    DMAC_HARDWARE_HANDSHAKE_OBJ_T;
++struct _DMAC_HARDWARE_HANDSHAKE_OBJ_
++{
++    unsigned int    src_addr;                     //Src address
++    unsigned int    dst_addr;                     //Dst address
++    unsigned int    src_master;                   //0:AHB0, 1:AHB1
++    unsigned int    dst_master;                   //0:AHB0, 1:AHB1
++    unsigned int    dstad_ctl;                    //0:Incr, 1:Decr, 2:Fix
++    unsigned int    srcad_ctl;                    //0:Incr, 1:Decr, 2:Fix
++    unsigned int    src_width;                    //0:8bits, 1:16bits, 2:32bits
++    unsigned int    dst_width;                    //0:8bits, 1:16bits, 2:32bits
++    unsigned int    transfer_bytes;               //Byte Count to be transferred
++    unsigned int    channel_id;                   //0~7 for Channel0-7 selection
++    unsigned int    channel_num;                   //0~7
++    unsigned int    target_select;                //target ID
++    unsigned int    src_burst_size;               //number of transfer 
++    unsigned int    llp_addr;                     //LLP address
++
++    void * private_data;
++    DMAC_LLP_T* llp_head;
++}; 
++
++
++extern void Hal_Dmac_Configure_DMA_Handshake(DMAC_HARDWARE_HANDSHAKE_OBJ_T *dmac_obj);
++extern irqreturn_t str8100_dma_err_irq_handler(int this_irq, void *dev_id, struct pt_regs *regs);
++//extern int str8100_i2s_init(int sampling_rate);
++extern int str8100_i2s_init(int sampling_rate,u32 i2s_sdata_width, u32 i2s_mode,
++			u32 i2s_tranfer_timing_ctrl, u32 i2s_sclk_mode);
++extern u32 Hal_Dmac_Get_Channel_Transfer_Unit_Number(u32 byte_size, u32 src_width);
++
++extern u32 I2s_Gpio_SSP_Initialise(void);
++extern void I2s_Gpio_SSP_Write(u16);
++extern void I2s_Gpio_SSP_Switch_To_Record_Data(void);
++extern void I2s_Gpio_SSP_Switcg_To_Playback_Data(void);
++
++
++#endif //#ifndef __DEMO_DMA_H__
++
++
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_dmac.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_dmac.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_dmac.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_dmac.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,409 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef	_STAR_DMAC_H_
++#define	_STAR_DMAC_H_
++
++
++#include "star_sys_memory_map.h"
++
++
++#if defined(__UBOOT__)
++#define	DMAC_MEM_MAP_VALUE(reg_offset)		(*((u32 volatile *)(SYSPA_GDMAC_BASE_ADDR + reg_offset)))
++#elif defined(__LINUX__)
++#define	DMAC_MEM_MAP_VALUE(reg_offset)		(*((u32 volatile *)(SYSVA_GDMAC_BASE_ADDR + reg_offset)))
++#else
++#error "NO SYSTEM DEFINED"
++#endif
++
++
++/*
++ * define access macros
++ */
++#define	DMAC_INT_STATUS_REG			DMAC_MEM_MAP_VALUE(0x000)
++
++#define	DMAC_INT_TC_STATUS_REG			DMAC_MEM_MAP_VALUE(0x004)
++#define	DMAC_INT_TC_STATUS_CLR_REG		DMAC_MEM_MAP_VALUE(0x008)
++
++#define	DMAC_INT_ERR_STATUS_REG			DMAC_MEM_MAP_VALUE(0x00C)
++#define	DMAC_INT_ERR_STATUS_CLR_REG		DMAC_MEM_MAP_VALUE(0x010)
++
++#define	DMAC_TC_STATUS_REG			DMAC_MEM_MAP_VALUE(0x014)
++#define	DMAC_ERR_STATUS_REG			DMAC_MEM_MAP_VALUE(0x018)
++
++#define	DMAC_CH_ENABLE_STATUS_REG		DMAC_MEM_MAP_VALUE(0x01C)
++#define	DMAC_CH_BUSY_STATUS_REG			DMAC_MEM_MAP_VALUE(0x020)
++
++#define	DMAC_CSR_REG				DMAC_MEM_MAP_VALUE(0x024)
++#define	DMAC_SYNC_REG				DMAC_MEM_MAP_VALUE(0x028)
++
++#define	DMAC_CH0_CSR_REG			DMAC_MEM_MAP_VALUE(0x100)
++#define	DMAC_CH0_CFG_REG			DMAC_MEM_MAP_VALUE(0x104)
++#define	DMAC_CH0_SRC_ADDR_REG			DMAC_MEM_MAP_VALUE(0x108)
++#define	DMAC_CH0_DST_ADDR_REG			DMAC_MEM_MAP_VALUE(0x10C)
++#define	DMAC_CH0_LLP_REG			DMAC_MEM_MAP_VALUE(0x110)
++#define	DMAC_CH0_SIZE_REG			DMAC_MEM_MAP_VALUE(0x114)
++
++#define	DMAC_CH1_CSR_REG			DMAC_MEM_MAP_VALUE(0x120)
++#define	DMAC_CH1_CFG_REG			DMAC_MEM_MAP_VALUE(0x124)
++#define	DMAC_CH1_SRC_ADDR_REG			DMAC_MEM_MAP_VALUE(0x128)
++#define	DMAC_CH1_DST_ADDR_REG			DMAC_MEM_MAP_VALUE(0x12C)
++#define	DMAC_CH1_LLP_REG			DMAC_MEM_MAP_VALUE(0x130)
++#define	DMAC_CH1_SIZE_REG			DMAC_MEM_MAP_VALUE(0x134)
++
++#define	DMAC_CH2_CSR_REG			DMAC_MEM_MAP_VALUE(0x140)
++#define	DMAC_CH2_CFG_REG			DMAC_MEM_MAP_VALUE(0x144)
++#define	DMAC_CH2_SRC_ADDR_REG			DMAC_MEM_MAP_VALUE(0x148)
++#define	DMAC_CH2_DST_ADDR_REG			DMAC_MEM_MAP_VALUE(0x14C)
++#define	DMAC_CH2_LLP_REG			DMAC_MEM_MAP_VALUE(0x150)
++#define	DMAC_CH2_SIZE_REG			DMAC_MEM_MAP_VALUE(0x154)
++
++#define	DMAC_CH3_CSR_REG			DMAC_MEM_MAP_VALUE(0x160)
++#define	DMAC_CH3_CFG_REG			DMAC_MEM_MAP_VALUE(0x164)
++#define	DMAC_CH3_SRC_ADDR_REG			DMAC_MEM_MAP_VALUE(0x168)
++#define	DMAC_CH3_DST_ADDR_REG			DMAC_MEM_MAP_VALUE(0x16C)
++#define	DMAC_CH3_LLP_REG			DMAC_MEM_MAP_VALUE(0x170)
++#define	DMAC_CH3_SIZE_REG			DMAC_MEM_MAP_VALUE(0x174)
++
++#define	DMAC_CH4_CSR_REG			DMAC_MEM_MAP_VALUE(0x180)
++#define	DMAC_CH4_CFG_REG			DMAC_MEM_MAP_VALUE(0x184)
++#define	DMAC_CH4_SRC_ADDR_REG			DMAC_MEM_MAP_VALUE(0x188)
++#define	DMAC_CH4_DST_ADDR_REG			DMAC_MEM_MAP_VALUE(0x18C)
++#define	DMAC_CH4_LLP_REG			DMAC_MEM_MAP_VALUE(0x190)
++#define	DMAC_CH4_SIZE_REG			DMAC_MEM_MAP_VALUE(0x194)
++
++#define	DMAC_CH5_CSR_REG			DMAC_MEM_MAP_VALUE(0x1A0)
++#define	DMAC_CH5_CFG_REG			DMAC_MEM_MAP_VALUE(0x1A4)
++#define	DMAC_CH5_SRC_ADDR_REG			DMAC_MEM_MAP_VALUE(0x1A8)
++#define	DMAC_CH5_DST_ADDR_REG			DMAC_MEM_MAP_VALUE(0x1AC)
++#define	DMAC_CH5_LLP_REG			DMAC_MEM_MAP_VALUE(0x1B0)
++#define	DMAC_CH5_SIZE_REG			DMAC_MEM_MAP_VALUE(0x1B4)
++
++#define	DMAC_CH6_CSR_REG			DMAC_MEM_MAP_VALUE(0x1C0)
++#define	DMAC_CH6_CFG_REG			DMAC_MEM_MAP_VALUE(0x1C4)
++#define	DMAC_CH6_SRC_ADDR_REG			DMAC_MEM_MAP_VALUE(0x1C8)
++#define	DMAC_CH6_DST_ADDR_REG			DMAC_MEM_MAP_VALUE(0x1CC)
++#define	DMAC_CH6_LLP_REG			DMAC_MEM_MAP_VALUE(0x1D0)
++#define	DMAC_CH6_SIZE_REG			DMAC_MEM_MAP_VALUE(0x1D4)
++
++#define	DMAC_CH7_CSR_REG			DMAC_MEM_MAP_VALUE(0x1E0)
++#define	DMAC_CH7_CFG_REG			DMAC_MEM_MAP_VALUE(0x1E4)
++#define	DMAC_CH7_SRC_ADDR_REG			DMAC_MEM_MAP_VALUE(0x1E8)
++#define	DMAC_CH7_DST_ADDR_REG			DMAC_MEM_MAP_VALUE(0x1EC)
++#define	DMAC_CH7_LLP_REG			DMAC_MEM_MAP_VALUE(0x1F0)
++#define	DMAC_CH7_SIZE_REG			DMAC_MEM_MAP_VALUE(0x1F4)
++
++
++#define DMAC_CH0_INT_BIT_INDEX			0
++#define DMAC_CH1_INT_BIT_INDEX			1
++#define DMAC_CH2_INT_BIT_INDEX			2
++#define DMAC_CH3_INT_BIT_INDEX			3
++#define DMAC_CH4_INT_BIT_INDEX			4
++#define DMAC_CH5_INT_BIT_INDEX			5
++#define DMAC_CH6_INT_BIT_INDEX			6
++#define DMAC_CH7_INT_BIT_INDEX			7
++
++#define DMAC_CH0_INT_TC_BIT_INDEX		0
++#define DMAC_CH1_INT_TC_BIT_INDEX		1
++#define DMAC_CH2_INT_TC_BIT_INDEX		2
++#define DMAC_CH3_INT_TC_BIT_INDEX		3
++#define DMAC_CH4_INT_TC_BIT_INDEX		4
++#define DMAC_CH5_INT_TC_BIT_INDEX		5
++#define DMAC_CH6_INT_TC_BIT_INDEX		6
++#define DMAC_CH7_INT_TC_BIT_INDEX		7
++
++#define DMAC_CH0_INT_TC_CLR_BIT_INDEX		0
++#define DMAC_CH1_INT_TC_CLR_BIT_INDEX		1
++#define DMAC_CH2_INT_TC_CLR_BIT_INDEX		2
++#define DMAC_CH3_INT_TC_CLR_BIT_INDEX		3
++#define DMAC_CH4_INT_TC_CLR_BIT_INDEX		4
++#define DMAC_CH5_INT_TC_CLR_BIT_INDEX		5
++#define DMAC_CH6_INT_TC_CLR_BIT_INDEX		6
++#define DMAC_CH7_INT_TC_CLR_BIT_INDEX		7
++
++#define DMAC_CH0_INT_ERR_BIT_INDEX		0
++#define DMAC_CH1_INT_ERR_BIT_INDEX		1
++#define DMAC_CH2_INT_ERR_BIT_INDEX		2
++#define DMAC_CH3_INT_ERR_BIT_INDEX		3
++#define DMAC_CH4_INT_ERR_BIT_INDEX		4
++#define DMAC_CH5_INT_ERR_BIT_INDEX		5
++#define DMAC_CH6_INT_ERR_BIT_INDEX		6
++#define DMAC_CH7_INT_ERR_BIT_INDEX		7
++
++#define DMAC_CH0_INT_ERR_CLR_BIT_INDEX		0
++#define DMAC_CH1_INT_ERR_CLR_BIT_INDEX		1
++#define DMAC_CH2_INT_ERR_CLR_BIT_INDEX		2
++#define DMAC_CH3_INT_ERR_CLR_BIT_INDEX		3
++#define DMAC_CH4_INT_ERR_CLR_BIT_INDEX		4
++#define DMAC_CH5_INT_ERR_CLR_BIT_INDEX		5
++#define DMAC_CH6_INT_ERR_CLR_BIT_INDEX		6
++#define DMAC_CH7_INT_ERR_CLR_BIT_INDEX		7
++
++#define DMAC_CH0_TC_STATUS_BIT_INDEX		0
++#define DMAC_CH1_TC_STATUS_BIT_INDEX		1
++#define DMAC_CH2_TC_STATUS_BIT_INDEX		2
++#define DMAC_CH3_TC_STATUS_BIT_INDEX		3
++#define DMAC_CH4_TC_STATUS_BIT_INDEX		4
++#define DMAC_CH5_TC_STATUS_BIT_INDEX		5
++#define DMAC_CH6_TC_STATUS_BIT_INDEX		6
++#define DMAC_CH7_TC_STATUS_BIT_INDEX		7
++
++#define DMAC_CH0_ERR_STATUS_BIT_INDEX		0
++#define DMAC_CH1_ERR_STATUS_BIT_INDEX		1
++#define DMAC_CH2_ERR_STATUS_BIT_INDEX		2
++#define DMAC_CH3_ERR_STATUS_BIT_INDEX		3
++#define DMAC_CH4_ERR_STATUS_BIT_INDEX		4
++#define DMAC_CH5_ERR_STATUS_BIT_INDEX		5
++#define DMAC_CH6_ERR_STATUS_BIT_INDEX		6
++#define DMAC_CH7_ERR_STATUS_BIT_INDEX		7
++
++#define DMAC_CH0_ENABLE_STATUS_BIT_INDEX	0
++#define DMAC_CH1_ENABLE_STATUS_BIT_INDEX	1
++#define DMAC_CH2_ENABLE_STATUS_BIT_INDEX	2
++#define DMAC_CH3_ENABLE_STATUS_BIT_INDEX	3
++#define DMAC_CH4_ENABLE_STATUS_BIT_INDEX	4
++#define DMAC_CH5_ENABLE_STATUS_BIT_INDEX	5
++#define DMAC_CH6_ENABLE_STATUS_BIT_INDEX	6
++#define DMAC_CH7_ENABLE_STATUS_BIT_INDEX	7
++
++#define DMAC_CH0_BUSY_STATUS_BIT_INDEX		0
++#define DMAC_CH1_BUSY_STATUS_BIT_INDEX		1
++#define DMAC_CH2_BUSY_STATUS_BIT_INDEX		2
++#define DMAC_CH3_BUSY_STATUS_BIT_INDEX		3
++#define DMAC_CH4_BUSY_STATUS_BIT_INDEX		4
++#define DMAC_CH5_BUSY_STATUS_BIT_INDEX		5
++#define DMAC_CH6_BUSY_STATUS_BIT_INDEX		6
++#define DMAC_CH7_BUSY_STATUS_BIT_INDEX		7
++
++#define DMAC_ENABLE_BIT_INDEX			0
++#define DMAC_MASTER0_ENDIAN_BIT_INDEX		1
++#define DMAC_MASTER1_ENDIAN_BIT_INDEX		2
++
++#define DMAC_CH0_SYNC_ENABLE_BIT_INDEX		0
++#define DMAC_CH1_SYNC_ENABLE_BIT_INDEX		1
++#define DMAC_CH2_SYNC_ENABLE_BIT_INDEX		2
++#define DMAC_CH3_SYNC_ENABLE_BIT_INDEX		3
++#define DMAC_CH4_SYNC_ENABLE_BIT_INDEX		4
++#define DMAC_CH5_SYNC_ENABLE_BIT_INDEX		5
++#define DMAC_CH6_SYNC_ENABLE_BIT_INDEX		6
++#define DMAC_CH7_SYNC_ENABLE_BIT_INDEX		7
++
++#define DMAC_CH_INT_TC_MASK_BIT_INDEX		0
++#define DMAC_CH_INT_ERR_MASK_BIT_INDEX		1
++#define DMAC_CH_INT_ABT_MASK_BIT_INDEX		2
++#define DMAC_CH_BUSY_BIT_INDEX			8
++
++#define DMAC_CH_ENABLE_BIT_INDEX		0
++#define DMAC_CH_DST_SEL_BIT_INDEX		1
++#define DMAC_CH_SRC_SEL_BIT_INDEX		2
++#define DMAC_CH_DST_ADDR_CTL_BIT_INDEX		3
++#define DMAC_CH_SRC_ADDR_CTL_BIT_INDEX		5
++#define DMAC_CH_MODE_BIT_INDEX			7
++#define DMAC_CH_DST_WIDTH_BIT_INDEX		8
++#define DMAC_CH_SRC_WIDTH_BIT_INDEX		11
++#define DMAC_CH_ABT_BIT_INDEX			15
++#define DMAC_CH_SRC_BURST_SIZE_BIT_INDEX	16
++#define DMAC_CH_PROTECT_MODE_BIT_INDEX		19
++#define DMAC_CH_PROTECT_BUFFERABLE_BIT_INDEX	20
++#define DMAC_CH_PROTECT_CACHEABLE_BIT_INDEX	21
++#define DMAC_CH_PRIORITY_BIT_INDEX		22
++#define DMAC_CH_HHST_SEL_BIT_INDEX		25
++
++#define DMAC_CH_DST_ADDR_CTL_MASK		0x3
++#define DMAC_CH_DST_ADDR_CTL_INC		0x0
++#define DMAC_CH_DST_ADDR_CTL_DEC		0x1
++#define DMAC_CH_DST_ADDR_CTL_FIXED		0x2
++
++#define DMAC_CH_SRC_ADDR_CTL_MASK		0x3
++#define DMAC_CH_SRC_ADDR_CTL_INC		0x0
++#define DMAC_CH_SRC_ADDR_CTL_DEC		0x1
++#define DMAC_CH_SRC_ADDR_CTL_FIXED		0x2
++
++#define DMAC_CH_MODE_NORMAL			0x0
++#define DMAC_CH_MODE_HANDSHAKE			0x1
++
++#define DMAC_CH_DST_WIDTH_MASK			0x3
++#define DMAC_CH_DST_WIDTH_8BIT			0x0
++#define DMAC_CH_DST_WIDTH_16BIT			0x1
++#define DMAC_CH_DST_WIDTH_32BIT			0x2
++
++#define DMAC_CH_SRC_WIDTH_MASK			0x3
++#define DMAC_CH_SRC_WIDTH_8BIT			0x0
++#define DMAC_CH_SRC_WIDTH_16BIT			0x1
++#define DMAC_CH_SRC_WIDTH_32BIT			0x2
++
++#define DMAC_CH_SRC_BURST_SIZE_MASK		0x8
++#define DMAC_CH_SRC_BURST_SIZE_1		0x0
++#define DMAC_CH_SRC_BURST_SIZE_4		0x1
++#define DMAC_CH_SRC_BURST_SIZE_8		0x2
++#define DMAC_CH_SRC_BURST_SIZE_16		0x3
++#define DMAC_CH_SRC_BURST_SIZE_32		0x4
++#define DMAC_CH_SRC_BURST_SIZE_64		0x5
++#define DMAC_CH_SRC_BURST_SIZE_128		0x6
++#define DMAC_CH_SRC_BURST_SIZE_256		0x7
++
++#define DMAC_CH_PRIORITY_MASK			0x4
++#define DMAC_CH_PRIORITY_0			0x0	/* lowest priority */
++#define DMAC_CH_PRIORITY_1			0x1
++#define DMAC_CH_PRIORITY_2			0x2
++#define DMAC_CH_PRIORITY_3			0x3	/* highest priority */
++
++
++#define	DMAC_CH_CSR_REG(idx)			DMAC_MEM_MAP_VALUE(0x100+0x20*(idx))
++#define	DMAC_CH_CFG_REG(idx)			DMAC_MEM_MAP_VALUE(0x104+0x20*(idx))
++#define	DMAC_CH_SRC_ADDR_REG(idx)		DMAC_MEM_MAP_VALUE(0x108+0x20*(idx))
++#define	DMAC_CH_DST_ADDR_REG(idx)		DMAC_MEM_MAP_VALUE(0x10C+0x20*(idx))
++#define	DMAC_CH_LLP_REG(idx)			DMAC_MEM_MAP_VALUE(0x110+0x20*(idx))
++#define	DMAC_CH_SIZE_REG(idx)			DMAC_MEM_MAP_VALUE(0x114+0x20*(idx))
++
++
++#define	HAL_DMAC_ENABLE_CHANNEL(idx)		((DMAC_CH_CSR_REG(idx)) |= (0x1))
++
++#define	HAL_DMAC_DISABLE_CHANNEL(idx)		((DMAC_CH_CSR_REG(idx)) &= ~(0x1))
++
++#define	HAL_GET_DMAC_CHANNEL_LLP_COUNTER(ch)	((DMAC_CH_CFG_REG(ch) >> 16) & 0xF)
++
++
++/*DMAC HW Hand-shake target ID*/
++#define	DMAC_HW_HAND_SHAKE_PCM_TX0_ID		0x0
++#define	DMAC_HW_HAND_SHAKE_PCM_RX0_ID		0x1
++
++#define	DMAC_HW_HAND_SHAKE_SPI_TX_ID		0x2
++#define	DMAC_HW_HAND_SHAKE_SPI_RX_ID		0x3
++
++#define	DMAC_HW_HAND_SHAKE_I2S_TX_LEFT_ID	0x4
++#define	DMAC_HW_HAND_SHAKE_I2S_TX_RIGHT_ID	0x5
++
++#define	DMAC_HW_HAND_SHAKE_UART0_TX_ID		0x6
++#define	DMAC_HW_HAND_SHAKE_UART0_RX_ID		0x7
++
++#define	DMAC_HW_HAND_SHAKE_UART1_TX_ID		0x8
++#define	DMAC_HW_HAND_SHAKE_UART1_RX_ID		0x9
++
++#define	DMAC_HW_HAND_SHAKE_USBDEV_ID		0xA
++
++#define	DMAC_HW_HAND_SHAKE_I2S_RX_LEFT_ID	0xB
++#define	DMAC_HW_HAND_SHAKE_I2S_RX_RIGHT_ID	0xC
++
++#define	DMAC_HW_HAND_SHAKE_PCM_TX1_ID		0xD
++#define	DMAC_HW_HAND_SHAKE_PCM_RX1_ID		0xE
++
++
++#define MAX_DMA_VEC				32
++
++#define DMAC_DST_SEL_MASTER0			0
++#define DMAC_DST_SEL_MASTER1			1
++#define DMAC_SRC_SEL_MASTER0			0
++#define DMAC_SRC_SEL_MASTER1			1
++
++#define DMAC_RESPONSE_OK			0
++#define DMAC_RESPONSE_ERR			-1
++
++struct dma_xfer;
++typedef struct dma_xfer dma_xfer_t;
++typedef void (*dma_end_io_t)(dma_xfer_t *dma_xfer, int err);
++typedef struct
++{
++	u32	src_addr;	// virtual addr
++	u32	dst_addr;	// virtual addr
++	u32	size;		// bytes
++	u8	dst_sel;
++	u8	src_sel;
++	u8	dst_addr_ctl;
++	u8	src_addr_ctl;
++	u8	dst_width;
++	u8	src_width;
++} dma_vec_t;
++
++struct dma_xfer
++{
++	u8		nr_vec;
++	dma_vec_t	vec[MAX_DMA_VEC];
++	dma_end_io_t	dma_end_io;
++	void		*private;
++};
++
++/*
++ * DMAC	LLP Descriptor
++ */
++typedef struct
++{
++	u32	src_addr;			// physical addr
++	u32	dst_addr;			// physical addr
++	u32	llp;
++	u32	tot_size	: 12;
++	u32	reserved0	: 4;
++	u32	dst_sel		: 1;
++	u32	src_sel		: 1;
++	u32	dst_addr_ctl	: 2;
++	u32	src_addr_ctl	: 2;
++	u32	dst_width	: 3;
++	u32	src_width	: 3;
++	u32	tc_mask		: 1;
++	u32	reserved1	: 3;
++} __attribute__((packed)) dma_llp_descr_t;
++
++#define HAL_DMAC_ENABLE() \
++	    ((DMAC_CSR_REG) |= (1<<DMAC_ENABLE_BIT_INDEX))
++
++
++#define HAL_DMAC_DISABLE() \
++	    ((DMAC_CSR_REG) &= ~(1<<DMAC_ENABLE_BIT_INDEX))
++
++
++#define HAL_DMAC_SET_MASTER0_BIG_ENDIAN() \
++	    ((DMAC_CSR_REG) |= (1<<DMAC_MASTER0_ENDIAN_BIT_INDEX))
++
++
++#define HAL_DMAC_SET_MASTER0_LITTLE_ENDIAN() \
++	    ((DMAC_CSR_REG) &= ~(1<<DMAC_MASTER0_ENDIAN_BIT_INDEX))
++
++
++#define HAL_DMAC_SET_MASTER1_BIG_ENDIAN() \
++	    ((DMAC_CSR_REG) |= (1<<DMAC_MASTER1_ENDIAN_BIT_INDEX))
++
++
++#define HAL_DMAC_SET_MASTER1_LITTLE_ENDIAN() \
++	    ((DMAC_CSR_REG) &= ~(1<<DMAC_MASTER1_ENDIAN_BIT_INDEX))
++
++#define HAL_DMAC_READ_ERROR_ABORT_INTERRUPT_STATUS(err_abt_status) \
++	    ((err_abt_status) = (DMAC_INT_ERR_STATUS_REG))
++
++
++#define HAL_DMAC_CLEAR_ERROR_ABORT_INTERRUPT_STATUS(err_abt_status) \
++	    ((DMAC_INT_ERR_STATUS_CLR_REG) = (err_abt_status))
++
++
++#define HAL_DMAC_READ_TERMINAL_COUNT_INTERRUPT_STATUS(tc_status) \
++	    ((tc_status) = (DMAC_INT_TC_STATUS_REG) & 0xFF)
++
++
++#define HAL_DMAC_CLEAR_TERMINAL_COUNT_INTERRUPT_STATUS(tc_status) \
++	    ((DMAC_INT_TC_STATUS_CLR_REG) = (tc_status) & 0xFF)
++
++
++
++
++
++
++#endif	// end of #ifndef _STAR_DMAC_H_
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_gpio.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_gpio.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_gpio.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_gpio.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,327 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef	_STAR_GPIO_H_
++#define	_STAR_GPIO_H_
++
++
++#include <mach/star_sys_memory_map.h>
++
++
++#if defined(__UBOOT__)
++#define	GPIOA_MEM_MAP_VALUE(reg_offset)		(*((u32	volatile *)(SYSPA_GPIOA_BASE_ADDR + reg_offset)))
++#define	GPIOB_MEM_MAP_VALUE(reg_offset)		(*((u32	volatile *)(SYSPA_GPIOB_BASE_ADDR + reg_offset)))
++#elif defined(__LINUX__)
++#define	GPIOA_MEM_MAP_VALUE(reg_offset)		(*((u32	volatile *)(SYSVA_GPIOA_BASE_ADDR + reg_offset)))
++#define	GPIOB_MEM_MAP_VALUE(reg_offset)		(*((u32	volatile *)(SYSVA_GPIOB_BASE_ADDR + reg_offset)))
++#else
++#error "NO SYSTEM DEFINED"
++#endif
++
++
++/*
++ * For GPIO Set	A
++ */
++#define	GPIOA_DATA_OUTPUT_REG			GPIOA_MEM_MAP_VALUE(0x00)
++#define	GPIOA_DATA_INPUT_REG			GPIOA_MEM_MAP_VALUE(0x04)
++#define	GPIOA_DIRECTION_REG			GPIOA_MEM_MAP_VALUE(0x08)
++
++#define	GPIOA_DATA_BIT_SET_REG			GPIOA_MEM_MAP_VALUE(0x10)
++#define	GPIOA_DATA_BIT_CLEAR_REG		GPIOA_MEM_MAP_VALUE(0x14)
++
++#define	GPIOA_INTERRUPT_ENABLE_REG		GPIOA_MEM_MAP_VALUE(0x20)
++#define	GPIOA_INTERRUPT_RAW_STATUS_REG		GPIOA_MEM_MAP_VALUE(0x24)
++#define	GPIOA_INTERRUPT_MASKED_STATUS_REG	GPIOA_MEM_MAP_VALUE(0x28)
++#define	GPIOA_INTERRUPT_MASK_REG		GPIOA_MEM_MAP_VALUE(0x2C)
++#define	GPIOA_INTERRUPT_CLEAR_REG		GPIOA_MEM_MAP_VALUE(0x30)
++#define	GPIOA_INTERRUPT_TRIGGER_METHOD_REG	GPIOA_MEM_MAP_VALUE(0x34)
++#define	GPIOA_INTERRUPT_TRIGGER_BOTH_EDGES_REG	GPIOA_MEM_MAP_VALUE(0x38)
++#define	GPIOA_INTERRUPT_TRIGGER_TYPE_REG	GPIOA_MEM_MAP_VALUE(0x3C)
++
++#define	GPIOA_BOUNCE_ENABLE_REG			GPIOA_MEM_MAP_VALUE(0x40)
++#define	GPIOA_BOUNCE_CLOCK_PRESCALE_REG		GPIOA_MEM_MAP_VALUE(0x44)
++
++
++/*
++ * For GPIO Set	B
++ */
++#define	GPIOB_DATA_OUTPUT_REG			GPIOB_MEM_MAP_VALUE(0x00)
++#define	GPIOB_DATA_INPUT_REG			GPIOB_MEM_MAP_VALUE(0x04)
++#define	GPIOB_DIRECTION_REG			GPIOB_MEM_MAP_VALUE(0x08)
++
++#define	GPIOB_DATA_BIT_SET_REG			GPIOB_MEM_MAP_VALUE(0x10)
++#define	GPIOB_DATA_BIT_CLEAR_REG		GPIOB_MEM_MAP_VALUE(0x14)
++
++#define	GPIOB_INTERRUPT_ENABLE_REG		GPIOB_MEM_MAP_VALUE(0x20)
++#define	GPIOB_INTERRUPT_RAW_STATUS_REG		GPIOB_MEM_MAP_VALUE(0x24)
++#define	GPIOB_INTERRUPT_MASKED_STATUS_REG	GPIOB_MEM_MAP_VALUE(0x28)
++#define	GPIOB_INTERRUPT_MASK_REG		GPIOB_MEM_MAP_VALUE(0x2C)
++#define	GPIOB_INTERRUPT_CLEAR_REG		GPIOB_MEM_MAP_VALUE(0x30)
++#define	GPIOB_INTERRUPT_TRIGGER_METHOD_REG	GPIOB_MEM_MAP_VALUE(0x34)
++#define	GPIOB_INTERRUPT_TRIGGER_BOTH_EDGES_REG	GPIOB_MEM_MAP_VALUE(0x38)
++#define	GPIOB_INTERRUPT_TRIGGER_TYPE_REG	GPIOB_MEM_MAP_VALUE(0x3C)
++
++#define	GPIOB_BOUNCE_ENABLE_REG			GPIOB_MEM_MAP_VALUE(0x40)
++#define	GPIOB_BOUNCE_CLOCK_PRESCALE_REG		GPIOB_MEM_MAP_VALUE(0x44)
++
++
++/*
++ * define constant macros
++ */
++
++#define	MAX_GPIO_PINS		(32)
++
++#define	GPIO_0_MASK		(1 << 0)
++#define	GPIO_1_MASK		(1 << 1)
++#define	GPIO_2_MASK		(1 << 2)
++#define	GPIO_3_MASK		(1 << 3)
++#define	GPIO_4_MASK		(1 << 4)
++#define	GPIO_5_MASK		(1 << 5)
++#define	GPIO_6_MASK		(1 << 6)
++#define	GPIO_7_MASK		(1 << 7)
++#define	GPIO_8_MASK		(1 << 8)
++#define	GPIO_9_MASK		(1 << 9)
++#define	GPIO_10_MASK		(1 << 10)
++#define	GPIO_11_MASK		(1 << 11)
++#define	GPIO_12_MASK		(1 << 12)
++#define	GPIO_13_MASK		(1 << 13)
++#define	GPIO_14_MASK		(1 << 14)
++#define	GPIO_15_MASK		(1 << 15)
++#define	GPIO_16_MASK		(1 << 16)
++#define	GPIO_17_MASK		(1 << 17)
++#define	GPIO_18_MASK		(1 << 18)
++#define	GPIO_19_MASK		(1 << 19)
++#define	GPIO_20_MASK		(1 << 20)
++#define	GPIO_21_MASK		(1 << 21)
++#define	GPIO_22_MASK		(1 << 22)
++#define	GPIO_23_MASK		(1 << 23)
++#define	GPIO_24_MASK		(1 << 24)
++#define	GPIO_25_MASK		(1 << 25)
++#define	GPIO_26_MASK		(1 << 26)
++#define	GPIO_27_MASK		(1 << 27)
++#define	GPIO_28_MASK		(1 << 28)
++#define	GPIO_29_MASK		(1 << 29)
++#define	GPIO_30_MASK		(1 << 30)
++#define	GPIO_31_MASK		(1 << 31)
++
++
++/*
++ * macro declarations for GPIO Set A
++ */
++#define	HAL_GPIOA_READ_DATA_OUT_STATUS(data_out_state) \
++    ((data_out_state) =	(GPIOA_DATA_OUTPUT_REG))
++
++#define	HAL_GPIOA_READ_DATA_IN_STATUS(data_in_state) \
++    ((data_in_state) = (GPIOA_DATA_INPUT_REG))
++
++#define	HAL_GPIOA_SET_DIRECTION_OUTPUT(gpio_index) \
++    ((GPIOA_DIRECTION_REG) |= (gpio_index))
++
++#define	HAL_GPIOA_SET_DIRECTION_INPUT(gpio_index) \
++    ((GPIOA_DIRECTION_REG) &= ~(gpio_index))
++
++#define	HAL_GPIOA_SET_DATA_OUT_HIGH(gpio_index)	\
++    ((GPIOA_DATA_BIT_SET_REG) =	(gpio_index))
++
++#define	HAL_GPIOA_SET_DATA_OUT_LOW(gpio_index) \
++    ((GPIOA_DATA_BIT_CLEAR_REG)	= (gpio_index))
++
++#define	HAL_GPIOA_ENABLE_INTERRUPT(gpio_index) \
++    ((GPIOA_INTERRUPT_ENABLE_REG) |= (gpio_index))
++
++#define	HAL_GPIOA_DISABLE_INTERRUPT(gpio_index)	\
++    ((GPIOA_INTERRUPT_ENABLE_REG) &= ~(gpio_index))
++
++#define	HAL_GPIOA_READ_INTERRUPT_RAW_STATUS(raw_state) \
++    ((raw_state) = (GPIOA_INTERRUPT_RAW_STATUS_REG))
++
++#define	HAL_GPIOA_READ_INTERRUPT_MASKED_STATUS(masked_raw_state) \
++    ((masked_raw_state)	= (GPIOA_INTERRUPT_MASKED_STATUS_REG))
++
++#define	HAL_GPIOA_DISABLE_INTERRUPT_MASK(gpio_index) \
++    ((GPIOA_INTERRUPT_MASK_REG)	&= ~(gpio_index))
++
++#define	HAL_GPIOA_ENABLE_INTERRUPT_MASK(gpio_index) \
++    ((GPIOA_INTERRUPT_MASK_REG)	|= (gpio_index))
++
++#define	HAL_GPIOA_CLEAR_INTERRUPT(gpio_index) \
++    ((GPIOA_INTERRUPT_CLEAR_REG) = (gpio_index))
++
++#define	HAL_GPIOA_SET_INTERRUPT_EDGE_TRIGGER_MODE(gpio_index) \
++    ((GPIOA_INTERRUPT_TRIGGER_METHOD_REG) &= ~(gpio_index))
++
++#define	HAL_GPIOA_SET_INTERRUPT_LEVEL_TRIGGER_MODE(gpio_index) \
++    ((GPIOA_INTERRUPT_TRIGGER_METHOD_REG) |= (gpio_index))
++
++#define	HAL_GPIOA_SET_INTERRUPT_SINGLE_EDGE_TRIGGER_MODE(gpio_index) \
++{ \
++    ((GPIOA_INTERRUPT_TRIGGER_METHOD_REG) &= ~(gpio_index)); \
++    ((GPIOA_INTERRUPT_TRIGGER_BOTH_EDGES_REG) &= ~(gpio_index)); \
++}
++
++#define	HAL_GPIOA_SET_INTERRUPT_BOTH_EDGE_TRIGGER_MODE(gpio_index) \
++{ \
++    ((GPIOA_INTERRUPT_TRIGGER_METHOD_REG) &= ~(gpio_index)); \
++    ((GPIOA_INTERRUPT_TRIGGER_BOTH_EDGES_REG) |= (gpio_index));	\
++}
++
++#define	HAL_GPIOA_SET_INTERRUPT_SINGLE_RISING_EDGE_TRIGGER_MODE(gpio_index) \
++{ \
++    ((GPIOA_INTERRUPT_TRIGGER_METHOD_REG) &= ~(gpio_index)); \
++    ((GPIOA_INTERRUPT_TRIGGER_BOTH_EDGES_REG) &= ~(gpio_index)); \
++    ((GPIOA_INTERRUPT_TRIGGER_TYPE_REG)	&= ~(gpio_index)); \
++}
++
++#define	HAL_GPIOA_SET_INTERRUPT_SINGLE_FALLING_EDGE_TRIGGER_MODE(gpio_index) \
++{ \
++    ((GPIOA_INTERRUPT_TRIGGER_METHOD_REG) &= ~(gpio_index)); \
++    ((GPIOA_INTERRUPT_TRIGGER_BOTH_EDGES_REG) &= ~(gpio_index)); \
++    ((GPIOA_INTERRUPT_TRIGGER_TYPE_REG)	|= (gpio_index)); \
++}
++
++#define	HAL_GPIOA_SET_INTERRUPT_HIGH_LEVEL_TRIGGER_MODE(gpio_index) \
++{ \
++    ((GPIOA_INTERRUPT_TRIGGER_METHOD_REG) |= (gpio_index)); \
++    ((GPIOA_INTERRUPT_TRIGGER_TYPE_REG)	&= ~(gpio_index)); \
++}
++
++#define	HAL_GPIOA_SET_INTERRUPT_LOW_LEVEL_TRIGGER_MODE(gpio_index) \
++{ \
++    ((GPIOA_INTERRUPT_TRIGGER_METHOD_REG) |= (gpio_index)); \
++    ((GPIOA_INTERRUPT_TRIGGER_TYPE_REG)	|= (gpio_index)); \
++}
++
++#define	HAL_GPIOA_ENABLE_BOUNCE(gpio_index) \
++    ((GPIOA_BOUNCE_ENABLE_REG) |= (gpio_index))
++
++#define	HAL_GPIOA_DISABLE_BOUNCE(gpio_index) \
++    ((GPIOA_BOUNCE_ENABLE_REG) &= ~(gpio_index))
++
++#define	HAL_GPIOA_READ_BOUNCE_PRESCALE_RATIO(prescale_ratio) \
++    ((prescale_ratio) =	((GPIOA_BOUNCE_CLOCK_PRESCALE_REG) & 0x0000FFFF))
++
++#define	HAL_GPIOA_WRITE_BOUNCE_PRESCALE_RATIO(prescale_ratio) \
++    ((GPIOA_BOUNCE_CLOCK_PRESCALE_REG) = (prescale_ratio & 0x0000FFFF))
++
++
++
++/*
++ * macro declarations for GPIO Set B
++ */
++#define	HAL_GPIOB_READ_DATA_OUT_STATUS(data_out_state) \
++    ((data_out_state) =	(GPIOB_DATA_OUTPUT_REG))
++
++#define	HAL_GPIOB_READ_DATA_IN_STATUS(data_in_state) \
++    ((data_in_state) = (GPIOB_DATA_INPUT_REG))
++
++#define	HAL_GPIOB_SET_DIRECTION_OUTPUT(gpio_index) \
++    ((GPIOB_DIRECTION_REG) |= (gpio_index))
++
++#define	HAL_GPIOB_SET_DIRECTION_INPUT(gpio_index) \
++    ((GPIOB_DIRECTION_REG) &= ~(gpio_index))
++
++#define	HAL_GPIOB_SET_DATA_OUT_HIGH(gpio_index)	\
++    ((GPIOB_DATA_BIT_SET_REG) =	(gpio_index))
++
++#define	HAL_GPIOB_SET_DATA_OUT_LOW(gpio_index) \
++    ((GPIOB_DATA_BIT_CLEAR_REG)	= (gpio_index))
++
++#define	HAL_GPIOB_ENABLE_INTERRUPT(gpio_index) \
++    ((GPIOB_INTERRUPT_ENABLE_REG) |= (gpio_index))
++
++#define	HAL_GPIOB_DISABLE_INTERRUPT(gpio_index)	\
++    ((GPIOB_INTERRUPT_ENABLE_REG) &= ~(gpio_index))
++
++#define	HAL_GPIOB_READ_INTERRUPT_RAW_STATUS(raw_state) \
++    ((raw_state) = (GPIOB_INTERRUPT_RAW_STATUS_REG))
++
++#define	HAL_GPIOB_READ_INTERRUPT_MASKED_STATUS(masked_raw_state) \
++    ((masked_raw_state)	= (GPIOB_INTERRUPT_MASKED_STATUS_REG))
++
++#define	HAL_GPIOB_DISABLE_INTERRUPT_MASK(gpio_index) \
++    ((GPIOB_INTERRUPT_MASK_REG)	&= ~(gpio_index))
++
++#define	HAL_GPIOB_ENABLE_INTERRUPT_MASK(gpio_index) \
++    ((GPIOB_INTERRUPT_MASK_REG)	|= (gpio_index))
++
++#define	HAL_GPIOB_CLEAR_INTERRUPT(gpio_index) \
++    ((GPIOB_INTERRUPT_CLEAR_REG) = (gpio_index))
++
++#define	HAL_GPIOB_SET_INTERRUPT_EDGE_TRIGGER_MODE(gpio_index) \
++    ((GPIOB_INTERRUPT_TRIGGER_METHOD_REG) &= ~(gpio_index))
++
++#define	HAL_GPIOB_SET_INTERRUPT_LEVEL_TRIGGER_MODE(gpio_index) \
++    ((GPIOB_INTERRUPT_TRIGGER_METHOD_REG) |= (gpio_index))
++
++#define	HAL_GPIOB_SET_INTERRUPT_SINGLE_EDGE_TRIGGER_MODE(gpio_index) \
++{ \
++    ((GPIOB_INTERRUPT_TRIGGER_METHOD_REG) &= ~(gpio_index)); \
++    ((GPIOB_INTERRUPT_TRIGGER_BOTH_EDGES_REG) &= ~(gpio_index)); \
++}
++
++#define	HAL_GPIOB_SET_INTERRUPT_BOTH_EDGE_TRIGGER_MODE(gpio_index) \
++{ \
++    ((GPIOB_INTERRUPT_TRIGGER_METHOD_REG) &= ~(gpio_index)); \
++    ((GPIOB_INTERRUPT_TRIGGER_BOTH_EDGES_REG) |= (gpio_index));	\
++}
++
++#define	HAL_GPIOB_SET_INTERRUPT_SINGLE_RISING_EDGE_TRIGGER_MODE(gpio_index) \
++{ \
++    ((GPIOB_INTERRUPT_TRIGGER_METHOD_REG) &= ~(gpio_index)); \
++    ((GPIOB_INTERRUPT_TRIGGER_BOTH_EDGES_REG) &= ~(gpio_index)); \
++    ((GPIOB_INTERRUPT_TRIGGER_TYPE_REG)	&= ~(gpio_index)); \
++}
++
++#define	HAL_GPIOB_SET_INTERRUPT_SINGLE_FALLING_EDGE_TRIGGER_MODE(gpio_index) \
++{ \
++    ((GPIOB_INTERRUPT_TRIGGER_METHOD_REG) &= ~(gpio_index)); \
++    ((GPIOB_INTERRUPT_TRIGGER_BOTH_EDGES_REG) &= ~(gpio_index)); \
++    ((GPIOB_INTERRUPT_TRIGGER_TYPE_REG)	|= (gpio_index)); \
++}
++
++#define	HAL_GPIOB_SET_INTERRUPT_HIGH_LEVEL_TRIGGER_MODE(gpio_index) \
++{ \
++    ((GPIOB_INTERRUPT_TRIGGER_METHOD_REG) |= (gpio_index)); \
++    ((GPIOB_INTERRUPT_TRIGGER_TYPE_REG)	&= ~(gpio_index)); \
++}
++
++#define	HAL_GPIOB_SET_INTERRUPT_LOW_LEVEL_TRIGGER_MODE(gpio_index) \
++{ \
++    ((GPIOB_INTERRUPT_TRIGGER_METHOD_REG) |= (gpio_index)); \
++    ((GPIOB_INTERRUPT_TRIGGER_TYPE_REG)	|= (gpio_index)); \
++}
++
++#define	HAL_GPIOB_ENABLE_BOUNCE(gpio_index) \
++    ((GPIOB_BOUNCE_ENABLE_REG) |= (gpio_index))
++
++#define	HAL_GPIOB_DISABLE_BOUNCE(gpio_index) \
++    ((GPIOB_BOUNCE_ENABLE_REG) &= ~(gpio_index))
++
++#define	HAL_GPIOB_READ_BOUNCE_PRESCALE_RATIO(prescale_ratio) \
++    ((prescale_ratio) =	((GPIOB_BOUNCE_CLOCK_PRESCALE_REG) & 0x0000FFFF))
++
++#define	HAL_GPIOB_WRITE_BOUNCE_PRESCALE_RATIO(prescale_ratio) \
++    ((GPIOB_BOUNCE_CLOCK_PRESCALE_REG) = (prescale_ratio & 0x0000FFFF))
++
++
++#endif	// end of _STAR_GPIO_H_
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_hsdmac.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_hsdmac.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_hsdmac.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_hsdmac.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,106 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef	_STAR_HSDMAC_H_
++#define	_STAR_HSDMAC_H_
++
++
++#include "star_sys_memory_map.h"
++
++
++#if defined(__UBOOT__)
++#define	HSDMAC_MEM_MAP_VALUE(reg_offset)	(*((u32 volatile *)(SYSPA_MISC_BASE_ADDR + reg_offset)))
++#elif defined(__LINUX__)
++#define	HSDMAC_MEM_MAP_VALUE(reg_offset)	(*((u32 volatile *)(SYSVA_MISC_BASE_ADDR + reg_offset)))
++#else
++#error "NO SYSTEM DEFINED"
++#endif
++
++
++/*
++ * define access macros
++ */
++#define	HSDMAC_CONTROL_STATUS_REG		HSDMAC_MEM_MAP_VALUE(0x040)
++
++#define	HSDMAC_MASTER0_ADDR_REG			HSDMAC_MEM_MAP_VALUE(0x050)
++
++#define	HSDMAC_MASTER1_ADDR_REG			HSDMAC_MEM_MAP_VALUE(0x054)
++
++#define	HSDMAC_LLP_REG				HSDMAC_MEM_MAP_VALUE(0x058)
++
++#define	HSDMAC_TOT_SIZE_REG			HSDMAC_MEM_MAP_VALUE(0x05C)
++
++
++#define	HAL_GET_HSDMAC_LLP_COUNTER		((HSDMAC_CONTROL_STATUS_REG >> 8) & 0xF)
++
++#define	HAL_HSDMAC_ENABLE()			((HSDMAC_CONTROL_STATUS_REG) |= (0x1))
++
++#define	HAL_HSDMAC_DISABLE()			((HSDMAC_CONTROL_STATUS_REG) &= ~(0x1))
++
++
++#define HSDMAC_MASTER0_TO_MASTER1		0
++#define HSDMAC_MASTER1_TO_MASTER0		1
++
++#define HSDMAC_RESPONSE_OK			0
++#define HSDMAC_RESPONSE_ERR			-1
++
++#define MAX_HSDMA_VEC 				32
++
++#define MAX_HSDMA_XFER_SIZE			(0xFFF << 2)
++
++struct hsdma_xfer;
++typedef struct hsdma_xfer hsdma_xfer_t;
++typedef void (*hsdma_end_io_t)(hsdma_xfer_t *hsdma_xfer, int err);
++typedef struct
++{
++	u8	data_direction;
++	u32	src_addr; // virtual
++	u32	dst_addr; // virtual
++	u32	size; // bytes
++} __attribute__((packed)) hsdma_vec_t;
++
++struct hsdma_xfer
++{
++	u8			nr_vec;
++	hsdma_vec_t		vec[MAX_HSDMA_VEC];
++	hsdma_end_io_t		hsdma_end_io;
++	void			*private;
++};
++
++/*
++ * HSDMAC LLP Descriptor object
++ */
++typedef struct
++{
++	u32	src_addr; // physical
++	u32	dst_addr; // physical
++	u32	llp;
++	u32	tot_size	: 16;//b15-b0
++	u32	reserved0	: 12;//b27-b16
++	u32	tc_mask		: 1; //b28
++	u32	data_direction	: 1; //b29
++	u32	reserved1	: 2; //b31-30
++} __attribute__((packed)) hsdma_llp_descr_t;
++
++
++#endif	// end of #ifndef _STAR_HSDMAC_H_
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_i2c.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_i2c.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_i2c.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_i2c.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,69 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef _STAR_I2C_H_
++#define _STAR_I2C_H_
++
++#include <mach/star_sys_memory_map.h>
++
++#define I2C_MEM_MAP_ADDR(reg_offset)          (SYSVA_I2C_BASE_ADDR + reg_offset) 
++#define I2C_MEM_MAP_VALUE(reg_offset)         (*((unsigned int volatile *)I2C_MEM_MAP_ADDR(reg_offset)))
++
++#define I2C_CONTROLLER_REG_ADDR               I2C_MEM_MAP_ADDR(0x20)
++#define I2C_TIME_OUT_REG_ADDR                 I2C_MEM_MAP_ADDR(0x24)
++#define I2C_SLAVE_ADDRESS_REG_ADDR            I2C_MEM_MAP_ADDR(0x28)
++#define I2C_WRITE_DATA_REG_ADDR               I2C_MEM_MAP_ADDR(0x2C)
++#define I2C_READ_DATA_REG_ADDR                I2C_MEM_MAP_ADDR(0x30)
++#define I2C_INTERRUPT_STATUS_REG_ADDR         I2C_MEM_MAP_ADDR(0x34)
++#define I2C_INTERRUPT_ENABLE_REG_ADDR         I2C_MEM_MAP_ADDR(0x38)
++
++#define I2C_CONTROLLER_REG                    I2C_MEM_MAP_VALUE(0x20)
++#define I2C_TIME_OUT_REG                      I2C_MEM_MAP_VALUE(0x24)
++#define I2C_SLAVE_ADDRESS_REG                 I2C_MEM_MAP_VALUE(0x28)
++#define I2C_WRITE_DATA_REG                    I2C_MEM_MAP_VALUE(0x2C)
++#define I2C_READ_DATA_REG                     I2C_MEM_MAP_VALUE(0x30)
++#define I2C_INTERRUPT_STATUS_REG              I2C_MEM_MAP_VALUE(0x34)
++#define I2C_INTERRUPT_ENABLE_REG              I2C_MEM_MAP_VALUE(0x38)
++
++#define I2C_READ_ONLY_CMD      (0)
++#define I2C_WRITE_ONLY_CMD     (1)
++#define I2C_WRITE_READ_CMD     (2)
++#define I2C_READ_WRITE_CMD     (3)
++
++#define I2C_DATA_LEN_1_BYTE    (0)
++#define I2C_DATA_LEN_2_BYTE    (1)
++#define I2C_DATA_LEN_3_BYTE    (2)
++#define I2C_DATA_LEN_4_BYTE    (3)
++
++#define I2C_BUS_ERROR_FLAG     (0x1)
++#define I2C_ACTION_DONE_FLAG   (0x2)
++
++#define HAL_I2C_ENABLE_I2C()          (I2C_CONTROLLER_REG) |= ((unsigned int)0x1 << 31); 
++#define HAL_I2C_DISABLE_I2C()         (I2C_CONTROLLER_REG) &= ~((unsigned int)0x1 << 31);
++#define HAL_I2C_ENABLE_DATA_SWAP()    (I2C_CONTROLLER_REG) |= (0x1 << 24); 
++#define HAL_I2C_DISABLE_DATA_SWAP()   (I2C_CONTROLLER_REG) &= ~(0x1 << 24); 
++#define HAL_I2C_START_TRANSFER()      (I2C_CONTROLLER_REG) |= (0x1 << 6); 
++#define HAL_I2C_STOP_TRANSFER()       (I2C_CONTROLLER_REG) &= ~(0x1 << 6); 
++
++#endif
++
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_i2s.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_i2s.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_i2s.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_i2s.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,176 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef _STAR_I2S_H_
++#define _STAR_I2S_H_
++
++/******************************************************************************
++ * MODULE NAME:    star_i2s.h
++ * PROJECT CODE:   Orion
++ * DESCRIPTION:    
++ * MAINTAINER:     MJLIU
++ * DATE:           15 September 2005
++ *
++ * SOURCE CONTROL: 
++ *
++ * REVISION HISTORY:
++ *     15 September 2005  -  MJLIU	- Initial Version v1.0
++ *
++ *
++ * SOURCE:
++ * ISSUES:
++ * NOTES TO USERS:
++ ******************************************************************************/
++
++#include <mach/star_sys_memory_map.h>
++
++#define I2S_MEM_MAP_ADDR(reg_offset)          (SYSVA_I2S_BASE_ADDR + reg_offset) 
++#define I2S_MEM_MAP_VALUE(reg_offset)         (*((unsigned int volatile *)I2S_MEM_MAP_ADDR(reg_offset)))
++
++//#define I2S_BASE_ADDR                         (SYS_I2S_BASE_ADDR)
++
++
++/*
++ * define access macros
++ */
++#define I2S_CONFIGURATION_REG_ADDR            I2S_MEM_MAP_ADDR(0xC0)
++#define I2S_RIGHT_TRANSMIT_DATA_REG_ADDR      I2S_MEM_MAP_ADDR(0xC4)
++#define I2S_LEFT_TRANSMIT_DATA_REG_ADDR       I2S_MEM_MAP_ADDR(0xC8)
++#define I2S_RIGHT_RECEIVE_DATA_REG_ADDR       I2S_MEM_MAP_ADDR(0xCC)
++#define I2S_LEFT_RECEIVE_DATA_REG_ADDR        I2S_MEM_MAP_ADDR(0xD0)
++#define I2S_INTERRUPT_STATUS_REG_ADDR         I2S_MEM_MAP_ADDR(0xD4)
++#define I2S_INTERRUPT_ENABLE_REG_ADDR         I2S_MEM_MAP_ADDR(0xD8)
++
++#define I2S_CONFIGURATION_REG                 I2S_MEM_MAP_VALUE(0xC0)
++#define I2S_RIGHT_TRANSMIT_DATA_REG           I2S_MEM_MAP_VALUE(0xC4)
++#define I2S_LEFT_TRANSMIT_DATA_REG            I2S_MEM_MAP_VALUE(0xC8)
++#define I2S_RIGHT_RECEIVE_DATA_REG            I2S_MEM_MAP_VALUE(0xCC)
++#define I2S_LEFT_RECEIVE_DATA_REG             I2S_MEM_MAP_VALUE(0xD0)
++#define I2S_INTERRUPT_STATUS_REG              I2S_MEM_MAP_VALUE(0xD4)
++#define I2S_INTERRUPT_ENABLE_REG              I2S_MEM_MAP_VALUE(0xD8)
++
++
++/*
++ * define constants macros
++ */
++#define I2S_DATA_16_BIT             (0)
++#define I2S_DATA_32_BIT             (1)
++
++#define I2S_RXBF_R_FULL_FLAG        (0x01)
++#define I2S_TXBF_R_EMPTY_FLAG       (0x02)
++#define I2S_RXBF_L_FULL_FLAG        (0x04)
++#define I2S_TXBF_L_EMPTY_FLAG       (0x08)
++
++#define I2S_RXBF_R_OR_FLAG          (0x10)
++#define I2S_TXBF_R_UR_FLAG          (0x20)
++#define I2S_RXBF_L_OR_FLAG          (0x40)
++#define I2S_TXBF_L_UR_FLAG          (0x80)
++
++
++#define I2S_MASTER_MODE             (1)
++#define I2S_SLAVE_MODE              (0)
++
++#define I2S_I2S_MODE                (1)
++#define I2S_RJF_MODE                (2)
++#define I2S_LJF_MODE                (3)
++
++#define I2S_CLOCK_CONTINUOUS_MODE   (0)
++#define I2S_CLOCK_256S_MODE         (1)
++
++
++#define I2S_WS_RATE_32KHZ           (1)    /* 8.192 MHz */
++#define I2S_WS_RATE_44_1KHZ         (2)    /* 11.2896 MHz */
++#define I2S_WS_RATE_48KHZ           (3)    /* 12.288 MHz */
++
++
++/*
++ * define data structure
++ */
++#if 0
++typedef struct _I2S_OBJECT_    I2S_OBJECT_T;
++
++struct _I2S_OBJECT_
++{
++    u_int32          config;
++    u_int32          interrupt_config;
++
++
++    /* 
++     * For interrupt setting
++     */
++    INTC_OBJECT_T    intc_obj;
++};
++
++
++/*
++ * function declarations
++ */
++void    Hal_I2s_Initialize(I2S_OBJECT_T *);
++#endif
++
++
++/*
++ * macro declarations
++ */
++#define HAL_I2S_ENABLE_I2S() \
++{ \
++    (I2S_CONFIGURATION_REG) |= ((u32)0x1 << 31); \
++}
++
++#define HAL_I2S_DISABLE_I2S() \
++{ \
++    (I2S_CONFIGURATION_REG) &= ~((u32)0x1 << 31); \
++}
++
++#define HAL_I2S_ENABLE_DATA_SWAP() \
++{ \
++    (I2S_CONFIGURATION_REG) |= (0x1 << 24); \
++}
++
++#define HAL_I2S_DISABLE_DATA_SWAP() \
++{ \
++    (I2S_CONFIGURATION_REG) &= ~(0x1 << 24); \
++}
++
++#define HAL_I2S_DISABLE_LEFT_CHANNEL_TRANSMIT_BUFFER_UNDERRUN_INTERRUPT() \
++{ \
++    (I2S_INTERRUPT_ENABLE_REG) &= ~(I2S_TXBF_L_UR_FLAG); \
++}
++
++#define HAL_I2S_DISABLE_RIGHT_CHANNEL_TRANSMIT_BUFFER_UNDERRUN_INTERRUPT() \
++{ \
++    (I2S_INTERRUPT_ENABLE_REG) &= ~(I2S_TXBF_R_UR_FLAG); \
++}
++
++#define HAL_I2S_DISABLE_LEFT_CHANNEL_RECEIVE_BUFFER_OVERRUN_INTERRUPT() \
++{ \
++    (I2S_INTERRUPT_ENABLE_REG) &= ~(I2S_RXBF_L_OR_FLAG); \
++}
++
++#define HAL_I2S_DISABLE_RIGHT_CHANNEL_RECEIVE_BUFFER_OVERRUN_INTERRUPT() \
++{ \
++    (I2S_INTERRUPT_ENABLE_REG) &= ~(I2S_RXBF_R_OR_FLAG); \
++}
++
++
++#endif  // end of #ifndef _STAR_I2S_H_
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_ide.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_ide.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_ide.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_ide.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,245 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef	_STAR_IDE_H_
++#define	_STAR_IDE_H_
++
++
++#include "star_sys_memory_map.h"
++
++
++#if defined(__UBOOT__)
++#define	IDE_MEM_MAP_VALUE(reg_offset)		(*((u32 volatile *)(SYSPA_IDE_CONTROLLER_BASE_ADDR + reg_offset)))
++#define	IDE_BUS_MEM_MAP_VALUE(reg_offset)	(*((u8 volatile *)(SYSPA_IDE_DEVICE_BASE_ADDR + reg_offset)))
++#define IDE_DATA_MEM_MAP_VALUE(reg_offset)	(*((u16 volatile *)(SYSPA_IDE_DEVICE_BASE_ADDR + reg_offset)))
++#elif defined(__LINUX__)
++#define	IDE_MEM_MAP_VALUE(reg_offset)		(*((u32 volatile *)(SYSVA_IDE_CONTROLLER_BASE_ADDR + reg_offset)))
++#define	IDE_BUS_MEM_MAP_VALUE(reg_offset)	(*((u8 volatile *)(SYSVA_IDE_DEVICE_BASE_ADDR + reg_offset)))
++#define IDE_DATA_MEM_MAP_VALUE(reg_offset)	(*((u16 volatile *)(SYSVA_IDE_DEVICE_BASE_ADDR + reg_offset)))
++#else
++#error "NO SYSTEM DEFINED"
++#endif
++
++
++/*
++ * IDE Controller Registers
++ */
++#define IDE_PIO_CONTROL_REG			IDE_MEM_MAP_VALUE(0x00)
++#define IDE_DRIVE0_PIO_TIMING_CONFIG_REG	IDE_MEM_MAP_VALUE(0x04)
++#define IDE_DRIVE1_PIO_TIMING_CONFIG_REG	IDE_MEM_MAP_VALUE(0x08)
++#define IDE_DRIVE0_DMA_TIMING_CONFIG_REG	IDE_MEM_MAP_VALUE(0x0C)
++#define IDE_DRIVE1_DMA_TIMING_CONFIG_REG	IDE_MEM_MAP_VALUE(0x10)
++#define IDE_UDMA_TIMING_CONFIG_REG		IDE_MEM_MAP_VALUE(0x14)
++#define IDE_DMA_UDMA_CONTROL_REG		IDE_MEM_MAP_VALUE(0x18)
++#define IDE_STATUS_CONTROL_REG			IDE_MEM_MAP_VALUE(0x1C)
++#define IDE_BUS_MASTER_DTP_REG			IDE_MEM_MAP_VALUE(0x20)
++#define IDE_FAST_PATH_ACCESS_WINDOW_REG		IDE_MEM_MAP_VALUE(0x24)
++#define IDE_FAST_PATH_DMA_BURST_SIZE_REG	IDE_MEM_MAP_VALUE(0x28)
++
++
++/*
++ * IDE Command Block Registers
++ */
++#define _IDE_DATA_REG				IDE_DATA_MEM_MAP_VALUE(0x20)
++#define _IDE_ERROR_REG				IDE_BUS_MEM_MAP_VALUE(0x24)
++#define _IDE_FEATURES_REG			IDE_BUS_MEM_MAP_VALUE(0x24)
++#define _IDE_SECTOR_COUNT_REG			IDE_BUS_MEM_MAP_VALUE(0x28)
++#define _IDE_LBA_LOW_REG			IDE_BUS_MEM_MAP_VALUE(0x2C)
++#define _IDE_LBA_MID_REG			IDE_BUS_MEM_MAP_VALUE(0x30)
++#define _IDE_LBA_HIGH_REG			IDE_BUS_MEM_MAP_VALUE(0x34)
++#define _IDE_DEVICE_REG				IDE_BUS_MEM_MAP_VALUE(0x38)
++#define _IDE_COMMAND_REG			IDE_BUS_MEM_MAP_VALUE(0x3C)
++#define _IDE_STATUS_REG				IDE_BUS_MEM_MAP_VALUE(0x3C)
++
++
++/*
++ * IDE Control Block Registers
++ */
++#define IDE_DEVICE_CONTROL_REG			IDE_BUS_MEM_MAP_VALUE(0x40)
++#define IDE_ALTERNATE_STATUS_REG		IDE_BUS_MEM_MAP_VALUE(0x40)
++
++
++#define IDE_CD					(0x01)
++#define IDE_IO					(0x02)
++#define IDE_REL					(0x04)
++#define IDE_OVL					(0x02)
++#define IDE_BSY					(0x80)
++#define IDE_DRQ					(0x08)
++#define IDE_SERV				(0x10)
++#define IDE_DMRD				(0x20)
++#define IDE_ERR					(0x01)
++#define IDE_SRST				(0x04)
++
++/*
++ * macro declarations for IDE Controller
++ */
++#define HAL_IDE_DRIVE0_IORDY_SAMPLE_ENABLE() \
++{ \
++    (IDE_PIO_CONTROL_REG) |= (0x1 << 0); \
++}
++
++#define HAL_IDE_DRIVE0_IORDY_SAMPLE_DISABLE() \
++{ \
++    (IDE_PIO_CONTROL_REG) &= ~(0x1 << 0); \
++}
++
++#define HAL_IDE_DRIVE1_IORDY_SAMPLE_ENABLE() \
++{ \
++    (IDE_PIO_CONTROL_REG) |= (0x1 << 1); \
++}
++
++#define HAL_IDE_DRIVE1_IORDY_SAMPLE_DISABLE() \
++{ \
++    (IDE_PIO_CONTROL_REG) &= ~(0x1 << 1); \
++}
++
++#define HAL_IDE_DRIVE0_UDMA_ENABLE() \
++{ \
++    (IDE_DMA_UDMA_CONTROL_REG) |= (0x1 << 0); \
++    (IDE_DMA_UDMA_CONTROL_REG) &= ~(0x1 << 2); \
++}
++
++#define HAL_IDE_DRIVE0_UDMA_DISABLE() \
++{ \
++    (IDE_DMA_UDMA_CONTROL_REG) &= ~(0x1 << 0); \
++}
++
++#define HAL_IDE_DRIVE1_UDMA_ENABLE() \
++{ \
++    (IDE_DMA_UDMA_CONTROL_REG) |= (0x1 << 1); \
++    (IDE_DMA_UDMA_CONTROL_REG) &= ~(0x1 << 3); \
++}
++
++#define HAL_IDE_DRIVE1_UDMA_DISABLE() \
++{ \
++    (IDE_DMA_UDMA_CONTROL_REG) &= ~(0x1 << 1); \
++}
++
++#define HAL_IDE_DRIVE0_DMA_ENABLE() \
++{ \
++    (IDE_DMA_UDMA_CONTROL_REG) |= (0x1 << 2); \
++    (IDE_DMA_UDMA_CONTROL_REG) &= ~(0x1 << 0); \
++}
++
++#define HAL_IDE_DRIVE0_DMA_DISABLE() \
++{ \
++    (IDE_DMA_UDMA_CONTROL_REG) &= ~(0x1 << 2); \
++}
++
++#define HAL_IDE_DRIVE1_DMA_ENABLE() \
++{ \
++    (IDE_DMA_UDMA_CONTROL_REG) |= (0x1 << 3); \
++    (IDE_DMA_UDMA_CONTROL_REG) &= ~(0x1 << 1); \
++}
++
++#define HAL_IDE_TO_USB_FAST_PATH_ENABLE() \
++{ \
++    (IDE_DMA_UDMA_CONTROL_REG) |= (0x1 << 4); \
++}
++
++#define HAL_IDE_TO_USB_FAST_PATH_DISABLE() \
++{ \
++    (IDE_DMA_UDMA_CONTROL_REG) &= ~(0x1 << 4); \
++}
++
++#define HAL_IDE_DRIVE1_DMA_DISABLE() \
++{ \
++    (IDE_DMA_UDMA_CONTROL_REG) &= ~(0x1 << 3); \
++}
++
++#define HAL_IDE_DMA_UDMA_START() \
++{ \
++    (IDE_STATUS_CONTROL_REG) |= (0x1); \
++}
++
++#define HAL_IDE_DMA_UDMA_STOP() \
++{ \
++    (IDE_STATUS_CONTROL_REG) &= ~(0x1); \
++}
++
++#define HAL_IDE_CLEAR_PRD_INTERRUPT_STATUS() \
++{ \
++    (IDE_STATUS_CONTROL_REG) |= (0x1 << 2); \
++}
++
++#define HAL_IDE_CLEAR_INTRQ_INTERRUPT_STATUS() \
++{ \
++    (IDE_STATUS_CONTROL_REG) |= (0x1 << 1); \
++}
++
++#define HAL_IDE_HOST_TRANSFER_WRITE_OUT() \
++{ \
++    (IDE_STATUS_CONTROL_REG) |= (0x1 << 3); \
++}
++
++#define HAL_IDE_HOST_TRANSFER_READ_IN() \
++{ \
++    (IDE_STATUS_CONTROL_REG) &= ~(0x1 << 3); \
++}
++
++#define HAL_IDE_MASK_PRD_INTERRUPT() \
++{ \
++    (IDE_STATUS_CONTROL_REG) |= (0x1 << 6); \
++}
++
++#define HAL_IDE_UNMASK_PRD_INTERRUPT() \
++{ \
++    (IDE_STATUS_CONTROL_REG) &= ~(0x1 << 6); \
++}
++
++#define HAL_IDE_SET_DESCRIPTOR_TABLE_POINTER(dtp) \
++{ \
++    (IDE_BUS_MASTER_DTP_REG) = (dtp); \
++}
++
++#define HAL_IDE_SET_FAST_PATH_ACCESS_WINDOW(fp_access_window) \
++{ \
++    (IDE_FAST_PATH_ACCESS_WINDOW_REG) = (fp_access_window); \
++}
++
++/*
++ * macro declarations for IDE Device
++ */
++#define HAL_IDE_SELECT_DEVICE_0() \
++{ \
++    (_IDE_DEVICE_REG) = 0; \
++}
++
++#define HAL_IDE_SELECT_DEVICE_1() \
++{ \
++    (_IDE_DEVICE_REG) = (0x1 << 4); \
++}
++
++#define HAL_IDE_ENABLE_DEVICE_INTRQ() \
++{ \
++    (IDE_DEVICE_CONTROL_REG) = (0); \
++}
++
++#define HAL_IDE_DISABLE_DEVICE_INTRQ() \
++{ \
++    (IDE_DEVICE_CONTROL_REG) = (0x2); \
++}
++
++
++#endif  // end of #ifndef _STAR_IDE_H_
++
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_intc.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_intc.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_intc.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_intc.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,328 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef	_STAR_INTC_H_
++#define	_STAR_INTC_H_
++
++
++//#include <mach/star_sys_memory_map.h>
++#include <mach/star_sys_memory_map.h>
++
++#if defined(__UBOOT__)
++#define	INTC_MEM_MAP_VALUE(reg_offset)		(*((u32 volatile *)(SYSPA_VIC_BASE_ADDR + reg_offset)))
++#elif defined(__LINUX__)
++#define	INTC_MEM_MAP_VALUE(reg_offset)		(*((u32 volatile *)(SYSVA_VIC_BASE_ADDR + reg_offset)))
++#else
++#error "NO SYSTEM DEFINED"
++#endif
++
++
++/*
++ * define access macros
++ */
++#define	INTC_INTERRUPT_RAW_STATUS_REG		INTC_MEM_MAP_VALUE(0x000)
++#define	INTC_EDGE_INTERRUPT_SOURCE_CLEAR_REG	INTC_MEM_MAP_VALUE(0x004)
++#define	INTC_INTERRUPT_MASK_REG			INTC_MEM_MAP_VALUE(0x008)
++#define	INTC_INTERRUPT_MASK_CLEAR_REG		INTC_MEM_MAP_VALUE(0x00C)
++#define	INTC_INTERRUPT_TRIGGER_MODE_REG		INTC_MEM_MAP_VALUE(0x010)
++#define	INTC_INTERRUPT_TRIGGER_LEVEL_REG	INTC_MEM_MAP_VALUE(0x014)
++#define	INTC_FIQ_SELECT_REG			INTC_MEM_MAP_VALUE(0x018)
++#define	INTC_IRQ_STATUS_REG			INTC_MEM_MAP_VALUE(0x01C)
++#define	INTC_FIQ_STATUS_REG			INTC_MEM_MAP_VALUE(0x020)
++#define	INTC_SOFTWARE_INTERRUPT_REG		INTC_MEM_MAP_VALUE(0x024)
++#define	INTC_SOFTWARE_INTERRUPT_CLEAR_REG	INTC_MEM_MAP_VALUE(0x028)
++#define	INTC_SOFTWARE_PRIORITY_MASK_REG		INTC_MEM_MAP_VALUE(0x02C)
++#define	INTC_POWER_MANAGEMENT_INTERRUPT_REG	INTC_MEM_MAP_VALUE(0x034)
++
++#define	INTC_VECTOR_ADDRESS_0_REG		INTC_MEM_MAP_VALUE(0x040)
++#define	INTC_VECTOR_ADDRESS_1_REG		INTC_MEM_MAP_VALUE(0x044)
++#define	INTC_VECTOR_ADDRESS_2_REG		INTC_MEM_MAP_VALUE(0x048)
++#define	INTC_VECTOR_ADDRESS_3_REG		INTC_MEM_MAP_VALUE(0x04C)
++#define	INTC_VECTOR_ADDRESS_4_REG		INTC_MEM_MAP_VALUE(0x050)
++#define	INTC_VECTOR_ADDRESS_5_REG		INTC_MEM_MAP_VALUE(0x054)
++#define	INTC_VECTOR_ADDRESS_6_REG		INTC_MEM_MAP_VALUE(0x058)
++#define	INTC_VECTOR_ADDRESS_7_REG		INTC_MEM_MAP_VALUE(0x05C)
++#define	INTC_VECTOR_ADDRESS_8_REG		INTC_MEM_MAP_VALUE(0x060)
++#define	INTC_VECTOR_ADDRESS_9_REG		INTC_MEM_MAP_VALUE(0x064)
++#define	INTC_VECTOR_ADDRESS_10_REG		INTC_MEM_MAP_VALUE(0x068)
++#define	INTC_VECTOR_ADDRESS_11_REG		INTC_MEM_MAP_VALUE(0x06C)
++#define	INTC_VECTOR_ADDRESS_12_REG		INTC_MEM_MAP_VALUE(0x070)
++#define	INTC_VECTOR_ADDRESS_13_REG		INTC_MEM_MAP_VALUE(0x074)
++#define	INTC_VECTOR_ADDRESS_14_REG		INTC_MEM_MAP_VALUE(0x078)
++#define	INTC_VECTOR_ADDRESS_15_REG		INTC_MEM_MAP_VALUE(0x07C)
++#define	INTC_VECTOR_ADDRESS_16_REG		INTC_MEM_MAP_VALUE(0x080)
++#define	INTC_VECTOR_ADDRESS_17_REG		INTC_MEM_MAP_VALUE(0x084)
++#define	INTC_VECTOR_ADDRESS_18_REG		INTC_MEM_MAP_VALUE(0x088)
++#define	INTC_VECTOR_ADDRESS_19_REG		INTC_MEM_MAP_VALUE(0x08C)
++#define	INTC_VECTOR_ADDRESS_20_REG		INTC_MEM_MAP_VALUE(0x090)
++#define	INTC_VECTOR_ADDRESS_21_REG		INTC_MEM_MAP_VALUE(0x094)
++#define	INTC_VECTOR_ADDRESS_22_REG		INTC_MEM_MAP_VALUE(0x098)
++#define	INTC_VECTOR_ADDRESS_23_REG		INTC_MEM_MAP_VALUE(0x09C)
++#define	INTC_VECTOR_ADDRESS_24_REG		INTC_MEM_MAP_VALUE(0x0A0)
++#define	INTC_VECTOR_ADDRESS_25_REG		INTC_MEM_MAP_VALUE(0x0A4)
++#define	INTC_VECTOR_ADDRESS_26_REG		INTC_MEM_MAP_VALUE(0x0A8)
++#define	INTC_VECTOR_ADDRESS_27_REG		INTC_MEM_MAP_VALUE(0x0AC)
++#define	INTC_VECTOR_ADDRESS_28_REG		INTC_MEM_MAP_VALUE(0x0B0)
++#define	INTC_VECTOR_ADDRESS_29_REG		INTC_MEM_MAP_VALUE(0x0B4)
++#define	INTC_VECTOR_ADDRESS_30_REG		INTC_MEM_MAP_VALUE(0x0B8)
++#define	INTC_VECTOR_ADDRESS_31_REG		INTC_MEM_MAP_VALUE(0x0BC)
++
++#define	INTC_INTERRUPT_PRIORITY_0_REG		INTC_MEM_MAP_VALUE(0x0C0)
++#define	INTC_INTERRUPT_PRIORITY_1_REG		INTC_MEM_MAP_VALUE(0x0C4)
++#define	INTC_INTERRUPT_PRIORITY_2_REG		INTC_MEM_MAP_VALUE(0x0C8)
++#define	INTC_INTERRUPT_PRIORITY_3_REG		INTC_MEM_MAP_VALUE(0x0CC)
++#define	INTC_INTERRUPT_PRIORITY_4_REG		INTC_MEM_MAP_VALUE(0x0D0)
++#define	INTC_INTERRUPT_PRIORITY_5_REG		INTC_MEM_MAP_VALUE(0x0D4)
++#define	INTC_INTERRUPT_PRIORITY_6_REG		INTC_MEM_MAP_VALUE(0x0D8)
++#define	INTC_INTERRUPT_PRIORITY_7_REG		INTC_MEM_MAP_VALUE(0x0DC)
++#define	INTC_INTERRUPT_PRIORITY_8_REG		INTC_MEM_MAP_VALUE(0x0E0)
++#define	INTC_INTERRUPT_PRIORITY_9_REG		INTC_MEM_MAP_VALUE(0x0E4)
++#define	INTC_INTERRUPT_PRIORITY_10_REG		INTC_MEM_MAP_VALUE(0x0E8)
++#define	INTC_INTERRUPT_PRIORITY_11_REG		INTC_MEM_MAP_VALUE(0x0EC)
++#define	INTC_INTERRUPT_PRIORITY_12_REG		INTC_MEM_MAP_VALUE(0x0F0)
++#define	INTC_INTERRUPT_PRIORITY_13_REG		INTC_MEM_MAP_VALUE(0x0F4)
++#define	INTC_INTERRUPT_PRIORITY_14_REG		INTC_MEM_MAP_VALUE(0x0F8)
++#define	INTC_INTERRUPT_PRIORITY_15_REG		INTC_MEM_MAP_VALUE(0x0FC)
++#define	INTC_INTERRUPT_PRIORITY_16_REG		INTC_MEM_MAP_VALUE(0x100)
++#define	INTC_INTERRUPT_PRIORITY_17_REG		INTC_MEM_MAP_VALUE(0x104)
++#define	INTC_INTERRUPT_PRIORITY_18_REG		INTC_MEM_MAP_VALUE(0x108)
++#define	INTC_INTERRUPT_PRIORITY_19_REG		INTC_MEM_MAP_VALUE(0x10C)
++#define	INTC_INTERRUPT_PRIORITY_20_REG		INTC_MEM_MAP_VALUE(0x110)
++#define	INTC_INTERRUPT_PRIORITY_21_REG		INTC_MEM_MAP_VALUE(0x114)
++#define	INTC_INTERRUPT_PRIORITY_22_REG		INTC_MEM_MAP_VALUE(0x118)
++#define	INTC_INTERRUPT_PRIORITY_23_REG		INTC_MEM_MAP_VALUE(0x11C)
++#define	INTC_INTERRUPT_PRIORITY_24_REG		INTC_MEM_MAP_VALUE(0x120)
++#define	INTC_INTERRUPT_PRIORITY_25_REG		INTC_MEM_MAP_VALUE(0x124)
++#define	INTC_INTERRUPT_PRIORITY_26_REG		INTC_MEM_MAP_VALUE(0x128)
++#define	INTC_INTERRUPT_PRIORITY_27_REG		INTC_MEM_MAP_VALUE(0x12C)
++#define	INTC_INTERRUPT_PRIORITY_28_REG		INTC_MEM_MAP_VALUE(0x130)
++#define	INTC_INTERRUPT_PRIORITY_29_REG		INTC_MEM_MAP_VALUE(0x134)
++#define	INTC_INTERRUPT_PRIORITY_30_REG		INTC_MEM_MAP_VALUE(0x138)
++#define	INTC_INTERRUPT_PRIORITY_31_REG		INTC_MEM_MAP_VALUE(0x13C)
++
++#define	INTC_IRQ_VECTOR_ADDRESS_REG		INTC_MEM_MAP_VALUE(0x140)
++
++#define	INTC_VECTOR_INTERRUPT_ENABLE_REG	INTC_MEM_MAP_VALUE(0x144)
++
++
++
++/*
++ * define constants macros
++ */
++#define	INTC_TIMER1_BIT_INDEX			(0)
++#define	INTC_TIMER2_BIT_INDEX			(1)
++
++#define	INTC_CLOCK_SCALE_BIT_INDEX		(2)
++
++#define	INTC_WATCHDOG_TIMER_BIT_INDEX		(3)
++
++#define	INTC_GPIO_EXTERNAL_INT_BIT_INDEX	(4)
++
++#define	INTC_PCI_INTA_BIT_INDEX			(5)
++#define	INTC_PCI_INTB_BIT_INDEX			(6)
++#define	INTC_PCI_BROKEN_BIT_INDEX		(7)
++#define	INTC_PCI_AHB2BRIDGE_BIT_INDEX		(8)
++
++#define	INTC_UART0_BIT_INDEX			(9)
++#define	INTC_UART1_BIT_INDEX			(10)
++
++#define	INTC_GDMAC_TC_BIT_INDEX			(11)
++#define	INTC_GDMAC_ERROR_BIT_INDEX		(12)
++
++#define	INTC_PCMCIA_BRIDGE_BIT_INDEX		(13)
++
++#define	INTC_RTC_BIT_INDEX			(14)
++
++#define	INTC_PCM_BIT_INDEX			(15)
++
++#define	INTC_USB20_DEVICE_BIT_INDEX		(16)
++
++#define	INTC_IDE_BIT_INDEX			(17)
++
++#define	INTC_NIC_STATUS_BIT_INDEX		(18)
++#define	INTC_NIC_TXTC_BIT_INDEX			(19)
++#define	INTC_NIC_RXRC_BIT_INDEX			(20)
++#define	INTC_NIC_TXQE_BIT_INDEX			(21)
++#define	INTC_NIC_RXQF_BIT_INDEX			(22)
++
++#define	INTC_USB11_BIT_INDEX			(23)
++#define	INTC_USB20_BIT_INDEX			(24)
++
++#define	INTC_I2S_BIT_INDEX			(25)
++#define	INTC_SPI_BIT_INDEX			(26)
++#define	INTC_I2C_BIT_INDEX			(27)
++
++#define	INTC_USB_DEVICE_VBUS_BIT_INDEX		(28)
++
++#define	INTC_EXT_INT29_BIT_INDEX		(29)
++#define	INTC_EXT_INT30_BIT_INDEX		(30)
++#define	INTC_HSDMAC_BIT_INDEX			(31)
++
++
++/*
++ * define interrupt types
++ */
++#define	INTC_IRQ_INTERRUPT			(0)
++#define	INTC_FIQ_INTERRUPT			(1)
++
++/*
++ * define interrupt trigger mode
++ */
++#define	INTC_LEVEL_TRIGGER			(0)
++#define	INTC_EDGE_TRIGGER			(1)
++
++/*
++ * define rising/falling edge for edge trigger mode
++ */
++#define	INTC_RISING_EDGE			(0)
++#define	INTC_FALLING_EDGE			(1)
++
++/*
++ * define active High/Low for level trigger mode
++ */
++#define	INTC_ACTIVE_HIGH			(0)
++#define	INTC_ACTIVE_LOW				(1)
++
++/*
++ * macro declarations
++ */
++#define	HAL_INTC_READ_INTERRUPT_RAW_STATUS(int_raw_status) \
++{ \
++    (int_raw_status) = (INTC_INTERRUPT_RAW_STATUS_REG);	\
++}
++
++
++#define	HAL_INTC_CLEAR_EDGE_TRIGGER_INTERRUPT(source_bit_index)	\
++{ \
++    (INTC_EDGE_INTERRUPT_SOURCE_CLEAR_REG) = (1	<< source_bit_index); \
++}
++
++
++#define	HAL_INTC_READ_INTERRUPT_MASK(int_mask) \
++{ \
++    (int_mask) = (INTC_INTERRUPT_MASK_REG); \
++}
++
++
++#define	HAL_INTC_WRITE_INTERRUPT_MASK(int_mask)	\
++{ \
++    (INTC_INTERRUPT_MASK_REG) =	(int_mask); \
++}
++
++
++#define	HAL_INTC_DISABLE_INTERRUPT_SOURCE(source_bit_index) \
++{ \
++    (INTC_INTERRUPT_MASK_REG) =	(1 << source_bit_index); \
++}
++
++
++#define	HAL_INTC_ENABLE_INTERRUPT_SOURCE(source_bit_index) \
++{ \
++    (INTC_INTERRUPT_MASK_CLEAR_REG) = (1 << source_bit_index); \
++}
++
++
++#define	HAL_INTC_SET_EDGE_TRIGGER_MODE(source_bit_index) \
++{ \
++    (INTC_INTERRUPT_TRIGGER_MODE_REG) |= (1 << source_bit_index);\
++}
++
++
++#define	HAL_INTC_SET_LEVEL_TRIGGER_MODE(source_bit_index) \
++{ \
++    (INTC_INTERRUPT_TRIGGER_MODE_REG) &= (~(1 << source_bit_index)); \
++}
++
++
++#define	HAL_INTC_SET_RISING_EDGE_TRIGGER_LEVEL(source_bit_index) \
++{ \
++    (INTC_INTERRUPT_TRIGGER_LEVEL_REG) &= (~(1 << source_bit_index)); \
++}
++
++
++#define	HAL_INTC_SET_FALLING_EDGE_TRIGGER_LEVEL(source_bit_index) \
++{ \
++    (INTC_INTERRUPT_TRIGGER_LEVEL_REG) |= (1 <<	source_bit_index); \
++}
++
++
++#define	HAL_INTC_SET_ACTIVE_HIGH_TRIGGER_LEVEL(source_bit_index) \
++{ \
++    (INTC_INTERRUPT_TRIGGER_LEVEL_REG) &= (~(1 << source_bit_index));\
++}
++
++
++#define	HAL_INTC_SET_ACTIVE_LOW_TRIGGER_LEVEL(source_bit_index)	\
++{ \
++    (INTC_INTERRUPT_TRIGGER_LEVEL_REG) |= ((1 << source_bit_index)); \
++}
++
++
++#define	HAL_INTC_ASSIGN_INTERRUPT_TO_IRQ(source_bit_index) \
++{ \
++    (INTC_FIQ_SELECT_REG) &= (~(1 << source_bit_index)); \
++}
++
++
++#define	HAL_INTC_ASSIGN_INTERRUPT_TO_FIQ(source_bit_index) \
++{ \
++    (INTC_FIQ_SELECT_REG) |= (1	<< source_bit_index); \
++}
++
++
++#define	HAL_INTC_READ_IRQ_STATUS(int_irq_status) \
++{ \
++    (int_irq_status) = (INTC_IRQ_STATUS_REG); \
++}
++
++
++#define	HAL_INTC_READ_FIQ_STATUS(int_fiq_status) \
++{ \
++    (int_fiq_status) = (INTC_FIQ_STATUS_REG); \
++}
++
++
++#define	HAL_INTC_READ_SOFTWARE_INTERRUPT(software_interrupt) \
++{ \
++    (software_interrupt) = (INTC_SOFTWARE_INTERRUPT_REG); \
++}
++
++
++#define	HAL_INTC_ENABLE_SOFTWARE_INTERRUPT(source_bit_index) \
++{ \
++    (INTC_SOFTWARE_INTERRUPT_REG) = (1 << source_bit_index); \
++}
++
++
++#define	HAL_INTC_CLEAR_SOFTWARE_INTERRUPT(source_bit_index) \
++{ \
++    (INTC_SOFTWARE_INTERRUPT_CLEAR_REG)	= (1 <<	source_bit_index); \
++}
++
++
++#define	HAL_INTC_SELECT_INTERRUPT_SOURCE_FOR_SLEEP_WAKEUP(source_bit_index) \
++{ \
++    (INTC_POWER_MANAGEMENT_INTERRUPT_REG) = (1 << source_bit_index); \
++}
++
++#endif	// end of #ifndef _STAR_INTC_H_
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_misc.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_misc.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_misc.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_misc.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,402 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef	_STAR_MISC_H_
++#define	_STAR_MISC_H_
++
++
++#include <mach/star_sys_memory_map.h>
++
++
++#if defined(__UBOOT__)
++#define	MISC_MEM_MAP_VALUE(reg_offset)		(*((u32 volatile *)(SYSPA_MISC_BASE_ADDR + reg_offset)))
++#elif defined(__LINUX__)
++#define	MISC_MEM_MAP_VALUE(reg_offset)		(*((u32 volatile *)(SYSVA_MISC_BASE_ADDR + reg_offset)))
++#else
++#error "NO SYSTEM DEFINED"
++#endif
++
++
++/*
++ * define access macros
++ */
++#define	MISC_MEMORY_REMAP_REG				MISC_MEM_MAP_VALUE(0x00)
++#define	MISC_CHIP_CONFIG_REG				MISC_MEM_MAP_VALUE(0x04)
++#define	MISC_DEBUG_PROBE_DATA_REG			MISC_MEM_MAP_VALUE(0x08)
++#define	MISC_DEBUG_PROBE_SELECTION_REG			MISC_MEM_MAP_VALUE(0x0C)
++#define	MISC_PCI_CONTROL_BROKEN_MASK_REG		MISC_MEM_MAP_VALUE(0x10)
++#define	MISC_PCI_BROKEN_STATUS_REG			MISC_MEM_MAP_VALUE(0x14)
++#define	MISC_PCI_DEVICE_VENDOR_ID_REG			MISC_MEM_MAP_VALUE(0x18)
++#define	MISC_USB_HOST_PHY_CONTROL_TEST_REG		MISC_MEM_MAP_VALUE(0x1C)
++#define	MISC_GPIOA_PIN_ENABLE_REG			MISC_MEM_MAP_VALUE(0x20)
++#define	MISC_GPIOB_PIN_ENABLE_REG			MISC_MEM_MAP_VALUE(0x24)
++#define	MISC_GPIOA_RESISTOR_CONFIG_REG			MISC_MEM_MAP_VALUE(0x28)
++#define	MISC_GPIOA_DRIVE_STRENGTH_CONFIG_REG		MISC_MEM_MAP_VALUE(0x2C)
++#define	MISC_FAST_ETHERNET_PHY_CONFIG_REG		MISC_MEM_MAP_VALUE(0x30)
++#define	MISC_SOFTWARE_TEST_1_REG			MISC_MEM_MAP_VALUE(0x38)
++#define	MISC_SOFTWARE_TEST_2_REG			MISC_MEM_MAP_VALUE(0x3C)
++
++#define	MISC_E_FUSE_0_REG				MISC_MEM_MAP_VALUE(0x60)
++#define	MISC_E_FUSE_1_REG				MISC_MEM_MAP_VALUE(0x64)
++
++
++/*
++ * define constants macros
++ */
++#define	MISC_PARALLEL_FLASH_BOOT		(0)
++#define	MISC_SPI_SERIAL_FLASH_BOOT		(1)
++
++#define	MISC_LITTLE_ENDIAN			(0)
++#define	MISC_BIG_ENDIAN				(1)
++
++#define	MISC_FARADAY_ICE			(0)
++#define	MISC_ARM_ICE				(1)
++
++#define	MISC_EXT_INT29_PINS			((0x1 << 0))
++#define	MISC_EXT_INT30_PINS			((0x1 << 1))
++#define	MISC_EXT_INT31_PINS			((0x1 << 2))
++#define	MISC_I2C_PINS				((0x1 << 13) | (0x1 << 14))
++#define	MISC_I2S_PINS				((0x1 << 15) | (0x1 << 16) | (0x1 << 17))
++#define	MISC_PCM_PINS				((0x1 << 18) | (0x1 << 19) | (0x1 << 20) | (0x1 << 21))
++#define	MISC_LED0_PINS				((0x1 << 22))
++#define	MISC_LED1_PINS				((0x1 << 23))
++#define	MISC_LED2_PINS				((0x1 << 24))
++#define	MISC_LED012_PINS			((0x1 << 22) | (0x1 << 23) | (0x1 << 24))
++#define	MISC_WDTIMER_RESET_PINS			((0x1 << 25))
++#define	MISC_SPI_PINS				((0x1 << 26) | (0x1 << 27) | (0x1 << 28) | (0x1 << 29) | (0x1 << 30) | (0x1 << 31))
++#define	MISC_MDC_MDIO_PINS			((0x1 << 0) | (0x1 << 1))
++#define	MISC_NIC_COL_PINS			((0x1 << 2))
++#define	MISC_IDE_PINS				((0xFF << 3))
++#define	MISC_SRAM_BANK1_PINS			((0x1 << 11) | (0x1 << 14))
++#define	MISC_SRAM_BANK2_PINS			((0x1 << 12) | (0x1 << 15))
++#define	MISC_SRAM_BANK3_PINS			((0x1 << 13) | (0x1 << 16))
++#define	MISC_PCMCIA_PINS			((0x1 << 17) | (0x1 << 18) | (0x1 << 19) | (0x1 << 20))
++#define	MISC_UART1_PINS				((0x1 << 21) | (0x1 << 22))
++#define	MISC_PCI_PINS				(((u32)0x1FF << 23))
++
++#define	MISC_UART0_ACT0_Pin			(0x1 << 2)
++#define	MISC_UART1_ACT1_Pin			(0x1 << 3)
++
++#define	MISC_GPIOA_PIN_0			(0)
++#define	MISC_GPIOA_PIN_1			(1)
++#define	MISC_GPIOA_PIN_2			(2)
++#define	MISC_GPIOA_PIN_3			(3)
++#define	MISC_GPIOA_PIN_4			(4)
++#define	MISC_GPIOA_PIN_5			(5)
++#define	MISC_GPIOA_PIN_6			(6)
++#define	MISC_GPIOA_PIN_7			(7)
++#define	MISC_GPIOA_PIN_8			(8)
++#define	MISC_GPIOA_PIN_9			(9)
++#define	MISC_GPIOA_PIN_10			(10)
++
++#define	MISC_GPIOA_75K_RESISTOR_PULL_DOWN	(1)
++#define	MISC_GPIOA_75K_RESISTOR_PULL_UP		(2)
++#define	MISC_GPIOA_75K_RESISTOR_PULL_KEEPER	(3)
++
++#define	MISC_GPIOA_DRIVE_STRENGTH_4MA		(0)
++#define	MISC_GPIOA_DRIVE_STRENGTH_8MA		(1)
++
++
++/*
++ * macro declarations
++ */
++#define	HAL_MISC_ENABLE_SPI_SERIAL_FLASH_BANK_ACCESS() \
++{ \
++    (MISC_CHIP_CONFIG_REG) |= (0x1 << 4); \
++}
++
++#define	HAL_MISC_DISABLE_SPI_SERIAL_FLASH_BANK_ACCESS()	\
++{ \
++    (MISC_CHIP_CONFIG_REG) &= ~(0x1 << 4); \
++}
++
++
++/*
++ * Macro defines for GPIOA and GPIOB Pin Enable	Register
++ */
++#define	HAL_MISC_ENABLE_EXT_INT29_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	|= (MISC_EXT_INT29_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_EXT_INT29_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	&= ~(MISC_EXT_INT29_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_EXT_INT30_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	|= (MISC_EXT_INT30_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_EXT_INT30_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	&= ~(MISC_EXT_INT30_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_I2C_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	|= (MISC_I2C_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_I2C_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	&= ~(MISC_I2C_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_I2S_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	|= (MISC_I2S_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_I2S_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	&= ~(MISC_I2S_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_PCM_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	|= (MISC_PCM_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_PCM_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	&= ~(MISC_PCM_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_LED0_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	|= (MISC_LED0_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_LED0_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	&= ~(MISC_LED0_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_LED1_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	|= (MISC_LED1_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_LED1_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	&= ~(MISC_LED1_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_LED2_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	|= (MISC_LED2_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_LED2_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	&= ~(MISC_LED2_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_LED012_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	|= (MISC_LED012_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_LED012_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	&= ~(MISC_LED012_PINS);	\
++}
++
++#define	HAL_MISC_ENABLE_WDTIMER_RESET_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	|= (MISC_WDTIMER_RESET_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_WDTIMER_RESET_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	&= ~(MISC_WDTIMER_RESET_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_SPI_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	|= (MISC_SPI_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_SPI_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	&= ~(MISC_SPI_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_UART0_ACT0_PIN() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	|= (MISC_UART0_ACT0_Pin); \
++}
++
++#define	HAL_MISC_DISABLE_UART0_ACT0_PIN() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	&= ~(MISC_UART0_ACT0_Pin); \
++}
++
++#define	HAL_MISC_ENABLE_UART1_ACT1_PIN() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	|= (MISC_UART1_ACT1_Pin); \
++}
++
++#define	HAL_MISC_DISABLE_UART1_ACT1_PIN() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	&= ~(MISC_UART1_ACT1_Pin); \
++}
++
++#define	HAL_MISC_ENABLE_MDC_MDIO_PINS()	\
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	|= (MISC_MDC_MDIO_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_MDC_MDIO_PINS() \
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	&= ~(MISC_MDC_MDIO_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_NIC_COL_PINS() \
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	|= (MISC_NIC_COL_PINS);	\
++}
++
++#define	HAL_MISC_DISABLE_NIC_COL_PINS()	\
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	&= ~(MISC_NIC_COL_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_IDE_PINS() \
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	|= (MISC_IDE_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_IDE_PINS() \
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	&= ~(MISC_IDE_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_SRAM_BANK1_PINS() \
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	|= (MISC_SRAM_BANK1_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_SRAM_BANK1_PINS() \
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	&= ~(MISC_SRAM_BANK1_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_SRAM_BANK2_PINS() \
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	|= (MISC_SRAM_BANK2_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_SRAM_BANK2_PINS() \
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	&= ~(MISC_SRAM_BANK2_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_SRAM_BANK3_PINS() \
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	|= (MISC_SRAM_BANK3_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_SRAM_BANK3_PINS() \
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	&= ~(MISC_SRAM_BANK3_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_PCMCIA_PINS() \
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	|= (MISC_PCMCIA_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_PCMCIA_PINS() \
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	&= ~(MISC_PCMCIA_PINS);	\
++}
++
++#define	HAL_MISC_ENABLE_UART1_PINS() \
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	|= (MISC_UART1_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_UART1_PINS() \
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	&= ~(MISC_UART1_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_PCI_PINS() \
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	|= (MISC_PCI_PINS); \
++}
++
++#define	HAL_MISC_DISABLE_PCI_PINS() \
++{ \
++    (MISC_GPIOB_PIN_ENABLE_REG)	&= ~(MISC_PCI_PINS); \
++}
++
++#define	HAL_MISC_ENABLE_ALL_SHARED_GPIO_PINS() \
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	= (0x0); \
++    (MISC_GPIOB_PIN_ENABLE_REG)	= (0x0); \
++}
++
++#define	HAL_MISC_DISABLE_ALL_SHARED_GPIO_PINS()	\
++{ \
++    (MISC_GPIOA_PIN_ENABLE_REG)	= (0xFFFFFFFF);	\
++    (MISC_GPIOB_PIN_ENABLE_REG)	= (0xFFFFFFFF);	\
++}
++
++#define	HAL_MISC_CONFIGURE_GPIOA_RESISTOR(pin_index, value) \
++{ \
++    (MISC_GPIOA_RESISTOR_CONFIG_REG) &=	~(0x3 << (2 * pin_index)); \
++    (MISC_GPIOA_RESISTOR_CONFIG_REG) |=	((value	& 0x3) << (2 * pin_index)); \
++}
++
++#define	HAL_MISC_CONFIGURE_GPIOA_DRIVE_STRENGTH(pin_index, value) \
++{ \
++    (MISC_GPIOA_DRIVE_STRENGTH_CONFIG_REG) &= ~(0x1 << pin_index); \
++    (MISC_GPIOA_DRIVE_STRENGTH_CONFIG_REG) |= (value <<	pin_index); \
++}
++
++#define	HAL_MISC_SELECT_FAST_ETHERNET_PHY_LED_MODE0() \
++{ \
++    (MISC_FAST_ETHERNET_PHY_CONFIG_REG)	= (0x0); \
++}
++
++#define	HAL_MISC_SELECT_FAST_ETHERNET_PHY_LED_MODE1() \
++{ \
++    (MISC_FAST_ETHERNET_PHY_CONFIG_REG)	= (0x1); \
++}
++
++#define	HAL_MISC_SELECT_FAST_ETHERNET_PHY_LED_MODE2() \
++{ \
++    (MISC_FAST_ETHERNET_PHY_CONFIG_REG)	= (0x2); \
++}
++
++#define	HAL_MISC_SELECT_FAST_ETHERNET_PHY_LED_MODE3() \
++{ \
++    (MISC_FAST_ETHERNET_PHY_CONFIG_REG)	= (0x3); \
++}
++
++
++#endif	// end of #ifndef _STAR_MISC_H_
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_nic.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_nic.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_nic.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_nic.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,346 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef	_STAR_NIC_H_
++#define	_STAR_NIC_H_
++
++
++#include <mach/star_sys_memory_map.h>
++
++
++#if defined(__UBOOT__)
++#define	NIC_MEM_MAP_VALUE(reg_offset)		(*((u32	volatile *)(SYSPA_NIC_BASE_ADDR + reg_offset)))
++#elif defined(__LINUX__)
++#define	NIC_MEM_MAP_VALUE(reg_offset)		(*((u32	volatile *)(SYSVA_NIC_BASE_ADDR + reg_offset)))
++#else
++#error "NO SYSTEM DEFINED"
++#endif
++
++
++/*
++ * define access macros
++ */
++#define	NIC_PHY_CONTROL_REG0			NIC_MEM_MAP_VALUE(0x000)
++#define	NIC_PHY_CONTROL_REG1			NIC_MEM_MAP_VALUE(0x004)
++
++#define	NIC_MAC_CONTROL_REG			NIC_MEM_MAP_VALUE(0x008)
++#define	NIC_FLOW_CONTROL_CONFIG_REG		NIC_MEM_MAP_VALUE(0x00C)
++
++#define	NIC_ARL_CONFIG_REG			NIC_MEM_MAP_VALUE(0x010)
++
++#define	NIC_MY_MAC_HIGH_BYTE_REG		NIC_MEM_MAP_VALUE(0x014)
++#define	NIC_MY_MAC_LOW_BYTE_REG			NIC_MEM_MAP_VALUE(0x018)
++
++#define	NIC_HASH_TABLE_CONTROL_REG		NIC_MEM_MAP_VALUE(0x01C)
++
++#define	NIC_MY_VLANID_CONTROL_REG		NIC_MEM_MAP_VALUE(0x020)
++
++#define	NIC_MY_VLANID_0_1			NIC_MEM_MAP_VALUE(0x024)
++#define	NIC_MY_VLANID_2_3			NIC_MEM_MAP_VALUE(0x028)
++
++#define	NIC_DMA_CONFIG_REG			NIC_MEM_MAP_VALUE(0x030)
++#define	NIC_TX_DMA_CONTROL_REG			NIC_MEM_MAP_VALUE(0x034)
++#define	NIC_RX_DMA_CONTROL_REG			NIC_MEM_MAP_VALUE(0x038)
++#define	NIC_TX_DESC_PTR_REG			NIC_MEM_MAP_VALUE(0x03C)
++#define	NIC_RX_DESC_PTR_REG			NIC_MEM_MAP_VALUE(0x040)
++
++#define	NIC_TX_DESC_BASE_ADDR_REG		NIC_MEM_MAP_VALUE(0x044)
++#define	NIC_RX_DESC_BASE_ADDR_REG		NIC_MEM_MAP_VALUE(0x048)
++#define	NIC_DELAYED_INT_CONFIG_REG		NIC_MEM_MAP_VALUE(0x04C)
++
++#define	NIC_INT_STATUS_REG			NIC_MEM_MAP_VALUE(0x050)
++#define	NIC_INT_MASK_REG			NIC_MEM_MAP_VALUE(0x054)
++
++#define	NIC_TEST_0_REG				NIC_MEM_MAP_VALUE(0x058)
++#define	NIC_TEST_1_REG				NIC_MEM_MAP_VALUE(0x05C)
++
++#define	NIC_MIB_RX_OK_PKT_CNTR			NIC_MEM_MAP_VALUE(0x100)
++#define	NIC_MIB_RX_OK_BYTE_CNTR			NIC_MEM_MAP_VALUE(0x104)
++#define	NIC_MIB_RX_RUNT_BYTE_CNTR		NIC_MEM_MAP_VALUE(0x108)
++#define	NIC_MIB_RX_OSIZE_DROP_PKT_CNTR		NIC_MEM_MAP_VALUE(0x10C)
++
++#define	NIC_MIB_RX_NO_BUF_DROP_PKT_CNTR		NIC_MEM_MAP_VALUE(0x110)
++
++#define	NIC_MIB_RX_CRC_ERR_PKT_CNTR		NIC_MEM_MAP_VALUE(0x114)
++
++#define	NIC_MIB_RX_ARL_DROP_PKT_CNTR		NIC_MEM_MAP_VALUE(0x118)
++
++#define	NIC_MIB_MYVLANID_MISMATCH_DROP_PKT_CNTR	NIC_MEM_MAP_VALUE(0x11C)
++
++#define	NIC_MIB_RX_CHKSUM_ERR_PKT_CNTR		NIC_MEM_MAP_VALUE(0x120)
++
++#define	NIC_MIB_RX_PAUSE_FRAME_PKT_CNTR		NIC_MEM_MAP_VALUE(0x124)
++
++#define	NIC_MIB_TX_OK_PKT_CNTR			NIC_MEM_MAP_VALUE(0x128)
++#define	NIC_MIB_TX_OK_BYTE_CNTR			NIC_MEM_MAP_VALUE(0x12C)
++
++#define	NIC_MIB_TX_COLLISION_CNTR		NIC_MEM_MAP_VALUE(0x130)
++#define	NIC_MIB_TX_PAUSE_FRAME_CNTR		NIC_MEM_MAP_VALUE(0x130)
++
++#define	NIC_MIB_TX_FIFO_UNDERRUN_RETX_CNTR	NIC_MEM_MAP_VALUE(0x134)
++
++
++
++
++/*
++ * define constants macros
++ */
++
++#define	NIC_PHY_ADDRESS		1 //the phy addr const	value
++#define	NIC_PHY_ID		0x0243	//the phy id
++
++#define	GW_NIC_MAX_TFD_NUM	(32)
++#define	GW_NIC_MAX_RFD_NUM	(32)
++#define	MAX_BUFFERS		(64)
++
++
++
++#define	MMU_OFF			(0)
++#define	MMU_ON			(1)
++#define	OS_NULL			(0)
++
++
++#define	NET_BUFFER_PACKET_SIZE		(512)
++#define	NET_BUFFER_SHIFT_BIT_NUM	(9)	// 2*n9=512
++
++#define	MAX_PACKET_LEN		(1536)
++
++#define	INTERNAL_LOOPBACK_MODE	(1)
++#define	SOFTWARE_REPEATER_MODE	(2)
++
++#define	TXTC_INT_BIT		(0x08000000)
++#define	TX_INSV_BIT		(0x04000000)
++
++#define	LS_BIT			(0x10000000)
++#define	FS_BIT			(0x20000000)
++#define	EOR_BIT			(0x40000000)
++#define	FS_LS_BIT		(0x30000000)
++#define	C_BIT			(0x80000000)
++#define	FS_LS_C_BIT		(0xB0000000)
++#define	FS_LS_INT_BIT		(0x38000000)
++
++
++
++// HASH	TABLE CONTROL REGISTER
++#define	NIC_HASH_TABLE_BIST_DONE_BIT	(0x1 <<	17)
++#define	NIC_HASH_TABLE_BIST_OK_BIT	(0x1 <<	16)
++#define	NIC_HASH_COMMAND_START_BIT	(0x1 <<	14)
++#define	NIC_HASH_COMMAND_BIT		(0x1 <<	13)
++#define	NIC_HASH_BIT_DATA		(0x1 <<	12)
++#define	NIC_HASH_BIT_ADDRESS_BIT	(0x1ff)
++
++
++#define	NIC_REG_CNT			((0x48 << 2) + 1)
++
++/*
++ * macro access
++ */
++
++#define	GW_NIC_TX_TFD_NEXT(work_tfd_ptr) \
++    work_tfd_ptr = NIC_TX_TFD_Ring.head	+ (((u32)(work_tfd_ptr - NIC_TX_TFD_Ring.head) + 1) % GW_NIC_MAX_TFD_NUM)
++
++
++#define	GW_NIC_TX_TFD_PREVIOUS(work_tfd_ptr) \
++    work_tfd_ptr = NIC_TX_TFD_Ring.head	+ ((GW_NIC_MAX_TFD_NUM + (u32)(work_tfd_ptr - NIC_TX_TFD_Ring.head) - 1) % GW_NIC_MAX_TFD_NUM)
++
++
++#define	GW_NIC_RX_RFD_NEXT(work_rfd_ptr) \
++    work_rfd_ptr = NIC_RX_RFD_Ring.head	+ (((u32)(work_rfd_ptr - NIC_RX_RFD_Ring.head) + 1) % GW_NIC_MAX_RFD_NUM)
++
++
++#define	GW_NIC_RX_RFD_PREVIOUS(work_rfd_ptr) \
++    work_rfd_ptr = NIC_RX_RFD_Ring.head	+ ((GW_NIC_MAX_RFD_NUM + (u32)(work_rfd_ptr - NIC_RX_RFD_Ring.head) - 1) % GW_NIC_MAX_RFD_NUM)
++
++
++/*
++ * PHY register	defines
++ */
++#define	PHY_MII_CONTROL_REG_ADDR		0x00
++#define	PHY_MII_STATUS_REG_ADDR			0x01
++#define	PHY_ID1_REG_ADDR			0x02
++#define	PHY_ID2_REG_ADDR			0x03
++#define	PHY_AN_ADVERTISEMENT_REG_ADDR		0x04
++#define	PHY_AN_REAMOTE_CAP_REG_ADDR		0x05
++
++
++#define	PHY_RESERVED1_REG_ADDR			0x10
++#define	PHY_RESERVED2_REG_ADDR			0x11
++#define	PHY_CH_STATUS_OUTPUT_REG_ADDR		0x12
++#define	PHY_RESERVED3_REG_ADDR			0x13
++#define	PHY_RESERVED4_REG_ADDR			0x14
++
++
++#define	PHY_SPEC_CONTROL_REG_ADDR		0x16
++#define	PHY_INTC_CONTROL_STATUS_REG_ADDR	0x17
++
++/*
++ * NIC registers access	macros defines
++ */
++
++//0x004
++#define	HAL_NIC_WRITE_PHY_CONTROL1(config_value) \
++    ((NIC_PHY_CONTROL_REG1) = (config_value))
++
++#define	HAL_NIC_READ_PHY_CONTROL1(config_value)	\
++    ((config_value) = (NIC_PHY_CONTROL_REG1))
++
++//0x008
++#define	HAL_NIC_WRITE_MAC_CONFIGURATION(config_value) \
++    ((NIC_MAC_CONTROL_REG) = (config_value))
++
++#define	HAL_NIC_READ_MAC_CONFIGURATION(config_value) \
++    ((config_value) = (NIC_MAC_CONTROL_REG))
++
++//0x00C
++#define	HAL_NIC_WRITE_FLOW_CONTROL_CONFIG(fc_cfg) \
++    ((NIC_FLOW_CONTROL_CONFIG_REG) = (fc_cfg))
++
++#define	HAL_NIC_READ_FLOW_CONTROL_CONFIG(fc_cfg) \
++    ((fc_cfg) =	(NIC_FLOW_CONTROL_CONFIG_REG))
++
++//0x010
++#define	HAL_NIC_WRITE_ARL_CONFIGURATION(cfg) \
++    ((NIC_ARL_CONFIG_REG) = (cfg))
++
++#define	HAL_NIC_READ_ARL_CONFIGURATION(cfg) \
++    ((cfg) = (NIC_ARL_CONFIG_REG))
++
++//0x014,
++#define	HAL_NIC_WRITE_MY_MAC_HIGH_BYTE(cfg) \
++    ((NIC_MY_MAC_HIGH_BYTE_REG)	= (cfg & 0x0000FFFF ) )
++
++#define	HAL_NIC_READ_MY_MAC_HIGH_BYTE(cfg) \
++    ((cfg) = (NIC_MY_MAC_HIGH_BYTE_REG & 0x0000FFFF ))
++
++//0x018
++#define	HAL_NIC_WRITE_MY_MAC_LOW_BYTE(cfg) \
++    ((NIC_MY_MAC_LOW_BYTE_REG) = (cfg))
++
++#define	HAL_NIC_READ_MY_MAC_LOW_BYTE(cfg) \
++    ((cfg) = (NIC_MY_MAC_LOW_BYTE_REG))
++
++//0x03C
++#define	HAL_NIC_READ_INTERRUPT_STATUS(int_status) \
++    ((int_status) = (NIC_INT_STATUS_REG))
++
++#define	HAL_NIC_CLEAR_ALL_INTERRUPT_STATUS_SOURCES()\
++    ((NIC_INT_STATUS_REG) = (0xFFFFFFFF))
++
++#define	HAL_NIC_CLEAR_INTERRUPT_STATUS_SOURCES(source) \
++    ((NIC_INT_STATUS_REG) |= (source))
++
++#define	HAL_NIC_CLEAR_INTERRUPT_STATUS_SOURCE_BIT(source_bit_index) \
++    ((NIC_INT_STATUS_REG) |= (1	<< (source_bit_index)))
++
++//0x040
++#define	HAL_NIC_DISABLE_ALL_INTERRUPT_STATUS_SOURCES() \
++    ((NIC_INT_MASK_REG)	= (0xFFFFFFFF))
++
++#define	HAL_NIC_ENABLE_ALL_INTERRUPT_STATUS_SOURCES() \
++    ((NIC_INT_MASK_REG)	= (0x00000000))
++
++#define	HAL_NIC_DISABLE_INTERRUPT_STATUS_SOURCE_BIT(source_bit_index) \
++    ((NIC_INT_MASK_REG)	|= (1 << (source_bit_index)))
++
++#define	HAL_NIC_ENABLE_INTERRUPT_STATUS_SOURCE_BIT(source_bit_index) \
++    ((NIC_INT_MASK_REG)	&= ~(1 << (source_bit_index)))
++
++//0x44
++#define	HAL_NIC_WRITE_TEST0_REG(cfg) \
++    ((NIC_TEST_0_REG) =	(cfg))
++
++#define	HAL_NIC_READ_TEST0_REG(cfg) \
++    ((cfg) = (NIC_TEST_0_REG))
++
++//0x48
++#define	HAL_NIC_WRITE_TEST1_REG(cfg) \
++    ((NIC_TEST_1_REG) =	(cfg))
++
++#define	HAL_NIC_READ_TEST1_REG(cfg) \
++    ((cfg) = (NIC_TEST_1_REG))
++
++
++
++/*
++ * NIC's DMA macros defines
++ */
++#define	HAL_NIC_TX_DMA_START() \
++    ((NIC_TX_DMA_CONTROL_REG) =	(1))
++
++
++#define	HAL_NIC_TX_DMA_STOP() \
++    ((NIC_TX_DMA_CONTROL_REG) =	(0))
++
++
++#define	HAL_NIC_READ_TX_DMA_STATE(state) \
++    ((state) = (NIC_TX_DMA_CONTROL_REG))
++
++
++#define	HAL_NIC_RX_DMA_START() \
++    ((NIC_RX_DMA_CONTROL_REG) =	(1))
++
++
++#define	HAL_NIC_RX_DMA_STOP() \
++    ((NIC_RX_DMA_CONTROL_REG) =	(0))
++
++
++#define	HAL_NIC_WRITE_TXSD(tssd_value) \
++    ((NIC_TX_DESC_PTR_REG) = (tssd_value))
++
++
++#define	HAL_NIC_READ_TXSD(tssd_value) \
++    ((tssd_value) = (NIC_TX_DESC_PTR_REG))
++
++
++#define	HAL_NIC_WRITE_RXSD(fssd_value) \
++    ((NIC_RX_DESC_PTR_REG) = (fssd_value))
++
++
++#define	HAL_NIC_READ_RXSD(fssd_value) \
++    ((fssd_value) = (NIC_RX_DESC_PTR_REG))
++
++
++#define	HAL_NIC_WRITE_TX_BASE(ts_base_value) \
++    ((NIC_TX_DESC_BASE_ADDR_REG) = (ts_base_value))
++
++
++#define	HAL_NIC_READ_TX_BASE(ts_base_value) \
++    ((ts_base_value) = (NIC_TX_DESC_BASE_ADDR_REG))
++
++
++#define	HAL_NIC_WRITE_RX_BASE(fs_base_value) \
++    ((NIC_RX_DESC_BASE_ADDR_REG) = (fs_base_value))
++
++
++#define	HAL_NIC_READ_RX_BASE(fs_base_value) \
++    ((fs_base_value) = (NIC_RX_DESC_BASE_ADDR_REG))
++
++
++#define	HAL_NIC_WRITE_DELAYED_INTERRUPT_CONFIG(delayed_interrupt_config) \
++    ((NIC_DELAYED_INT_CONFIG_REG) = (delayed_interrupt_config))
++
++
++#define	HAL_NIC_READ_DELAYED_INTERRUPT_CONFIG(delayed_interrupt_config)	\
++    ((delayed_interrupt_config)	= (NIC_DELAYED_INT_CONFIG_REG))
++
++#endif	// end of #ifndef _STAR_NIC_H_
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_pci_bridge.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_pci_bridge.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_pci_bridge.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_pci_bridge.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,132 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef	_STAR_PCI_DRIDGE_H_
++#define	_STAR_PCI_DRIDGE_H_
++
++
++#include <mach/star_sys_memory_map.h>
++
++
++#define	PCI_IO_SPACE_BASE_ADDR			(SYSPA_PCI_IO_SPACE_BASE_ADDR)
++#define PCI_IO_SPACE_SIZE			0x08000000 /* 64MB */
++#define PCI_IO_SPACE_START			PCI_IO_SPACE_BASE_ADDR
++#define PCI_IO_SPACE_END			(PCI_IO_SPACE_BASE_ADDR + PCI_IO_SPACE_SIZE - 1)
++#define	PCI_MEMORY_SPACE_BASE_ADDR		(SYSPA_PCI_MEMORY_SPACE_BASE_ADDR)
++#define PCI_MEMORY_SPACE_SIZE			0x10000000 /* 256MB */
++#define PCI_NPREFETCH_MEMORY_SPACE_START	PCI_MEMORY_SPACE_BASE_ADDR
++#define PCI_NPREFETCH_MEMORY_SPACE_SIZE		0x00800000 /* 8MB */
++#define PCI_NPREFETCH_MEMORY_SPACE_END		(PCI_NPREFETCH_MEMORY_SPACE_START + PCI_NPREFETCH_MEMORY_SPACE_SIZE - 1)
++#define PCI_PREFETCH_MEMORY_SPACE_START		(PCI_NPREFETCH_MEMORY_SPACE_START + PCI_NPREFETCH_MEMORY_SPACE_SIZE)
++#define PCI_PREFETCH_MEMORY_SPACE_SIZE		0x00800000 /* 8MB */
++#define PCI_PREFETCH_MEMORY_SPACE_END		(PCI_PREFETCH_MEMORY_SPACE_START + PCI_PREFETCH_MEMORY_SPACE_SIZE - 1)
++
++
++#if defined(__UBOOT__)
++#define	PCIB_MEM_MAP_VALUE(base, reg_offset)	(*((u32 volatile *)(SYSPA_PCI_##base##_ADDR + reg_offset)))
++#elif defined(__LINUX__)
++#define	PCIB_MEM_MAP_VALUE(base, reg_offset)	(*((u32 volatile *)(SYSVA_PCI_##base##_ADDR + reg_offset)))
++#else
++#error "NO SYSTEM DEFINED"
++#endif
++
++
++/*
++ * define access macros
++ */
++#define	PCI_BRIDGE_CONFIG_DATA			PCIB_MEM_MAP_VALUE(CONFIG_DATA_BASE, 0x2C)
++#define	PCI_BRIDGE_CONFIG_ADDR			PCIB_MEM_MAP_VALUE(CONFIG_ADDR_BASE, 0x28)
++
++#define PCI_BRIDGE_CONFIG_DATA_REG_OFFSET	0x2C
++#define PCI_BRIDGE_CONFIG_ADDR_REG_OFFSET	0x28
++
++/*
++ * define constants macros
++ */
++#define	PCIB_BUS_CLOCK_33M			1
++
++#define	PCIB_BUS_CLOCK_66M			2
++
++#define	PCIB_DEVICE_ID				0x8131
++
++#define	PCIB_VENDOR_ID				0xEEEE
++
++#define	PCIB_CLASS_CODE				0xFF0000
++
++#define	PCIB_REVISION_ID			0x00
++
++#define	PCIB_BAR0_MEMORY_SPACE_BASE		0x20000000
++
++#define	PCIB_BAR1_IO_SPACE_BASE			0x20000000
++
++
++#define	PCI_MEMORY_SPACE_BASE			0xB0000000
++
++#define	PCI_IO_SPACE_BASE			0xA8000000
++
++
++#define	PCI_MAX_BUS_NUM				0x01
++#define	PCI_MAX_DEVICE_NUM			0x14
++#define	PCI_MAX_FUNCTION_NUM			0x01
++#define	PCI_MAX_REG_NUM				0x3C
++
++
++#define	PCI_MAX_DEVICE_TYPE_NUM			0x13
++#define	PCI_MAX_BAR_NUM				0x06
++
++
++#define	PCI_CSH_VENDOR_ID_REG_ADDR		0x00
++#define	PCI_CSH_DEVICE_ID_REG_ADDR		0x02
++#define	PCI_CSH_COMMAND_REG_ADDR		0x04
++#define	PCI_CSH_STATUS_REG_ADDR			0x06
++#define	PCI_CSH_REVISION_CLASS_REG_ADDR		0x08
++#define	PCI_CSH_CACHE_LINE_SIZE_REG_ADDR	0x0C
++#define	PCI_CSH_LATENCY_TIMER_REG_ADDR		0x0D
++#define	PCI_CSH_HEADER_TYPE_REG_ADDR		0x0E
++#define	PCI_CSH_BIST_REG_ADDR			0x0F
++#define	PCI_CSH_BAR_REG_ADDR			0x10
++
++
++#define	PCI_IO_SPACE_SIZE_1M			0x00
++#define	PCI_IO_SPACE_SIZE_2M			0x01
++#define	PCI_IO_SPACE_SIZE_4M			0x02
++#define	PCI_IO_SPACE_SIZE_8M			0x03
++#define	PCI_IO_SPACE_SIZE_16M			0x04
++#define	PCI_IO_SPACE_SIZE_32M			0x05
++#define	PCI_IO_SPACE_SIZE_64M			0x06
++#define	PCI_IO_SPACE_SIZE_128M			0x07
++#define	PCI_IO_SPACE_SIZE_256M			0x08
++#define	PCI_IO_SPACE_SIZE_512M			0x09
++#define	PCI_IO_SPACE_SIZE_1G			0x0A
++#define	PCI_IO_SPACE_SIZE_2G			0x0B
++
++
++#define	PCI_MEMORY_SPACE_TYPE			0
++#define	PCI_IO_SPACE_TYPE			1
++
++#define	PCI_BROKEN_FLAG				1
++#define	PCI_AHB2PCIB_FLAG			2
++
++
++#endif	// end of #ifndef _STAR_PCI_DRIDGE_H_
++
+diff -rupN linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_pcmcia_bridge.h linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_pcmcia_bridge.h
+--- linux-2.6.35.11/arch/arm/mach-str8100/include/mach/star_pcmcia_bridge.h	1969-12-31 19:00:00.000000000 -0500
++++ linux-2.6.35.11-ts7500/arch/arm/mach-str8100/include/mach/star_pcmcia_bridge.h	2011-03-14 11:18:24.000000000 -0400
+@@ -0,0 +1,231 @@
++/*******************************************************************************
++ *
++ *  Copyright (c) 2008 Cavium Networks 
++ * 
++ *  This file is free software; you can redistribute it and/or modify 
++ *  it under the terms of the GNU General Public License, Version 2, as 
++ *  published by the Free Software Foundation. 
++ *
++ *  This file is distributed in the hope that it will be useful, 
++ *  but AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty of 
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 
++ *  NONINFRINGEMENT.  See the GNU General Public License for more details. 
++ *
++ *  You should have received a copy of the GNU General Public License 
++ *  along with this file; if not, write to the Free Software 
++ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA or 
++ *  visit http://www.gnu.org/licenses/. 
++ *
++ *  This file may also be available under a different license from Cavium. 
++ *  Contact Cavium Networks for more information
++ *
++ ******************************************************************************/
++
++#ifndef	_STAR_PCMCIA_DRIDGE_H_
++#define	_STAR_PCMCIA_DRIDGE_H_
++
++/******************************************************************************
++ * MODULE NAME:	   star_pcmcia_bridge.h
++ * PROJECT CODE:   Equuleus
++ * DESCRIPTION:
++ * MAINTAINER:	   Eric	Yang
++ * DATE:	   15 September	2005
++ *
++ * SOURCE CONTROL:
++ *
++ * LICENSE:
++ *     This source code	is copyright (c) 2005 Star Semi	Inc.
++ *     All rights reserved.
++ *
++ * REVISION HISTORY:
++ *     15 Septemb