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[80.153.143.164]) by smtp.gmail.com with ESMTPSA id bg12-20020a05600c3c8c00b003d1e34bcbb2sm28161735wmb.13.2022.12.29.08.01.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 08:01:18 -0800 (PST) From: Alexander Kanavin X-Google-Original-From: Alexander Kanavin To: openembedded-core@lists.openembedded.org Cc: Alexander Kanavin Subject: [PATCH 02/10] conf/machine/include: add x86-64-v3 tunes (AVX, AVX2, BMI1, BMI2, F16C, FMA, LZCNT, MOVBE, XSAVE) Date: Thu, 29 Dec 2022 17:01:02 +0100 Message-Id: <20221229160110.255775-2-alex@linutronix.de> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221229160110.255775-1-alex@linutronix.de> References: <20221229160110.255775-1-alex@linutronix.de> MIME-Version: 1.0 List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Thu, 29 Dec 2022 16:01:23 -0000 X-Groupsio-URL: https://lists.openembedded.org/g/openembedded-core/message/175108 Qemu 7.2 finally allows us to move beyond building for original Core 2/Core i7 era hardware, and this patch adds support for the newer generations. But first, a bit of background: Recently toolchains gained support for specifying x86-64 'levels' of instruction set support; v3 corresponds to 2013-era Haswell CPUs (and later), with AVX, AVX2 and a few other instructions that were introduced in that generation. I believe this is preferrable to picking a specific CPU model as the baseline. Here's Phoronix's feature article that explains the feature and the available levels: "Both LLVM Clang 12 and GCC 11 are ready to go in offering the new x86-64-v2, x86-64-v3, and x86-64-v4 targets. These x86_64 micro-architecture feature levels have been about coming up with a few "classes" of Intel/AMD CPU processor support rather than continuing to rely on just the x86_64 baseline or targeting a specific CPU family for optimizations. These new levels make it easier to raise the base requirements around Linux x86-64 whether it be for a Linux distribution or a particular software application where the developer/ISV may be wanting to compile with greater instruction set extensions enabled in catering to more recent Intel/AMD CPUs." https://www.phoronix.com/news/GCC-11-x86-64-Feature-Levels Here's gcc docs for it: https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html And here's the formal specification (click on the pdf link): https://gitlab.com/x86-psABIs/x86-64-ABI The actual tune file was created by copying corei7 tunes and doing search/replace on them. Qemu options were dropped as unnecessary. 32 bit tune was dropped as well, as there is no 32 bit only CPU that also supports these new instructions; all of the v3 capable chips are 64 bit. Signed-off-by: Alexander Kanavin --- .../machine/include/x86/tune-x86-64-v3.inc | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 meta/conf/machine/include/x86/tune-x86-64-v3.inc diff --git a/meta/conf/machine/include/x86/tune-x86-64-v3.inc b/meta/conf/machine/include/x86/tune-x86-64-v3.inc new file mode 100644 index 0000000000..267c12ff50 --- /dev/null +++ b/meta/conf/machine/include/x86/tune-x86-64-v3.inc @@ -0,0 +1,29 @@ +# Settings for the GCC(1) cpu-type "x86-64-v3": +# +# CPUs with AVX, AVX2, BMI1, BMI2, F16C, FMA, LZCNT, MOVBE, XSAVE. +# (but not AVX512). +# See https://www.phoronix.com/news/GCC-11-x86-64-Feature-Levels for details. +# +# This tune is recommended for Intel Haswell/AMD Excavator CPUs (and later). +# +DEFAULTTUNE ?= "x86-64-v3" + +# Include the previous tune to pull in PACKAGE_EXTRA_ARCHS +require conf/machine/include/x86/tune-corei7.inc + +# Extra tune features +TUNEVALID[x86-64-v3] = "Enable x86-64-v3 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'x86-64-v3', ' -march=x86-64-v3', '', d)}" + +# Extra tune selections +AVAILTUNES += "x86-64-v3" +TUNE_FEATURES:tune-x86-64-v3 = "${TUNE_FEATURES:tune-x86-64} x86-64-v3" +BASE_LIB:tune-x86-64-v3 = "lib64" +TUNE_PKGARCH:tune-x86-64-v3 = "x86-64-v3" +PACKAGE_EXTRA_ARCHS:tune-x86-64-v3 = "${PACKAGE_EXTRA_ARCHS:tune-corei7-64} x86-64-v3" + +AVAILTUNES += "x86-64-v3-x32" +TUNE_FEATURES:tune-x86-64-v3-x32 = "${TUNE_FEATURES:tune-x86-64-x32} x86-64-v3" +BASE_LIB:tune-x86-64-v3-x32 = "libx32" +TUNE_PKGARCH:tune-x86-64-v3-x32 = "x86-64-v3-x32" +PACKAGE_EXTRA_ARCHS:tune-x86-64-v3-x32 = "${PACKAGE_EXTRA_ARCHS:tune-corei7-64-x32} x86-64-v3-x32"